From ed744827041a97336461abdc91b43fd0eafb869c Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Sat, 8 Oct 2011 18:28:28 +0000 Subject: Add TEST8ri_NOREX pseudo to constrain sub_8bit_hi copies. In 64-bit mode, sub_8bit_hi sub-registers can only be used by NOREX instructions. The COPY created from the EXTRACT_SUBREG DAG node cannot target all GR8 registers, only those in GR8_NOREX. TO enforce this, we ensure that all instructions using the EXTRACT_SUBREG are GR8_NOREX constrained. This fixes PR11088. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141499 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/norex-subreg.ll | 41 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'test/CodeGen/X86/norex-subreg.ll') diff --git a/test/CodeGen/X86/norex-subreg.ll b/test/CodeGen/X86/norex-subreg.ll index 0850fe9..2c529fd 100644 --- a/test/CodeGen/X86/norex-subreg.ll +++ b/test/CodeGen/X86/norex-subreg.ll @@ -1,4 +1,5 @@ ; RUN: llc -O0 < %s +; RUN: llc < %s target triple = "x86_64-apple-macosx10.7" ; This test case extracts a sub_8bit_hi sub-register: @@ -37,3 +38,43 @@ entry: store i16 %10, i16* undef, align 1 ret void } + +; This test case extracts a sub_8bit_hi sub-register: +; +; %vreg2 = COPY %vreg1:sub_8bit_hi; GR8:%vreg2 GR64_ABCD:%vreg1 +; TEST8ri %vreg2, 1, %EFLAGS; GR8:%vreg2 +; +; %vreg2 must be constrained to GR8_NOREX, or the COPY could become impossible. +; +; PR11088 + +define fastcc i32 @g(i64 %FB) nounwind uwtable readnone align 2 { +entry: + %and32 = and i64 %FB, 256 + %cmp33 = icmp eq i64 %and32, 0 + %Features.6.or35 = select i1 %cmp33, i32 0, i32 undef + %cmp38 = icmp eq i64 undef, 0 + %or40 = or i32 %Features.6.or35, 4 + %Features.8 = select i1 %cmp38, i32 %Features.6.or35, i32 %or40 + %and42 = and i64 %FB, 32 + %or45 = or i32 %Features.8, 2 + %cmp43 = icmp eq i64 %and42, 0 + %Features.8.or45 = select i1 %cmp43, i32 %Features.8, i32 %or45 + %and47 = and i64 %FB, 8192 + %cmp48 = icmp eq i64 %and47, 0 + %or50 = or i32 %Features.8.or45, 32 + %Features.10 = select i1 %cmp48, i32 %Features.8.or45, i32 %or50 + %or55 = or i32 %Features.10, 64 + %Features.10.or55 = select i1 undef, i32 %Features.10, i32 %or55 + %and57 = lshr i64 %FB, 2 + %and57.tr = trunc i64 %and57 to i32 + %or60 = and i32 %and57.tr, 1 + %Features.12 = or i32 %Features.10.or55, %or60 + %and62 = and i64 %FB, 128 + %or65 = or i32 %Features.12, 8 + %cmp63 = icmp eq i64 %and62, 0 + %Features.12.or65 = select i1 %cmp63, i32 %Features.12, i32 %or65 + %Features.14 = select i1 undef, i32 undef, i32 %Features.12.or65 + %Features.16 = select i1 undef, i32 undef, i32 %Features.14 + ret i32 %Features.16 +} -- cgit v1.1