From a46f35d3d65425af5eaaaf906fca240a33d6c362 Mon Sep 17 00:00:00 2001 From: Nadav Rotem Date: Mon, 2 Jan 2012 08:05:46 +0000 Subject: Optimize the sequence blend(sign_extend(x)) to blend(shl(x)) since SSE blend instructions only look at the highest bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147426 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/sse2-blend.ll | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'test/CodeGen/X86/sse2-blend.ll') diff --git a/test/CodeGen/X86/sse2-blend.ll b/test/CodeGen/X86/sse2-blend.ll index 2f4317b..c6602d3 100644 --- a/test/CodeGen/X86/sse2-blend.ll +++ b/test/CodeGen/X86/sse2-blend.ll @@ -28,10 +28,10 @@ define void@vsel_i32(<4 x i32>* %v1, <4 x i32>* %v2) { ; Without forcing instructions, fall back to the preferred PS domain. ; CHECK: vsel_i64 -; CHECK: xorps -; CHECK: andps -; CHECK: andnps -; CHECK: orps +; CHECK: pxor +; CHECK: and +; CHECK: andn +; CHECK: or ; CHECK: ret define void@vsel_i64(<4 x i64>* %v1, <4 x i64>* %v2) { @@ -44,10 +44,10 @@ define void@vsel_i64(<4 x i64>* %v1, <4 x i64>* %v2) { ; Without forcing instructions, fall back to the preferred PS domain. ; CHECK: vsel_double -; CHECK: xorps -; CHECK: andps -; CHECK: andnps -; CHECK: orps +; CHECK: xor +; CHECK: and +; CHECK: andn +; CHECK: or ; CHECK: ret define void@vsel_double(<4 x double>* %v1, <4 x double>* %v2) { -- cgit v1.1