From 607a0508ba5732716809b926a271a9152bdcec12 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Wed, 9 Sep 2009 14:22:57 +0000 Subject: When widening a vector load, use the correct chain. This fixes PR4891. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81343 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/widen_load-0.ll | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 test/CodeGen/X86/widen_load-0.ll (limited to 'test/CodeGen/X86/widen_load-0.ll') diff --git a/test/CodeGen/X86/widen_load-0.ll b/test/CodeGen/X86/widen_load-0.ll new file mode 100644 index 0000000..f6c4af0 --- /dev/null +++ b/test/CodeGen/X86/widen_load-0.ll @@ -0,0 +1,21 @@ +; RUN: llc < %s -o - -march=x86-64 | FileCheck %s +; PR4891 + +; Both loads should happen before either store. + +; CHECK: movl (%rdi), %eax +; CHECK: movl (%rsi), %ecx +; CHECK: movl %ecx, (%rdi) +; CHECK: movl %eax, (%rsi) + +define void @short2_int_swap(<2 x i16>* nocapture %b, i32* nocapture %c) nounwind { +entry: + %0 = load <2 x i16>* %b, align 2 ; <<2 x i16>> [#uses=1] + %1 = load i32* %c, align 4 ; [#uses=1] + %tmp1 = bitcast i32 %1 to <2 x i16> ; <<2 x i16>> [#uses=1] + store <2 x i16> %tmp1, <2 x i16>* %b, align 2 + %tmp5 = bitcast <2 x i16> %0 to <1 x i32> ; <<1 x i32>> [#uses=1] + %tmp3 = extractelement <1 x i32> %tmp5, i32 0 ; [#uses=1] + store i32 %tmp3, i32* %c, align 4 + ret void +} -- cgit v1.1