From b1df5b013a38ab7381630af8b3142c56f604d85b Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Wed, 27 Nov 2013 06:36:20 +0000 Subject: Merging r195779: ------------------------------------------------------------------------ r195779 | hliao | 2013-11-26 12:31:31 -0800 (Tue, 26 Nov 2013) | 7 lines Fix PR18054 - Fix bug in (vsext (vzext x)) -> (vsext x) in SIGN_EXTEND_IN_REG lowering where we need to check whether x is a vector type (in-reg type) of i8, i16 or i32; otherwise, that optimization is not valid. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195821 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/pr18054.ll | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 test/CodeGen/X86/pr18054.ll (limited to 'test/CodeGen/X86') diff --git a/test/CodeGen/X86/pr18054.ll b/test/CodeGen/X86/pr18054.ll new file mode 100644 index 0000000..b7af516 --- /dev/null +++ b/test/CodeGen/X86/pr18054.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=penryn | FileCheck %s + +define void @foo(<16 x i32>* %p, <16 x i1> %x) { + %ret = sext <16 x i1> %x to <16 x i32> + store <16 x i32> %ret, <16 x i32>* %p + ret void +; CHECK: foo +; CHECK-NOT: pmovsxbd +; CHECK: ret +} -- cgit v1.1