From c586d268124f8801434cc0f68fe10cb3510c7ca6 Mon Sep 17 00:00:00 2001
From: Manman Ren <mren@apple.com>
Date: Mon, 13 Aug 2012 18:29:41 +0000
Subject: X86: move Int_CVTSD2SSrr, Int_CVTSI2SSrr, Int_CVTSI2SDrr,
 Int_CVTSS2SDrr from OpTbl1 to OpTbl2 since they have 3 operands and the last
 operand can be changed to a memory operand.

PR13576


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161769 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/vec_ss_load_fold.ll | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

(limited to 'test/CodeGen/X86')

diff --git a/test/CodeGen/X86/vec_ss_load_fold.ll b/test/CodeGen/X86/vec_ss_load_fold.ll
index 3bd3f7b..9ceea93 100644
--- a/test/CodeGen/X86/vec_ss_load_fold.ll
+++ b/test/CodeGen/X86/vec_ss_load_fold.ll
@@ -70,3 +70,17 @@ define <4 x float> @test4(<4 x float> %A, float *%b, i32 %C) nounwind {
 ; CHECK: call
 ; CHECK: roundss $4, %xmm{{.*}}, %xmm0
 }
+
+; PR13576 
+define  <2 x double> @test5() nounwind uwtable readnone noinline {
+entry:
+  %0 = tail call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> <double
+4.569870e+02, double 1.233210e+02>, i32 128) nounwind readnone
+  ret <2 x double> %0
+; CHECK: test5:
+; CHECK: movl
+; CHECK: mov
+; CHECK: cvtsi2sd
+}
+
+declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
-- 
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