From 357be5e4ae712eae73d5985c2f6b91baa8bc4271 Mon Sep 17 00:00:00 2001 From: Che-Liang Chiou Date: Sat, 2 Apr 2011 08:51:39 +0000 Subject: ptx: support setp's 4-operand format git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128767 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/PTX/setp.ll | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'test/CodeGen') diff --git a/test/CodeGen/PTX/setp.ll b/test/CodeGen/PTX/setp.ll index 7f8b996..5348482 100644 --- a/test/CodeGen/PTX/setp.ll +++ b/test/CodeGen/PTX/setp.ll @@ -107,3 +107,28 @@ define ptx_device i32 @test_setp_ge_u32_ri(i32 %x) { %z = zext i1 %p to i32 ret i32 %z } + +define ptx_device i32 @test_setp_4_op_format_1(i32 %x, i32 %y, i32 %u, i32 %v) { +; CHECK: setp.gt.u32 p0, r3, r4; +; CHECK-NEXT: setp.eq.and.u32 p0, r1, r2, p0; +; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK-NEXT: ret; + %c = icmp eq i32 %x, %y + %d = icmp ugt i32 %u, %v + %e = and i1 %c, %d + %z = zext i1 %e to i32 + ret i32 %z +} + +define ptx_device i32 @test_setp_4_op_format_2(i32 %x, i32 %y, i32 %w) { +; CHECK: cvt.pred.u32 p0, r3; +; CHECK-NEXT: setp.eq.and.u32 p0, r1, r2, !p0; +; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK-NEXT: ret; + %c = trunc i32 %w to i1 + %d = icmp eq i32 %x, %y + %e = xor i1 %c, 1 + %f = and i1 %d, %e + %z = zext i1 %f to i32 + ret i32 %z +} -- cgit v1.1