From 4071a711126a2a75585a32b96bb5d15ea267a915 Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Sat, 2 Apr 2011 02:40:43 +0000 Subject: Do some peephole optimizations to remove pointless VMOVs from Neon to integer registers that arise from argument shuffling with the soft float ABI. These instructions are particularly slow on Cortex A8. This fixes one half of . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128759 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/ARM/fp-arg-shuffle.ll | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 test/CodeGen/ARM/fp-arg-shuffle.ll (limited to 'test/CodeGen') diff --git a/test/CodeGen/ARM/fp-arg-shuffle.ll b/test/CodeGen/ARM/fp-arg-shuffle.ll new file mode 100644 index 0000000..59303ac --- /dev/null +++ b/test/CodeGen/ARM/fp-arg-shuffle.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=arm -mattr=+neon -float-abi=soft | FileCheck %s + +; CHECK: function1 +; CHECK-NOT: vmov r +define double @function1(double %a, double %b, double %c, double %d, double %e, double %f) nounwind noinline ssp { +entry: + %call = tail call double @function2(double %f, double %e, double %d, double %c, double %b, double %a) nounwind + ret double %call +} + +declare double @function2(double, double, double, double, double, double) -- cgit v1.1