From 45b14e341a8a85e877d001bbd43f5e2b25b61cb8 Mon Sep 17 00:00:00 2001 From: Christian Konig Date: Wed, 27 Mar 2013 09:12:51 +0000 Subject: R600/SI: add mulhu/mulhs patterns MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Christian König Reviewed-by: Michel Dänzer Tested-by: Michel Dänzer git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178126 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/R600/mulhu.ll | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 test/CodeGen/R600/mulhu.ll (limited to 'test/CodeGen') diff --git a/test/CodeGen/R600/mulhu.ll b/test/CodeGen/R600/mulhu.ll new file mode 100644 index 0000000..979074d --- /dev/null +++ b/test/CodeGen/R600/mulhu.ll @@ -0,0 +1,16 @@ +;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s + +;CHECK: V_MOV_B32_e32 VGPR1, -1431655765 +;CHECK-NEXT: V_MUL_HI_U32 VGPR0, VGPR0, VGPR1, 0, 0, 0, 0, 0 +;CHECK-NEXT: V_LSHR_B32_e64 VGPR0, VGPR0, 1, 0, 0, 0, 0 + +define void @test(i32 %p) { + %i = udiv i32 %p, 3 + %r = bitcast i32 %i to float + call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r) + ret void +} + +declare <4 x float> @llvm.SI.sample.(i32, <4 x i32>, <8 x i32>, <4 x i32>, i32) readnone + +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) -- cgit v1.1