From ef39d3e9d0f82338406eb391ce67076eb2611565 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Sun, 1 Dec 2013 03:15:22 +0000 Subject: Merging r195881: ------------------------------------------------------------------------ r195881 | tstellar | 2013-11-27 13:23:39 -0800 (Wed, 27 Nov 2013) | 3 lines R600: Expand vector FABS NOTE: This is a candidate for the 3.4 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196000 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/R600/fabs.ll | 36 ++++++++++++++++++++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) (limited to 'test/CodeGen') diff --git a/test/CodeGen/R600/fabs.ll b/test/CodeGen/R600/fabs.ll index 23ab468..a5f5df9 100644 --- a/test/CodeGen/R600/fabs.ll +++ b/test/CodeGen/R600/fabs.ll @@ -5,10 +5,10 @@ ; (fabs (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF)) ; unless isFabsFree returns true -; R600-CHECK: @fabs_free +; R600-CHECK-LABEL: @fabs_free ; R600-CHECK-NOT: AND ; R600-CHECK: |PV.{{[XYZW]}}| -; SI-CHECK: @fabs_free +; SI-CHECK-LABEL: @fabs_free ; SI-CHECK: V_ADD_F32_e64 v{{[0-9]}}, s{{[0-9]}}, 0, 1, 0, 0, 0 define void @fabs_free(float addrspace(1)* %out, i32 %in) { @@ -19,4 +19,36 @@ entry: ret void } +; R600-CHECK-LABEL: @fabs_v2 +; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| +; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| +; SI-CHECK-LABEL: @fabs_v2 +; SI-CHECK: V_ADD_F32_e64 v{{[0-9]}}, s{{[0-9]}}, 0, 1, 0, 0, 0 +; SI-CHECK: V_ADD_F32_e64 v{{[0-9]}}, s{{[0-9]}}, 0, 1, 0, 0, 0 +define void @fabs_v2(<2 x float> addrspace(1)* %out, <2 x float> %in) { +entry: + %0 = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in) + store <2 x float> %0, <2 x float> addrspace(1)* %out + ret void +} + +; R600-CHECK-LABEL: @fabs_v4 +; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| +; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| +; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| +; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| +; SI-CHECK-LABEL: @fabs_v4 +; SI-CHECK: V_ADD_F32_e64 v{{[0-9]}}, s{{[0-9]}}, 0, 1, 0, 0, 0 +; SI-CHECK: V_ADD_F32_e64 v{{[0-9]}}, s{{[0-9]}}, 0, 1, 0, 0, 0 +; SI-CHECK: V_ADD_F32_e64 v{{[0-9]}}, s{{[0-9]}}, 0, 1, 0, 0, 0 +; SI-CHECK: V_ADD_F32_e64 v{{[0-9]}}, s{{[0-9]}}, 0, 1, 0, 0, 0 +define void @fabs_v4(<4 x float> addrspace(1)* %out, <4 x float> %in) { +entry: + %0 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in) + store <4 x float> %0, <4 x float> addrspace(1)* %out + ret void +} + declare float @fabs(float ) readnone +declare <2 x float> @llvm.fabs.v2f32(<2 x float> ) readnone +declare <4 x float> @llvm.fabs.v4f32(<4 x float> ) readnone -- cgit v1.1