From b35ad41fef5d1edd9495f708fb7eae1a0a94ef9d Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Wed, 13 Oct 2010 19:56:10 +0000 Subject: Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116421 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/MC/ARM/simple-encoding.ll | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'test/MC/ARM/simple-encoding.ll') diff --git a/test/MC/ARM/simple-encoding.ll b/test/MC/ARM/simple-encoding.ll index 01e9c98..05ecb96 100644 --- a/test/MC/ARM/simple-encoding.ll +++ b/test/MC/ARM/simple-encoding.ll @@ -64,4 +64,14 @@ entry: %add = add nsw i64 %b, %a ret i64 %add } + +define i32 @f7(i32 %a, i32 %b) nounwind readnone optsize ssp { +entry: +; CHECK: f7 +; CHECK: uxtab r0, r0, r1 @ encoding: [0x71,0x00,0xe0,0xe6] + %and = and i32 %b, 255 + %add = add i32 %and, %a + ret i32 %add +} + declare void @llvm.trap() nounwind -- cgit v1.1