From 69dba7e20476ec0e64791e47b498ae3a69619f7d Mon Sep 17 00:00:00 2001 From: Jack Carter Date: Tue, 28 Aug 2012 19:07:39 +0000 Subject: Some instructions are passed to the assembler to be transformed to the final instruction variant. An example would be dsrll which is transformed into dsll32 if the shift value is greater than 32. For direct object output we need to do this transformation in the codegen. If the instruction was inside branch delay slot, it was being missed. This patch corrects this oversight. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162779 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/MC/Mips/mips64shift.ll | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'test/MC/Mips') diff --git a/test/MC/Mips/mips64shift.ll b/test/MC/Mips/mips64shift.ll index e1c1857..99cac7b 100644 --- a/test/MC/Mips/mips64shift.ll +++ b/test/MC/Mips/mips64shift.ll @@ -1,5 +1,8 @@ -; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler %s -o - | llvm-objdump -disassemble -triple mips64el - | FileCheck %s +; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler %s -o - \ +; RUN: | llvm-objdump -disassemble -triple mips64el - | FileCheck %s +; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - \ +; RUN: | llvm-objdump -disassemble -triple mips64el - | FileCheck %s define i64 @f3(i64 %a0) nounwind readnone { entry: -- cgit v1.1