From d2849572463da994c685b3bd7a60d5a7566c01e3 Mon Sep 17 00:00:00 2001 From: Ulrich Weigand Date: Fri, 21 Jun 2013 14:42:49 +0000 Subject: [PowerPC] Support @h modifier This adds necessary infrastructure to support the @h modifier. Note that all required relocation types were already present (and unused). This patch provides support for using @h in the assembler; it would also be possible to now use this feature in code generated by the compiler, but this is not done yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184548 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/MC/PowerPC/ppc64-fixup-apply.s | 9 +++++++-- test/MC/PowerPC/ppc64-fixups.s | 10 ++++++++++ 2 files changed, 17 insertions(+), 2 deletions(-) (limited to 'test/MC/PowerPC') diff --git a/test/MC/PowerPC/ppc64-fixup-apply.s b/test/MC/PowerPC/ppc64-fixup-apply.s index 565a8e9..50f74bf 100644 --- a/test/MC/PowerPC/ppc64-fixup-apply.s +++ b/test/MC/PowerPC/ppc64-fixup-apply.s @@ -33,6 +33,11 @@ addi 1, 1, 2f-1b@l addis 1, 1, 1b-2f@ha 2: +addi 1, 1, target6@h +addis 1, 1, target6@h + +.set target6, 0x4321fedc + .data .quad v1 @@ -54,7 +59,7 @@ addis 1, 1, 1b-2f@ha # CHECK-NEXT: ] # CHECK-NEXT: Address: 0x0 # CHECK-NEXT: Offset: -# CHECK-NEXT: Size: 40 +# CHECK-NEXT: Size: 48 # CHECK-NEXT: Link: 0 # CHECK-NEXT: Info: 0 # CHECK-NEXT: AddressAlignment: 4 @@ -62,7 +67,7 @@ addis 1, 1, 1b-2f@ha # CHECK-NEXT: SectionData ( # CHECK-NEXT: 0000: 38211234 3C211234 38215678 3C211234 # CHECK-NEXT: 0010: 38214444 3C211111 38218001 3C211001 -# CHECK-NEXT: 0020: 38210008 3C210000 +# CHECK-NEXT: 0020: 38210008 3C210000 38214321 3C214321 # CHECK-NEXT: ) # CHECK-NEXT: } diff --git a/test/MC/PowerPC/ppc64-fixups.s b/test/MC/PowerPC/ppc64-fixups.s index 38937c8..bb6c7be 100644 --- a/test/MC/PowerPC/ppc64-fixups.s +++ b/test/MC/PowerPC/ppc64-fixups.s @@ -47,6 +47,16 @@ # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0 lis 3, target +# CHECK: li 3, target@h # encoding: [0x38,0x60,A,A] +# CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0 + li 3, target@h + +# CHECK: lis 3, target@h # encoding: [0x3c,0x60,A,A] +# CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0 + lis 3, target@h + # CHECK: lwz 1, target@l(3) # encoding: [0x80,0x23,A,A] # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 -- cgit v1.1