From 4c5e43da7792f75567b693105cc53e3f1992ad98 Mon Sep 17 00:00:00 2001 From: Pirama Arumuga Nainar Date: Wed, 8 Apr 2015 08:55:49 -0700 Subject: Update aosp/master llvm for rebase to r233350 Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49 --- test/MC/AArch64/elf-globaladdress.ll | 8 +- test/MC/ARM/arm11-hint-instr.s | 69 + test/MC/ARM/basic-arm-instructions-v8.1a.s | 174 ++ test/MC/ARM/coff-debugging-secrel.ll | 12 +- test/MC/ARM/data-in-code.ll | 6 +- test/MC/ARM/directive-arch-armv6k.s | 34 + test/MC/ARM/elf-reloc-02.ll | 8 +- test/MC/ARM/elf-reloc-03.ll | 6 +- test/MC/ARM/thumb-diagnostics.s | 6 +- test/MC/AsmParser/ifeqs-diagnostics.s | 17 + test/MC/AsmParser/ifnes.s | 22 + test/MC/AsmParser/rename.s | 4 +- test/MC/COFF/global_ctors_dtors.ll | 6 +- test/MC/COFF/ir-to-imgrel.ll | 5 + test/MC/COFF/linker-options.ll | 0 test/MC/COFF/tricky-names.ll | 6 +- test/MC/Disassembler/ARM/armv8.1a.txt | 36 + test/MC/Disassembler/ARM/invalid-armv8.1a.txt | 83 + test/MC/Disassembler/ARM/invalid-thumbv8.1a.txt | 72 + test/MC/Disassembler/ARM/neont2.txt | 6 +- test/MC/Disassembler/ARM/thumb-v8.1a.txt | 98 + .../Disassembler/PowerPC/ppc64-encoding-bookII.txt | 22 +- .../MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt | 96 + test/MC/Disassembler/X86/avx-512.txt | 3 + test/MC/ELF/alias.s | 3 + test/MC/ELF/cfi-adjust-cfa-offset.s | 24 +- test/MC/ELF/cfi-version.ll | 14 +- test/MC/ELF/entsize.ll | 8 +- test/MC/ELF/gen-dwarf.s | 1 + test/MC/ELF/relocation-386.s | 9 + test/MC/ELF/relocation.s | 17 + test/MC/ELF/size.s | 15 + test/MC/ELF/weak-diff.s | 12 + test/MC/MachO/AArch64/cstexpr-gotpcrel.ll | 92 + test/MC/MachO/ARM/cstexpr-gotpcrel.ll | 74 + test/MC/MachO/cstexpr-gotpcrel-32.ll | 74 + test/MC/MachO/cstexpr-gotpcrel-64.ll | 86 + test/MC/MachO/tlv-bss.ll | 2 +- test/MC/MachO/x86-data-in-code.ll | 2 +- test/MC/Mips/elf-bigendian.ll | 6 +- test/MC/Mips/mips-abi-bad.s | 6 - test/MC/Mips/mips1/valid.s | 1 + test/MC/Mips/mips2/valid.s | 1 + test/MC/Mips/mips3/valid.s | 1 + test/MC/Mips/mips32/valid.s | 1 + test/MC/Mips/mips32r2/valid.s | 1 + test/MC/Mips/mips32r3/valid.s | 1 + test/MC/Mips/mips32r5/valid.s | 1 + test/MC/Mips/mips32r6/valid.s | 1 + test/MC/Mips/mips4/valid.s | 1 + test/MC/Mips/mips5/valid.s | 1 + test/MC/Mips/mips64/valid.s | 1 + test/MC/Mips/mips64r2/valid.s | 1 + test/MC/Mips/mips64r3/valid.s | 1 + test/MC/Mips/mips64r5/valid.s | 1 + test/MC/Mips/mips64r6/valid.s | 1 + test/MC/Mips/module-directive-bad.s | 262 +++ test/MC/Mips/sym-offset.ll | 2 +- test/MC/PowerPC/htm.s | 53 + test/MC/PowerPC/ppc64-encoding-bookII.s | 32 +- test/MC/PowerPC/ppc64-encoding-vmx.s | 123 +- test/MC/X86/cstexpr-gotpcrel.ll | 78 - test/MC/X86/expand-var.s | 18 + test/MC/X86/i386-darwin-frame-register.ll | 6 +- test/MC/X86/intel-syntax-avx512.s | 29 + test/MC/X86/invalid-sleb.s | 5 + test/MC/X86/x86-64-avx512bw.s | 261 +++ test/MC/X86/x86-64-avx512bw_vl.s | 520 +++++ test/MC/X86/x86-64-avx512f_vl.s | 2304 ++++++++++++++++++++ test/MC/X86/x86_64-avx-encoding.s | 4 + 70 files changed, 4800 insertions(+), 156 deletions(-) create mode 100644 test/MC/ARM/arm11-hint-instr.s create mode 100644 test/MC/ARM/basic-arm-instructions-v8.1a.s create mode 100644 test/MC/ARM/directive-arch-armv6k.s create mode 100644 test/MC/AsmParser/ifnes.s mode change 100755 => 100644 test/MC/COFF/linker-options.ll create mode 100644 test/MC/Disassembler/ARM/armv8.1a.txt create mode 100644 test/MC/Disassembler/ARM/invalid-armv8.1a.txt create mode 100644 test/MC/Disassembler/ARM/invalid-thumbv8.1a.txt create mode 100644 test/MC/Disassembler/ARM/thumb-v8.1a.txt create mode 100644 test/MC/ELF/size.s create mode 100644 test/MC/ELF/weak-diff.s create mode 100644 test/MC/MachO/AArch64/cstexpr-gotpcrel.ll create mode 100644 test/MC/MachO/ARM/cstexpr-gotpcrel.ll create mode 100644 test/MC/MachO/cstexpr-gotpcrel-32.ll create mode 100644 test/MC/MachO/cstexpr-gotpcrel-64.ll create mode 100644 test/MC/Mips/module-directive-bad.s create mode 100644 test/MC/PowerPC/htm.s delete mode 100644 test/MC/X86/cstexpr-gotpcrel.ll create mode 100644 test/MC/X86/expand-var.s create mode 100644 test/MC/X86/invalid-sleb.s (limited to 'test/MC') diff --git a/test/MC/AArch64/elf-globaladdress.ll b/test/MC/AArch64/elf-globaladdress.ll index 7d031e6..8e4ae4c 100644 --- a/test/MC/AArch64/elf-globaladdress.ll +++ b/test/MC/AArch64/elf-globaladdress.ll @@ -12,16 +12,16 @@ @var64 = global i64 0 define void @loadstore() { - %val8 = load i8* @var8 + %val8 = load i8, i8* @var8 store volatile i8 %val8, i8* @var8 - %val16 = load i16* @var16 + %val16 = load i16, i16* @var16 store volatile i16 %val16, i16* @var16 - %val32 = load i32* @var32 + %val32 = load i32, i32* @var32 store volatile i32 %val32, i32* @var32 - %val64 = load i64* @var64 + %val64 = load i64, i64* @var64 store volatile i64 %val64, i64* @var64 ret void diff --git a/test/MC/ARM/arm11-hint-instr.s b/test/MC/ARM/arm11-hint-instr.s new file mode 100644 index 0000000..6f5a374 --- /dev/null +++ b/test/MC/ARM/arm11-hint-instr.s @@ -0,0 +1,69 @@ +@ RUN: not llvm-mc -triple=armv6 -show-encoding < %s > %t1 2> %t2 +@ RUN: FileCheck --check-prefix=CHECK-V6 %s < %t1 +@ RUN: FileCheck --check-prefix=CHECK-ERROR-V6 %s < %t2 +@ RUN: llvm-mc -triple=armv6k -show-encoding < %s \ +@ RUN: | FileCheck --check-prefix=CHECK-ARM %s +@ RUN: llvm-mc -triple=armv6t2 -show-encoding < %s \ +@ RUN: | FileCheck --check-prefix=CHECK-ARM %s +@ RUN: llvm-mc -triple=thumb -mcpu=arm1156t2-s -show-encoding < %s \ +@ RUN: | FileCheck --check-prefix=CHECK-THUMB %s +@ RUN: llvm-mc -triple=armv6m -show-encoding < %s \ +@ RUN: | FileCheck --check-prefix=CHECK-V6M %s + + .syntax unified + +@------------------------------------------------------------------------------ +@ YIELD/WFE/WFI/SEV - are not supported pre v6K +@------------------------------------------------------------------------------ + nop + yield + wfe + wfi + sev + + +@------------------------------------------------------------------------------ +@ v6 using ARM encoding +@------------------------------------------------------------------------------ +@ CHECK-V6: mov r0, r0 @ encoding: [0x00,0x00,0xa0,0xe1] +@ CHECK-ERROR-V6: error: instruction requires: armv6k +@ CHECK-ERROR-V6: yield +@ CHECK-ERROR-V6: ^ +@ CHECK-ERROR-V6: error: instruction requires: armv6k +@ CHECK-ERROR-V6: wfe +@ CHECK-ERROR-V6: ^ +@ CHECK-ERROR-V6: error: instruction requires: armv6k +@ CHECK-ERROR-V6: wfi +@ CHECK-ERROR-V6: error: instruction requires: armv6k +@ CHECK-ERROR-V6: sev +@ CHECK-ERROR-V6: ^ + +@------------------------------------------------------------------------------ +@ v6K using ARM encoding +@------------------------------------------------------------------------------ +@------------------------------------------------------------------------------ +@ v6T2 using ARM encoding (arm triple) +@------------------------------------------------------------------------------ +@ CHECK-ARM: nop @ encoding: [0x00,0xf0,0x20,0xe3] +@ CHECK-ARM: yield @ encoding: [0x01,0xf0,0x20,0xe3] +@ CHECK-ARM: wfe @ encoding: [0x02,0xf0,0x20,0xe3] +@ CHECK-ARM: wfi @ encoding: [0x03,0xf0,0x20,0xe3] +@ CHECK-ARM: sev @ encoding: [0x04,0xf0,0x20,0xe3] + +@------------------------------------------------------------------------------ +@ v6T2 using THUMB encoding (thumb triple) +@------------------------------------------------------------------------------ +@ CHECK-THUMB: nop @ encoding: [0x00,0xbf] +@ CHECK-THUMB: yield @ encoding: [0x10,0xbf] +@ CHECK-THUMB: wfe @ encoding: [0x20,0xbf] +@ CHECK-THUMB: wfi @ encoding: [0x30,0xbf] +@ CHECK-THUMB: sev @ encoding: [0x40,0xbf] + +@------------------------------------------------------------------------------ +@ v6M using THUMB encoding +@------------------------------------------------------------------------------ +@ CHECK-V6M: nop @ encoding: [0x00,0xbf] +@ CHECK-V6M: yield @ encoding: [0x10,0xbf] +@ CHECK-V6M: wfe @ encoding: [0x20,0xbf] +@ CHECK-V6M: wfi @ encoding: [0x30,0xbf] +@ CHECK-V6M: sev @ encoding: [0x40,0xbf] diff --git a/test/MC/ARM/basic-arm-instructions-v8.1a.s b/test/MC/ARM/basic-arm-instructions-v8.1a.s new file mode 100644 index 0000000..f46057b6 --- /dev/null +++ b/test/MC/ARM/basic-arm-instructions-v8.1a.s @@ -0,0 +1,174 @@ +//RUN: not llvm-mc -triple thumb-none-linux-gnu -mattr=+v8.1a -mattr=neon -show-encoding < %s 2>%t | FileCheck %s --check-prefix=CHECK-V81aTHUMB +//RUN: FileCheck --check-prefix=CHECK-ERROR <%t %s +//RUN: not llvm-mc -triple arm-none-linux-gnu -mattr=+v8.1a -mattr=neon -show-encoding < %s 2>%t | FileCheck %s --check-prefix=CHECK-V81aARM +//RUN: FileCheck --check-prefix=CHECK-ERROR <%t %s + +//RUN: not llvm-mc -triple thumb-none-linux-gnu -mattr=+v8 -mattr=neon -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8 +//RUN: not llvm-mc -triple arm-none-linux-gnu -mattr=+v8 -mattr=neon -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8 + + + .text +//CHECK-V8THUMB: .text + + vqrdmlah.i8 q0, q1, q2 + vqrdmlah.u16 d0, d1, d2 + vqrdmlsh.f32 q3, q4, q5 + vqrdmlsh.f64 d3, d5, d5 + +//CHECK-ERROR: error: invalid operand for instruction +//CHECK-ERROR: vqrdmlah.i8 q0, q1, q2 +//CHECK-ERROR: ^ +//CHECK-ERROR: error: invalid operand for instruction +//CHECK-ERROR: vqrdmlah.u16 d0, d1, d2 +//CHECK-ERROR: ^ +//CHECK-ERROR: error: invalid operand for instruction +//CHECK-ERROR: vqrdmlsh.f32 q3, q4, q5 +//CHECK-ERROR: ^ +//CHECK-ERROR: error: invalid operand for instruction +//CHECK-ERROR: vqrdmlsh.f64 d3, d5, d5 +//CHECK-ERROR: ^ +//CHECK-V8: error: invalid operand for instruction +//CHECK-V8: vqrdmlah.i8 q0, q1, q2 +//CHECK-V8: ^ +//CHECK-V8: error: invalid operand for instruction +//CHECK-V8: vqrdmlah.u16 d0, d1, d2 +//CHECK-V8: ^ +//CHECK-V8: error: invalid operand for instruction +//CHECK-V8: vqrdmlsh.f32 q3, q4, q5 +//CHECK-V8: ^ +//CHECK-V8: error: invalid operand for instruction +//CHECK-V8 vqrdmlsh.f64 d3, d5, d5 +//CHECK-V8: ^ + + vqrdmlah.s16 d0, d1, d2 +//CHECK-V81aARM: vqrdmlah.s16 d0, d1, d2 @ encoding: [0x12,0x0b,0x11,0xf3] +//CHECK-V81aTHUMB: vqrdmlah.s16 d0, d1, d2 @ encoding: [0x11,0xff,0x12,0x0b] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlah.s16 d0, d1, d2 +//CHECK-V8: ^ + + vqrdmlah.s32 d0, d1, d2 +//CHECK-V81aARM: vqrdmlah.s32 d0, d1, d2 @ encoding: [0x12,0x0b,0x21,0xf3] +//CHECK-V81aTHUMB: vqrdmlah.s32 d0, d1, d2 @ encoding: [0x21,0xff,0x12,0x0b] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlah.s32 d0, d1, d2 +//CHECK-V8: ^ + + vqrdmlah.s16 q0, q1, q2 +//CHECK-V81aARM: vqrdmlah.s16 q0, q1, q2 @ encoding: [0x54,0x0b,0x12,0xf3] +//CHECK-V81aTHUMB: vqrdmlah.s16 q0, q1, q2 @ encoding: [0x12,0xff,0x54,0x0b] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlah.s16 q0, q1, q2 +//CHECK-V8: ^ + + vqrdmlah.s32 q2, q3, q0 +//CHECK-V81aARM: vqrdmlah.s32 q2, q3, q0 @ encoding: [0x50,0x4b,0x26,0xf3] +//CHECK-V81aTHUMB: vqrdmlah.s32 q2, q3, q0 @ encoding: [0x26,0xff,0x50,0x4b] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlah.s32 q2, q3, q0 +//CHECK-V8: ^ + + + vqrdmlsh.s16 d7, d6, d5 +//CHECK-V81aARM: vqrdmlsh.s16 d7, d6, d5 @ encoding: [0x15,0x7c,0x16,0xf3] +//CHECK-V81aTHUMB: vqrdmlsh.s16 d7, d6, d5 @ encoding: [0x16,0xff,0x15,0x7c] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlsh.s16 d7, d6, d5 +//CHECK-V8: ^ + + vqrdmlsh.s32 d0, d1, d2 +//CHECK-V81aARM: vqrdmlsh.s32 d0, d1, d2 @ encoding: [0x12,0x0c,0x21,0xf3] +//CHECK-V81aTHUMB: vqrdmlsh.s32 d0, d1, d2 @ encoding: [0x21,0xff,0x12,0x0c] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlsh.s32 d0, d1, d2 +//CHECK-V8: ^ + + vqrdmlsh.s16 q0, q1, q2 +//CHECK-V81aARM: vqrdmlsh.s16 q0, q1, q2 @ encoding: [0x54,0x0c,0x12,0xf3] +//CHECK-V81aTHUMB: vqrdmlsh.s16 q0, q1, q2 @ encoding: [0x12,0xff,0x54,0x0c] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlsh.s16 q0, q1, q2 +//CHECK-V8: ^ + + vqrdmlsh.s32 q3, q4, q5 +//CHECK-V81aARM: vqrdmlsh.s32 q3, q4, q5 @ encoding: [0x5a,0x6c,0x28,0xf3] +//CHECK-V81aTHUMB: vqrdmlsh.s32 q3, q4, q5 @ encoding: [0x28,0xff,0x5a,0x6c] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlsh.s32 q3, q4, q5 +//CHECK-V8: ^ + + + vqrdmlah.i8 q0, q1, d9[7] + vqrdmlah.u16 d0, d1, d2[3] + vqrdmlsh.f32 q3, q4, d5[1] + vqrdmlsh.f64 d3, d5, d5[0] + +//CHECK-ERROR: error: invalid operand for instruction +//CHECK-ERROR: vqrdmlah.i8 q0, q1, d9[7] +//CHECK-ERROR: ^ +//CHECK-ERROR: error: invalid operand for instruction +//CHECK-ERROR: vqrdmlah.u16 d0, d1, d2[3] +//CHECK-ERROR: ^ +//CHECK-ERROR: error: invalid operand for instruction +//CHECK-ERROR: vqrdmlsh.f32 q3, q4, d5[1] +//CHECK-ERROR: ^ +//CHECK-ERROR: error: invalid operand for instruction +//CHECK-ERROR: vqrdmlsh.f64 d3, d5, d5[0] +//CHECK-ERROR: ^ + + vqrdmlah.s16 d0, d1, d2[0] +//CHECK-V81aARM: vqrdmlah.s16 d0, d1, d2[0] @ encoding: [0x42,0x0e,0x91,0xf2] +//CHECK-V81aTHUMB: vqrdmlah.s16 d0, d1, d2[0] @ encoding: [0x91,0xef,0x42,0x0e] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlah.s16 d0, d1, d2[0] +//CHECK-V8: ^ + + vqrdmlah.s32 d0, d1, d2[0] +//CHECK-V81aARM: vqrdmlah.s32 d0, d1, d2[0] @ encoding: [0x42,0x0e,0xa1,0xf2] +//CHECK-V81aTHUMB: vqrdmlah.s32 d0, d1, d2[0] @ encoding: [0xa1,0xef,0x42,0x0e] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlah.s32 d0, d1, d2[0] +//CHECK-V8: ^ + + vqrdmlah.s16 q0, q1, d2[0] +//CHECK-V81aARM: vqrdmlah.s16 q0, q1, d2[0] @ encoding: [0x42,0x0e,0x92,0xf3] +//CHECK-V81aTHUMB: vqrdmlah.s16 q0, q1, d2[0] @ encoding: [0x92,0xff,0x42,0x0e] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlah.s16 q0, q1, d2[0] +//CHECK-V8: ^ + + vqrdmlah.s32 q0, q1, d2[0] +//CHECK-V81aARM: vqrdmlah.s32 q0, q1, d2[0] @ encoding: [0x42,0x0e,0xa2,0xf3] +//CHECK-V81aTHUMB: vqrdmlah.s32 q0, q1, d2[0] @ encoding: [0xa2,0xff,0x42,0x0e] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlah.s32 q0, q1, d2[0] +//CHECK-V8: ^ + + + vqrdmlsh.s16 d0, d1, d2[0] +//CHECK-V81aARM: vqrdmlsh.s16 d0, d1, d2[0] @ encoding: [0x42,0x0f,0x91,0xf2] +//CHECK-V81aTHUMB: vqrdmlsh.s16 d0, d1, d2[0] @ encoding: [0x91,0xef,0x42,0x0f] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlsh.s16 d0, d1, d2[0] +//CHECK-V8: ^ + + vqrdmlsh.s32 d0, d1, d2[0] +//CHECK-V81aARM: vqrdmlsh.s32 d0, d1, d2[0] @ encoding: [0x42,0x0f,0xa1,0xf2] +//CHECK-V81aTHUMB: vqrdmlsh.s32 d0, d1, d2[0] @ encoding: [0xa1,0xef,0x42,0x0f] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlsh.s32 d0, d1, d2[0] +//CHECK-V8: ^ + + vqrdmlsh.s16 q0, q1, d2[0] +//CHECK-V81aARM: vqrdmlsh.s16 q0, q1, d2[0] @ encoding: [0x42,0x0f,0x92,0xf3] +//CHECK-V81aTHUMB: vqrdmlsh.s16 q0, q1, d2[0] @ encoding: [0x92,0xff,0x42,0x0f] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlsh.s16 q0, q1, d2[0] +//CHECK-V8: ^ + + vqrdmlsh.s32 q0, q1, d2[0] +//CHECK-V81aARM: vqrdmlsh.s32 q0, q1, d2[0] @ encoding: [0x42,0x0f,0xa2,0xf3] +//CHECK-V81aTHUMB: vqrdmlsh.s32 q0, q1, d2[0] @ encoding: [0xa2,0xff,0x42,0x0f] +//CHECK-V8: error: instruction requires: v8.1a +//CHECK-V8: vqrdmlsh.s32 q0, q1, d2[0] +//CHECK-V8: ^ diff --git a/test/MC/ARM/coff-debugging-secrel.ll b/test/MC/ARM/coff-debugging-secrel.ll index 7323fc6..4f897e1 100644 --- a/test/MC/ARM/coff-debugging-secrel.ll +++ b/test/MC/ARM/coff-debugging-secrel.ll @@ -17,16 +17,16 @@ entry: !llvm.module.flags = !{!9, !10} !0 = !MDLocation(line: 1, scope: !1) -!1 = !{!"0x2e\00function\00function\00\001\000\001\000\006\000\000\001", !2, !3, !4, null, void ()* @function, null, null, !6} ; [ DW_TAG_subprogram ], [line 1], [def], [function] -!2 = !{!"/Users/compnerd/work/llvm/test/MC/ARM/reduced.c", !"/Users/compnerd/work/llvm"} -!3 = !{!"0x29", !2} ; [ DW_TAG_file_type] [/Users/compnerd/work/llvm/test/MC/ARM/reduced.c] -!4 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !5, null, null, null} ; [ DW_TAG_subroutine_type ], [line 0, size 0, align 0, offset 0] [from ] +!1 = !MDSubprogram(name: "function", line: 1, isLocal: false, isDefinition: true, virtualIndex: 6, isOptimized: false, scopeLine: 1, file: !2, scope: !3, type: !4, function: void ()* @function, variables: !6) +!2 = !MDFile(filename: "/Users/compnerd/work/llvm/test/MC/ARM/reduced.c", directory: "/Users/compnerd/work/llvm") +!3 = !MDFile(filename: "/Users/compnerd/work/llvm/test/MC/ARM/reduced.c", directory: "/Users/compnerd/work/llvm") +!4 = !MDSubroutineType(types: !5) !5 = !{null} !6 = !{} -!7 = !{!"0x11\0012\00clang version 3.5.0\000\00\000\00\001", !2, !6, !6, !8, !6, !6} ; [ DW_TAG_compile_unit ] [/Users/compnerd/work/llvm/test/MC/ARM/reduced.c] [DW_LANG_C99] +!7 = !MDCompileUnit(language: DW_LANG_C99, producer: "clang version 3.5.0", isOptimized: false, emissionKind: 1, file: !2, enums: !6, retainedTypes: !6, subprograms: !8, globals: !6, imports: !6) !8 = !{!1} !9 = !{i32 2, !"Dwarf Version", i32 4} -!10 = !{i32 1, !"Debug Info Version", i32 2} +!10 = !{i32 1, !"Debug Info Version", i32 3} ; CHECK-ITANIUM: Relocations [ ; CHECK-ITANIUM: Section {{.*}} .debug_info { diff --git a/test/MC/ARM/data-in-code.ll b/test/MC/ARM/data-in-code.ll index 3bb017d..724577b 100644 --- a/test/MC/ARM/data-in-code.ll +++ b/test/MC/ARM/data-in-code.ll @@ -1,8 +1,8 @@ -;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort \ +;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort=1 \ ;; RUN: -mtriple=armv7-linux-gnueabi -filetype=obj %s -o - | \ ;; RUN: llvm-readobj -t | FileCheck -check-prefix=ARM %s -;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort \ +;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort=1 \ ;; RUN: -mtriple=thumbv7-linux-gnueabi -filetype=obj %s -o - | \ ;; RUN: llvm-readobj -t | FileCheck -check-prefix=TMB %s @@ -10,7 +10,7 @@ ;; marking the data-in-code region. define void @foo(i32* %ptr) nounwind ssp { - %tmp = load i32* %ptr, align 4 + %tmp = load i32, i32* %ptr, align 4 switch i32 %tmp, label %default [ i32 11, label %bb0 i32 10, label %bb1 diff --git a/test/MC/ARM/directive-arch-armv6k.s b/test/MC/ARM/directive-arch-armv6k.s new file mode 100644 index 0000000..ee433fa --- /dev/null +++ b/test/MC/ARM/directive-arch-armv6k.s @@ -0,0 +1,34 @@ +@ Test the .arch directive for armv6k + +@ This test case will check the default .ARM.attributes value for the +@ armv6k architecture. + +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR + + .syntax unified + .arch armv6k + +@ CHECK-ASM: .arch armv6k + +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6K +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6K +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/elf-reloc-02.ll b/test/MC/ARM/elf-reloc-02.ll index 7eb49cc..8b4feba 100644 --- a/test/MC/ARM/elf-reloc-02.ll +++ b/test/MC/ARM/elf-reloc-02.ll @@ -29,10 +29,10 @@ declare void @myhextochar(i32 %n, i8* nocapture %buffer) nounwind define i32 @main() nounwind { entry: - %0 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 6) nounwind - %1 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([8 x i8]* @.str1, i32 0, i32 0), i32 7) nounwind - %2 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([13 x i8]* @.str2, i32 0, i32 0), i32 12) nounwind - %3 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([7 x i8]* @.str3, i32 0, i32 0), i32 6) nounwind + %0 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i32 6) nounwind + %1 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str1, i32 0, i32 0), i32 7) nounwind + %2 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str2, i32 0, i32 0), i32 12) nounwind + %3 = tail call i32 (...)* @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str3, i32 0, i32 0), i32 6) nounwind tail call void @exit(i32 55) noreturn nounwind unreachable } diff --git a/test/MC/ARM/elf-reloc-03.ll b/test/MC/ARM/elf-reloc-03.ll index ee5e59e..a0fdc3e 100644 --- a/test/MC/ARM/elf-reloc-03.ll +++ b/test/MC/ARM/elf-reloc-03.ll @@ -78,9 +78,9 @@ entry: define i32 @main() nounwind { entry: - %0 = load i32* @startval, align 4 - %1 = getelementptr inbounds [10 x i32 (...)*]* @vtable, i32 0, i32 %0 - %2 = load i32 (...)** %1, align 4 + %0 = load i32, i32* @startval, align 4 + %1 = getelementptr inbounds [10 x i32 (...)*], [10 x i32 (...)*]* @vtable, i32 0, i32 %0 + %2 = load i32 (...)*, i32 (...)** %1, align 4 %3 = tail call i32 (...)* %2() nounwind tail call void @exit(i32 %3) noreturn nounwind unreachable diff --git a/test/MC/ARM/thumb-diagnostics.s b/test/MC/ARM/thumb-diagnostics.s index bd26d06..5dcac90 100644 --- a/test/MC/ARM/thumb-diagnostics.s +++ b/test/MC/ARM/thumb-diagnostics.s @@ -235,13 +235,17 @@ error: invalid operand for instruction @ CHECK-ERRORS: error: branch target out of range @------------------------------------------------------------------------------ -@ WFE/WFI/YIELD - are not supported pre v6T2 +@ SEV/WFE/WFI/YIELD - are not supported pre v6M or v6T2 @------------------------------------------------------------------------------ + sev wfe wfi yield @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2 +@ CHECK-ERRORS: sev +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2 @ CHECK-ERRORS: wfe @ CHECK-ERRORS: ^ @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2 diff --git a/test/MC/AsmParser/ifeqs-diagnostics.s b/test/MC/AsmParser/ifeqs-diagnostics.s index 1e5e8c3..dcc43ff 100644 --- a/test/MC/AsmParser/ifeqs-diagnostics.s +++ b/test/MC/AsmParser/ifeqs-diagnostics.s @@ -20,3 +20,20 @@ // CHECK-NOT: error: unmatched .ifs or .elses +.ifnes + +// CHECK: error: expected string parameter for '.ifnes' directive +// CHECK: .ifnes +// CHECK: ^ + +.ifnes "string1" + +// CHECK: error: expected comma after first string for '.ifnes' directive +// CHECK: .ifnes "string1" +// CHECK: ^ + +.ifnes "string1", + +// CHECK: error: expected string parameter for '.ifnes' directive +// CHECK: .ifnes "string1", +// CHECK: ^ diff --git a/test/MC/AsmParser/ifnes.s b/test/MC/AsmParser/ifnes.s new file mode 100644 index 0000000..7a3cbe0 --- /dev/null +++ b/test/MC/AsmParser/ifnes.s @@ -0,0 +1,22 @@ +# RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + +# CHECK-NOT: .byte 0 +# CHECK: .byte 1 +.ifnes "foo space", "foo space" + .byte 0 +.else + .byte 1 +.endif + +# CHECK-NOT: .byte 0 +# CHECK: .byte 1 +.ifnes "unequal", "unEqual" + .byte 1 +.else + .byte 0 +.endif + +# CHECK-NOT: .byte 0 +# CHECK: .byte 1 +.ifnes "equal", "equal" ; .byte 0 ; .else ; .byte 1 ; .endif + diff --git a/test/MC/AsmParser/rename.s b/test/MC/AsmParser/rename.s index 934cee8..c794d8b 100644 --- a/test/MC/AsmParser/rename.s +++ b/test/MC/AsmParser/rename.s @@ -10,5 +10,5 @@ // CHECK: .size bar, .Ltmp0-bar // CHECK: .Ltmp01 // CHECK: .size foo, .Ltmp01-foo -// CHECK: .Ltmp02 -// CHECK: .size qux, .Ltmp02-qux +// CHECK: .Ltmp00 +// CHECK: .size qux, .Ltmp00-qux diff --git a/test/MC/COFF/global_ctors_dtors.ll b/test/MC/COFF/global_ctors_dtors.ll index be92c27..e8f4986 100644 --- a/test/MC/COFF/global_ctors_dtors.ll +++ b/test/MC/COFF/global_ctors_dtors.ll @@ -21,7 +21,7 @@ declare i32 @puts(i8*) define void @a_global_ctor() nounwind { - %1 = call i32 @puts(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0)) + %1 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i32 0, i32 0)) ret void } @@ -40,12 +40,12 @@ define void @c_global_ctor() nounwind { } define void @a_global_dtor() nounwind { - %1 = call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @.str2, i32 0, i32 0)) + %1 = call i32 @puts(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str2, i32 0, i32 0)) ret void } define i32 @main() nounwind { - %1 = call i32 @puts(i8* getelementptr inbounds ([5 x i8]* @.str3, i32 0, i32 0)) + %1 = call i32 @puts(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str3, i32 0, i32 0)) ret i32 0 } diff --git a/test/MC/COFF/ir-to-imgrel.ll b/test/MC/COFF/ir-to-imgrel.ll index dfc88b2..21198cf 100644 --- a/test/MC/COFF/ir-to-imgrel.ll +++ b/test/MC/COFF/ir-to-imgrel.ll @@ -4,3 +4,8 @@ ; X64: .quad "?x@@3HA"@IMGREL @"\01?x@@3HA" = global i64 sub nsw (i64 ptrtoint (i64* @"\01?x@@3HA" to i64), i64 ptrtoint (i8* @__ImageBase to i64)), align 8 + +declare void @f() + +; X64: .quad f@IMGREL +@fp = global i64 sub nsw (i64 ptrtoint (void ()* @f to i64), i64 ptrtoint (i8* @__ImageBase to i64)), align 8 diff --git a/test/MC/COFF/linker-options.ll b/test/MC/COFF/linker-options.ll old mode 100755 new mode 100644 diff --git a/test/MC/COFF/tricky-names.ll b/test/MC/COFF/tricky-names.ll index 458aa41..f34b76a 100644 --- a/test/MC/COFF/tricky-names.ll +++ b/test/MC/COFF/tricky-names.ll @@ -10,9 +10,9 @@ @"\01@foo.bar" = global i32 0 define weak i32 @"\01??_B?$num_put@_WV?$back_insert_iterator@V?$basic_string@_WU?$char_traits@_W@std@@V?$allocator@_W@2@@std@@@std@@@std@@51"() section ".text" { - %a = load i32* @"\01??__E_Generic_object@?$_Error_objects@H@std@@YAXXZ" - %b = load i32* @"\01__ZL16ExceptionHandlerP19_EXCEPTION_POINTERS@4" - %c = load i32* @"\01@foo.bar" + %a = load i32, i32* @"\01??__E_Generic_object@?$_Error_objects@H@std@@YAXXZ" + %b = load i32, i32* @"\01__ZL16ExceptionHandlerP19_EXCEPTION_POINTERS@4" + %c = load i32, i32* @"\01@foo.bar" %x = add i32 %a, %b %y = add i32 %x, %c ret i32 %y diff --git a/test/MC/Disassembler/ARM/armv8.1a.txt b/test/MC/Disassembler/ARM/armv8.1a.txt new file mode 100644 index 0000000..de0c89e --- /dev/null +++ b/test/MC/Disassembler/ARM/armv8.1a.txt @@ -0,0 +1,36 @@ +# RUN: llvm-mc -triple armv8 -mattr=+v8.1a --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V81a +# RUN: not llvm-mc -triple armv8 -mattr=+v8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8 + +[0x54,0x0b,0x12,0xf3] +[0x12,0x0b,0x21,0xf3] +[0x54,0x0c,0x12,0xf3] +[0x12,0x0c,0x21,0xf3] +# CHECK-V81a: vqrdmlah.s16 q0, q1, q2 +# CHECK-V81a: vqrdmlah.s32 d0, d1, d2 +# CHECK-V81a: vqrdmlsh.s16 q0, q1, q2 +# CHECK-V81a: vqrdmlsh.s32 d0, d1, d2 +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x54,0x0b,0x12,0xf3] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x12,0x0b,0x21,0xf3] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x54,0x0c,0x12,0xf3] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x12,0x0c,0x21,0xf3] + +[0x42,0x0e,0x92,0xf3] +[0x42,0x0e,0xa1,0xf2] +[0x42,0x0f,0x92,0xf3] +[0x42,0x0f,0xa1,0xf2] +# CHECK-V81a: vqrdmlah.s16 q0, q1, d2[0] +# CHECK-V81a: vqrdmlah.s32 d0, d1, d2[0] +# CHECK-V81a: vqrdmlsh.s16 q0, q1, d2[0] +# CHECK-V81a: vqrdmlsh.s32 d0, d1, d2[0] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x42,0x0e,0x92,0xf3] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x42,0x0e,0xa1,0xf2] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x42,0x0f,0x92,0xf3] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x42,0x0f,0xa1,0xf2] diff --git a/test/MC/Disassembler/ARM/invalid-armv8.1a.txt b/test/MC/Disassembler/ARM/invalid-armv8.1a.txt new file mode 100644 index 0000000..1a9f275 --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-armv8.1a.txt @@ -0,0 +1,83 @@ +# RUN: not llvm-mc -triple armv8 -mattr=+v8.1a --disassemble < %s 2>&1 | FileCheck %s + +# Check, if sizes 00 and 11 are undefined for RDMA +[0x12,0x0b,0x01,0xf3] # vqrdmlah.s8 d0, d1, d2 +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x12,0x0b,0x01,0xf3] # vqrdmlah.s8 d0, d1, d2 +# CHECK-NEXT: ^ + +[0x12,0x0b,0x31,0xf3] # vqrdmlah.s64 d0, d1, d2 +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x12,0x0b,0x31,0xf3] # vqrdmlah.s64 d0, d1, d2 +# CHECK-NEXT: ^ + +[0x54,0x0b,0x02,0xf3] # vqrdmlah.s8 q0, q1, q2 +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x54,0x0b,0x02,0xf3] # vqrdmlah.s8 q0, q1, q2 +# CHECK-NEXT: ^ + +[0x54,0x0b,0x32,0xf3] # vqrdmlah.s64 q2, q3, q0 +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x54,0x0b,0x32,0xf3] # vqrdmlah.s64 q2, q3, q0 +# CHECK-NEXT: ^ + +[0x15,0x7c,0x06,0xf3] # vqrdmlsh.s8 d0, d1, d2 +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x15,0x7c,0x06,0xf3] # vqrdmlsh.s8 d0, d1, d2 +# CHECK-NEXT: ^ + +[0x15,0x7c,0x36,0xf3] # vqrdmlsh.s64 d0, d1, d2 +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x15,0x7c,0x36,0xf3] # vqrdmlsh.s64 d0, d1, d2 +# CHECK-NEXT: ^ + +[0x54,0x0c,0x02,0xf3] # vqrdmlsh.s8 q0, q1, q2 +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x54,0x0c,0x02,0xf3] # vqrdmlsh.s8 q0, q1, q2 +# CHECK-NEXT: ^ + +[0x54,0x0c,0x32,0xf3] # vqrdmlsh.s64 q0, q1, q2 +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x54,0x0c,0x32,0xf3] # vqrdmlsh.s64 q0, q1, q2 +# CHECK-NEXT: ^ + +[0x42,0x0e,0x81,0xf2] # vqrdmlah.s8 d0, d1, d2[0] +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x42,0x0e,0x81,0xf2] # vqrdmlah.s8 d0, d1, d2[0] +# CHECK-NEXT: ^ + +[0x42,0x0e,0xb1,0xf2] # vqrdmlah.s64 d0, d1, d2[0] +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x42,0x0e,0xb1,0xf2] # vqrdmlah.s64 d0, d1, d2[0] +# CHECK-NEXT: ^ + +[0x42,0x0e,0x82,0xf3] # vqrdmlah.s8 q0, q1, d2[0] +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x42,0x0e,0x82,0xf3] # vqrdmlah.s8 q0, q1, d2[0] +# CHECK-NEXT: ^ + +[0x42,0x0e,0xb2,0xf3] # vqrdmlah.s64 q0, q1, d2[0] +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x42,0x0e,0xb2,0xf3] # vqrdmlah.s64 q0, q1, d2[0] +# CHECK-NEXT: ^ + + +[0x42,0x0f,0x81,0xf2] # vqrdmlsh.s8 d0, d1, d2[0] +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x42,0x0f,0x81,0xf2] # vqrdmlsh.s8 d0, d1, d2[0] +# CHECK-NEXT: ^ + +[0x42,0x0f,0xb1,0xf2] # vqrdmlsh.s64 d0, d1, d2[0] +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x42,0x0f,0xb1,0xf2] # vqrdmlsh.s64 d0, d1, d2[0] +# CHECK-NEXT: ^ + +[0x42,0x0f,0x82,0xf3] # vqrdmlsh.s8 q0, q1, d2[0] +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x42,0x0f,0x82,0xf3] # vqrdmlsh.s8 q0, q1, d2[0] +# CHECK-NEXT: ^ + +[0x42,0x0f,0xb2,0xf3] # vqrdmlsh.s64 q0, q1, d2[0] +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x42,0x0f,0xb2,0xf3] # vqrdmlsh.s64 q0, q1, d2[0] +# CHECK-NEXT: ^ diff --git a/test/MC/Disassembler/ARM/invalid-thumbv8.1a.txt b/test/MC/Disassembler/ARM/invalid-thumbv8.1a.txt new file mode 100644 index 0000000..555b8c3 --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-thumbv8.1a.txt @@ -0,0 +1,72 @@ +# RUN: not llvm-mc -triple thumbv8 -mattr=+v8.1a --disassemble < %s 2>&1 | FileCheck %s + +# Check, if sizes 00 and 11 are undefined for RDMA +[0x01,0xff,0x12,0x0b] # vqrdmlah.s8 d0, d1, d2 +[0x31,0xff,0x12,0x0b] # vqrdmlah.s64 d0, d1, d2 +[0x02,0xff,0x54,0x0b] # vqrdmlah.s8 q0, q1, q2 +[0x06,0xff,0x50,0x4b] # vqrdmlah.s64 q2, q3, q0 + +[0x01,0xff,0x12,0x0c] # vqrdmlsh.s8 d0, d1, d2 +[0x31,0xff,0x12,0x0c] # vqrdmlsh.s64 d0, d1, d2 +[0x02,0xff,0x54,0x0c] # vqrdmlsh.s8 q0, q1, q2 +[0x32,0xff,0x54,0x0c] # vqrdmlsh.s64 q0, q1, q2 + +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x01,0xff,0x12,0x0b] # vqrdmlah.s8 d0, d1, d2 +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x31,0xff,0x12,0x0b] # vqrdmlah.s64 d0, d1, d2 +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x02,0xff,0x54,0x0b] # vqrdmlah.s8 q0, q1, q2 +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x06,0xff,0x50,0x4b] # vqrdmlah.s64 q2, q3, q0 +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x01,0xff,0x12,0x0c] # vqrdmlsh.s8 d0, d1, d2 +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x31,0xff,0x12,0x0c] # vqrdmlsh.s64 d0, d1, d2 +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x02,0xff,0x54,0x0c] # vqrdmlsh.s8 q0, q1, q2 +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x32,0xff,0x54,0x0c] # vqrdmlsh.s64 q0, q1, q2 +# CHECK-NEXT: ^ + +[0x81,0xef,0x42,0x0e] # vqrdmlah.s8 d0, d1, d2[0] +[0xb1,0xef,0x42,0x0e] # vqrdmlah.s64 d0, d1, d2[0] +[0x82,0xff,0x42,0x0e] # vqrdmlah.s8 q0, q1, d2[0] +[0xb2,0xff,0x42,0x0e] # vqrdmlah.s64 q0, q1, d2[0] + +[0x81,0xef,0x42,0x0f] # vqrdmlsh.s8 d0, d1, d2[0] +[0xb1,0xef,0x42,0x0f] # vqrdmlsh.s64 d0, d1, d2[0] +[0x82,0xff,0x42,0x0f] # vqrdmlsh.s8 q0, q1, d2[0] +[0xb2,0xff,0x42,0x0f] # vqrdmlsh.s64 q0, q1, d2[0] + +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x81,0xef,0x42,0x0e] # vqrdmlah.s8 d0, d1, d2[0] +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0xb1,0xef,0x42,0x0e] # vqrdmlah.s64 d0, d1, d2[0] +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x82,0xff,0x42,0x0e] # vqrdmlah.s8 q0, q1, d2[0] +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0xb2,0xff,0x42,0x0e] # vqrdmlah.s64 q0, q1, d2[0] +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x81,0xef,0x42,0x0f] # vqrdmlsh.s8 d0, d1, d2[0] +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0xb1,0xef,0x42,0x0f] # vqrdmlsh.s64 d0, d1, d2[0] +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0x82,0xff,0x42,0x0f] # vqrdmlsh.s8 q0, q1, d2[0] +# CHECK-NEXT: ^ +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: [0xb2,0xff,0x42,0x0f] # vqrdmlsh.s64 q0, q1, d2[0] +# CHECK-NEXT: ^ diff --git a/test/MC/Disassembler/ARM/neont2.txt b/test/MC/Disassembler/ARM/neont2.txt index e493fba..536095f 100644 --- a/test/MC/Disassembler/ARM/neont2.txt +++ b/test/MC/Disassembler/ARM/neont2.txt @@ -1631,11 +1631,11 @@ # rdar://10798451 0xe7 0xf9 0x32 0x1d -# CHECK vld2.8 {d17[], d19[]}, [r7:16], r2 +# CHECK: vld2.8 {d17[], d19[]}, [r7:16], r2 0xe7 0xf9 0x3d 0x1d -# CHECK vld2.8 {d17[], d19[]}, [r7:16]! +# CHECK: vld2.8 {d17[], d19[]}, [r7:16]! 0xe7 0xf9 0x3f 0x1d -# CHECK vld2.8 {d17[], d19[]}, [r7:16] +# CHECK: vld2.8 {d17[], d19[]}, [r7:16] # rdar://11034702 0x04 0xf9 0x0d 0x87 diff --git a/test/MC/Disassembler/ARM/thumb-v8.1a.txt b/test/MC/Disassembler/ARM/thumb-v8.1a.txt new file mode 100644 index 0000000..10fea46 --- /dev/null +++ b/test/MC/Disassembler/ARM/thumb-v8.1a.txt @@ -0,0 +1,98 @@ +# RUN: llvm-mc -triple thumbv8 -mattr=+v8.1a --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V81a +# RUN: not llvm-mc -triple thumbv8 -mattr=+v8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8 + +[0x11,0xff,0x12,0x0b] +# CHECK-V81a: vqrdmlah.s16 d0, d1, d2 +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x11,0xff,0x12,0x0b] +# CHECK-V8: ^ + +[0x21,0xff,0x12,0x0b] +# CHECK-V81a: vqrdmlah.s32 d0, d1, d2 +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x21,0xff,0x12,0x0b] +# CHECK-V8: ^ + +[0x12,0xff,0x54,0x0b] +# CHECK-V81a: vqrdmlah.s16 q0, q1, q2 +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x12,0xff,0x54,0x0b] +# CHECK-V8: ^ + +[0x26,0xff,0x50,0x4b] +# CHECK-V81a: vqrdmlah.s32 q2, q3, q0 +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x26,0xff,0x50,0x4b] +# CHECK-V8: ^ + +[0x16,0xff,0x15,0x7c] +# CHECK-V81a: vqrdmlsh.s16 d7, d6, d5 +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x16,0xff,0x15,0x7c] +# CHECK-V8: ^ + +[0x21,0xff,0x12,0x0c] +# CHECK-V81a: vqrdmlsh.s32 d0, d1, d2 +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x21,0xff,0x12,0x0c] +# CHECK-V8: ^ + +[0x12,0xff,0x54,0x0c] +# CHECK-V81a: vqrdmlsh.s16 q0, q1, q2 +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x12,0xff,0x54,0x0c] +# CHECK-V8: ^ + +[0x28,0xff,0x5a,0x6c] +# CHECK-V81a: vqrdmlsh.s32 q3, q4, q5 +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x28,0xff,0x5a,0x6c] +# CHECK-V8: ^ + +[0x91,0xef,0x42,0x0e] +# CHECK-V81a: vqrdmlah.s16 d0, d1, d2[0] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x91,0xef,0x42,0x0e] +# CHECK-V8: ^ + +[0xa1,0xef,0x42,0x0e] +# CHECK-V81a: vqrdmlah.s32 d0, d1, d2[0] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0xa1,0xef,0x42,0x0e] +# CHECK-V8: ^ + +[0x92,0xff,0x42,0x0e] +# CHECK-V81a: vqrdmlah.s16 q0, q1, d2[0] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x92,0xff,0x42,0x0e] +# CHECK-V8: ^ + +[0xa2,0xff,0x42,0x0e] +# CHECK-V81a: vqrdmlah.s32 q0, q1, d2[0] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0xa2,0xff,0x42,0x0e] +# CHECK-V8: ^ + +[0x91,0xef,0x42,0x0f] +# CHECK-V81a: vqrdmlsh.s16 d0, d1, d2[0] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x91,0xef,0x42,0x0f] +# CHECK-V8: ^ + +[0xa1,0xef,0x42,0x0f] +# CHECK-V81a: vqrdmlsh.s32 d0, d1, d2[0] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0xa1,0xef,0x42,0x0f] +# CHECK-V8: ^ + +[0x92,0xff,0x42,0x0f] +# CHECK-V81a: vqrdmlsh.s16 q0, q1, d2[0] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0x92,0xff,0x42,0x0f] +# CHECK-V8: ^ + +[0xa2,0xff,0x42,0x0f] +# CHECK-V81a: vqrdmlsh.s32 q0, q1, d2[0] +# CHECK-V8: warning: invalid instruction encoding +# CHECK-V8: [0xa2,0xff,0x42,0x0f] +# CHECK-V8: ^ diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt index 7a30b5c..9d63bdd 100644 --- a/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt @@ -42,12 +42,30 @@ # CHECK: dcbf 2, 3 0x7c 0x02 0x18 0xac -# CHECK: lwarx 2, 3, 4 +# CHECK: lbarx 2, 3, 4 +0x7c 0x43 0x20 0x68 + +# CHECK: lharx 2, 3, 4 +0x7c 0x43 0x20 0xe8 + +# CHECK: lwarx 2, 3, 4 0x7c 0x43 0x20 0x28 -# CHECK: ldarx 2, 3, 4 +# CHECK: ldarx 2, 3, 4 0x7c 0x43 0x20 0xa8 +# CHECK: lbarx 2, 3, 4, 1 +0x7c 0x43 0x20 0x69 + +# CHECK: lharx 2, 3, 4, 1 +0x7c 0x43 0x20 0xe9 + +# CHECK: lwarx 2, 3, 4, 1 +0x7c 0x43 0x20 0x29 + +# CHECK: ldarx 2, 3, 4, 1 +0x7c 0x43 0x20 0xa9 + # CHECK: sync 0 0x7c 0x00 0x04 0xac diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt index fe62fdf..4424d69 100644 --- a/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt @@ -120,6 +120,42 @@ # CHECK: vperm 2, 3, 4, 5 0x10 0x43 0x21 0x6b +# CHECK: vpermxor 2, 3, 4, 5 +0x10 0x43 0x21 0x6d + +# CHECK: vsbox 2, 5 +0x10 0x45 0x05 0xc8 + +# CHECK: vcipher 2, 5, 17 +0x10 0x45 0x8d 0x08 + +# CHECK: vcipherlast 2, 5, 17 +0x10 0x45 0x8d 0x09 + +# CHECK: vncipher 2, 5, 17 +0x10,0x45,0x8d,0x48 + +# CHECK: vncipherlast 2, 5, 17 +0x10,0x45,0x8d,0x49 + +# CHECK: vpmsumb 2, 5, 17 +0x10 0x45 0x8c 0x08 + +# CHECK: vpmsumh 2, 5, 17 +0x10 0x45 0x8c 0x48 + +# CHECK: vpmsumw 2, 5, 17 +0x10 0x45 0x8c 0x88 + +# CHECK: vpmsumd 2, 5, 17 +0x10 0x45 0x8c 0xc8 + +# CHECK: vshasigmaw 2, 3, 0, 11 +0x10 0x43 0x5e 0x82 + +# CHECK: vshasigmad 2, 3, 1, 15 +0x10 0x43 0xfe 0xc2 + # CHECK: vsel 2, 3, 4, 5 0x10 0x43 0x21 0x6a @@ -159,6 +195,9 @@ # CHECK: vadduwm 2, 3, 4 0x10 0x43 0x20 0x80 +# CHECK: vaddudm 2, 3, 4 +0x10 0x43 0x20 0xc0 + # CHECK: vaddubs 2, 3, 4 0x10 0x43 0x22 0x00 @@ -189,6 +228,9 @@ # CHECK: vsubuwm 2, 3, 4 0x10 0x43 0x24 0x80 +# CHECK: vsubudm 2, 3, 4 +0x10 0x43 0x24 0xc0 + # CHECK: vsububs 2, 3, 4 0x10 0x43 0x26 0x00 @@ -204,24 +246,39 @@ # CHECK: vmulesh 2, 3, 4 0x10 0x43 0x23 0x48 +# CHECK: vmulesw 2, 3, 4 +0x10 0x43 0x23 0x88 + # CHECK: vmuleub 2, 3, 4 0x10 0x43 0x22 0x08 # CHECK: vmuleuh 2, 3, 4 0x10 0x43 0x22 0x48 +# CHECK: vmuleuw 2, 3, 4 +0x10 0x43 0x22 0x88 + # CHECK: vmulosb 2, 3, 4 0x10 0x43 0x21 0x08 # CHECK: vmulosh 2, 3, 4 0x10 0x43 0x21 0x48 +# CHECK: vmulosw 2, 3, 4 +0x10 0x43 0x21 0x88 + # CHECK: vmuloub 2, 3, 4 0x10 0x43 0x20 0x08 # CHECK: vmulouh 2, 3, 4 0x10 0x43 0x20 0x48 +# CHECK: vmulouw 2, 3, 4 +0x10 0x43 0x20 0x88 + +# CHECK: vmuluwm 2, 3, 4 +0x10 0x43 0x20 0x89 + # CHECK: vmhaddshs 2, 3, 4, 5 0x10 0x43 0x21 0x60 @@ -291,6 +348,9 @@ # CHECK: vmaxsw 2, 3, 4 0x10 0x43 0x21 0x82 +# CHECK: vmaxsd 2, 3, 4 +0x10 0x43 0x21 0xc2 + # CHECK: vmaxub 2, 3, 4 0x10 0x43 0x20 0x02 @@ -300,6 +360,9 @@ # CHECK: vmaxuw 2, 3, 4 0x10 0x43 0x20 0x82 +# CHECK: vmaxud 2, 3, 4 +0x10 0x43 0x20 0xc2 + # CHECK: vminsb 2, 3, 4 0x10 0x43 0x23 0x02 @@ -309,6 +372,9 @@ # CHECK: vminsw 2, 3, 4 0x10 0x43 0x23 0x82 +# CHECK: vminsd 2, 3, 4 +0x10 0x43 0x23 0xc2 + # CHECK: vminub 2, 3, 4 0x10 0x43 0x22 0x02 @@ -318,6 +384,9 @@ # CHECK: vminuw 2, 3, 4 0x10 0x43 0x22 0x82 +# CHECK: vminud 2, 3, 4 +0x10 0x43 0x22 0xc2 + # CHECK: vcmpequb 2, 3, 4 0x10 0x43 0x20 0x06 @@ -336,6 +405,12 @@ # CHECK: vcmpequw. 2, 3, 4 0x10 0x43 0x24 0x86 +# CHECK: vcmpequd 2, 3, 4 +0x10 0x43 0x20 0xc7 + +# CHECK: vcmpequd. 2, 3, 4 +0x10 0x43 0x24 0xc7 + # CHECK: vcmpgtsb 2, 3, 4 0x10 0x43 0x23 0x06 @@ -354,6 +429,12 @@ # CHECK: vcmpgtsw. 2, 3, 4 0x10 0x43 0x27 0x86 +# CHECK: vcmpgtsd 2, 3, 4 +0x10 0x43 0x23 0xc7 + +# CHECK: vcmpgtsd. 2, 3, 4 +0x10 0x43 0x27 0xc7 + # CHECK: vcmpgtub 2, 3, 4 0x10 0x43 0x22 0x06 @@ -372,6 +453,12 @@ # CHECK: vcmpgtuw. 2, 3, 4 0x10 0x43 0x26 0x86 +# CHECK: vcmpgtud 2, 3, 4 +0x10 0x43 0x22 0xc7 + +# CHECK: vcmpgtud. 2, 3, 4 +0x10 0x43 0x26 0xc7 + # CHECK: vand 2, 3, 4 0x10 0x43 0x24 0x04 @@ -414,6 +501,9 @@ # CHECK: vslw 2, 3, 4 0x10 0x43 0x21 0x84 +# CHECK: vrld 2, 3, 4 +0x10 0x43 0x20 0xc4 + # CHECK: vsrb 2, 3, 4 0x10 0x43 0x22 0x04 @@ -423,6 +513,9 @@ # CHECK: vsrw 2, 3, 4 0x10 0x43 0x22 0x84 +# CHECK: vsrd 2, 3, 4 +0x10 0x43 0x26 0xc4 + # CHECK: vsrab 2, 3, 4 0x10 0x43 0x23 0x04 @@ -432,6 +525,9 @@ # CHECK: vsraw 2, 3, 4 0x10 0x43 0x23 0x84 +# CHECK: vsrad 2, 3, 4 +0x10 0x43 0x23 0xc4 + # CHECK: vaddfp 2, 3, 4 0x10 0x43 0x20 0x0a diff --git a/test/MC/Disassembler/X86/avx-512.txt b/test/MC/Disassembler/X86/avx-512.txt index d24a68d..cfe5ffd 100644 --- a/test/MC/Disassembler/X86/avx-512.txt +++ b/test/MC/Disassembler/X86/avx-512.txt @@ -136,3 +136,6 @@ # CHECK: vpcmpd $8, %zmm10, %zmm25, %k5 0x62 0xd3 0x35 0x40 0x1f 0xea 0x8 + +# CHECK: vcmppd {sae}, $127, %zmm27, %zmm11, %k4 +0x62 0x91 0xa5 0x58 0xc2 0xe3 0x7f diff --git a/test/MC/ELF/alias.s b/test/MC/ELF/alias.s index 8e13182..78df737 100644 --- a/test/MC/ELF/alias.s +++ b/test/MC/ELF/alias.s @@ -99,12 +99,15 @@ bar6: // CHECK-NEXT: } // CHECK-NEXT: Symbol { // CHECK-NEXT: Name: .text (0) +// CHECK-NOT: Symbol { // CHECK: } // CHECK-NEXT: Symbol { // CHECK-NEXT: Name: .data (0) +// CHECK-NOT: Symbol { // CHECK: } // CHECK-NEXT: Symbol { // CHECK-NEXT: Name: .bss (0) +// CHECK-NOT: Symbol { // CHECK: } // CHECK-NEXT: Symbol { // CHECK-NEXT: Name: bar3 diff --git a/test/MC/ELF/cfi-adjust-cfa-offset.s b/test/MC/ELF/cfi-adjust-cfa-offset.s index 9d639f7..200f897 100644 --- a/test/MC/ELF/cfi-adjust-cfa-offset.s +++ b/test/MC/ELF/cfi-adjust-cfa-offset.s @@ -11,6 +11,16 @@ f: ret .cfi_endproc + .cfi_startproc + nop + .cfi_adjust_cfa_offset 4 + .cfi_endproc + + .cfi_startproc + nop + .cfi_adjust_cfa_offset 4 + .cfi_endproc + // CHECK: Section { // CHECK: Index: 4 // CHECK-NEXT: Name: .eh_frame @@ -20,7 +30,7 @@ f: // CHECK-NEXT: ] // CHECK-NEXT: Address: 0x0 // CHECK-NEXT: Offset: 0x50 -// CHECK-NEXT: Size: 56 +// CHECK-NEXT: Size: 96 // CHECK-NEXT: Link: 0 // CHECK-NEXT: Info: 0 // CHECK-NEXT: AddressAlignment: 8 @@ -29,9 +39,11 @@ f: // CHECK-NEXT: ] // CHECK-NEXT: SectionData ( // CHECK-NEXT: 0000: 14000000 00000000 037A5200 01781001 -// CHECK-NEXT: 0010: 1B0C0708 90010000 1C000000 1C000000 +// CHECK-NEXT: 0010: 1B0C0708 90010000 18000000 1C000000 // CHECK-NEXT: 0020: 00000000 0A000000 00440E10 410E1444 -// CHECK-NEXT: 0030: 0E080000 00000000 +// CHECK-NEXT: 0030: 0E080000 10000000 38000000 00000000 +// CHECK-NEXT: 0040: 01000000 00410E0C 14000000 4C000000 +// CHECK-NEXT: 0050: 00000000 01000000 00410E0C 00000000 // CHECK-NEXT: ) // CHECK-NEXT: } // CHECK-NEXT: Section { @@ -41,13 +53,15 @@ f: // CHECK-NEXT: Flags [ // CHECK-NEXT: ] // CHECK-NEXT: Address: 0x0 -// CHECK-NEXT: Offset: 0x3A0 -// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Offset: 0x3C8 +// CHECK-NEXT: Size: 72 // CHECK-NEXT: Link: 7 // CHECK-NEXT: Info: 4 // CHECK-NEXT: AddressAlignment: 8 // CHECK-NEXT: EntrySize: 24 // CHECK-NEXT: Relocations [ // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: 0x3C R_X86_64_PC32 .text 0x +// CHECK-NEXT: 0x50 R_X86_64_PC32 .text 0x // CHECK-NEXT: ] // CHECK: } diff --git a/test/MC/ELF/cfi-version.ll b/test/MC/ELF/cfi-version.ll index c8a9978..2f34b2a 100644 --- a/test/MC/ELF/cfi-version.ll +++ b/test/MC/ELF/cfi-version.ll @@ -22,17 +22,17 @@ attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "n !llvm.module.flags = !{!9, !10} !llvm.ident = !{!11} -!0 = !{!"0x11\0012\00clang version 3.5.0 \000\00\000\00\001", !1, !2, !2, !3, !2, !2} ; [ DW_TAG_compile_unit ] [/tmp/test.c] [DW_LANG_C99] -!1 = !{!"test.c", !"/tmp"} +!0 = !MDCompileUnit(language: DW_LANG_C99, producer: "clang version 3.5.0 ", isOptimized: false, emissionKind: 1, file: !1, enums: !2, retainedTypes: !2, subprograms: !3, globals: !2, imports: !2) +!1 = !MDFile(filename: "test.c", directory: "/tmp") !2 = !{} !3 = !{!4} -!4 = !{!"0x2e\00foo\00foo\00\002\000\001\000\006\00256\000\002", !1, !5, !6, null, i32 ()* @foo, null, null, !2} ; [ DW_TAG_subprogram ] [line 2] [def] [foo] -!5 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [/tmp/test.c] -!6 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !7, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!4 = !MDSubprogram(name: "foo", line: 2, isLocal: false, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, scopeLine: 2, file: !1, scope: !5, type: !6, function: i32 ()* @foo, variables: !2) +!5 = !MDFile(filename: "test.c", directory: "/tmp") +!6 = !MDSubroutineType(types: !7) !7 = !{!8} -!8 = !{!"0x24\00int\000\0032\0032\000\000\005", null, null} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!8 = !MDBasicType(tag: DW_TAG_base_type, name: "int", size: 32, align: 32, encoding: DW_ATE_signed) !9 = !{i32 2, !"Dwarf Version", i32 4} -!10 = !{i32 1, !"Debug Info Version", i32 2} +!10 = !{i32 1, !"Debug Info Version", i32 3} !11 = !{!"clang version 3.5.0 "} !12 = !MDLocation(line: 2, scope: !4) diff --git a/test/MC/ELF/entsize.ll b/test/MC/ELF/entsize.ll index 2bf9fa9..941a300 100644 --- a/test/MC/ELF/entsize.ll +++ b/test/MC/ELF/entsize.ll @@ -8,10 +8,10 @@ @.c8b = private unnamed_addr constant [1 x i64] [i64 42] define i32 @main() nounwind { - %1 = call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0)) - %2 = call i32 @puts(i8* getelementptr inbounds ([7 x i8]* @.str2, i32 0, i32 0)) - call void @foo(i64* getelementptr inbounds ([1 x i64]* @.c8a, i32 0, i32 0)) - call void @foo(i64* getelementptr inbounds ([1 x i64]* @.c8b, i32 0, i32 0)) + %1 = call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0)) + %2 = call i32 @puts(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str2, i32 0, i32 0)) + call void @foo(i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.c8a, i32 0, i32 0)) + call void @foo(i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.c8b, i32 0, i32 0)) ret i32 0 } diff --git a/test/MC/ELF/gen-dwarf.s b/test/MC/ELF/gen-dwarf.s index 7f0c059..4e773c7 100644 --- a/test/MC/ELF/gen-dwarf.s +++ b/test/MC/ELF/gen-dwarf.s @@ -34,6 +34,7 @@ foo: // ASM: .section .debug_info // ASM: .section .debug_abbrev +// ASM-NEXT: .Lsection_abbrev: // ASM-NEXT: [[ABBREV_LABEL:.Ltmp[0-9]+]] // Second instance of the section has the CU diff --git a/test/MC/ELF/relocation-386.s b/test/MC/ELF/relocation-386.s index 83c524b..b998ea5 100644 --- a/test/MC/ELF/relocation-386.s +++ b/test/MC/ELF/relocation-386.s @@ -65,6 +65,9 @@ // CHECK-NEXT: 0xA3 R_386_GOTOFF und_symbol 0x0 // Relocation 29 (zed@PLT) is of type R_386_PLT32 and uses the symbol // CHECK-NEXT: 0xA9 R_386_PLT32 zed 0x0 +// CHECK-NEXT: 0xAF R_386_PC32 tr_start 0x0 +// CHECK-NEXT: 0xB3 R_386_16 foo 0x0 +// CHECK-NEXT: 0xB5 R_386_8 foo 0x0 // CHECK-NEXT: } // CHECK-NEXT: ] @@ -133,6 +136,12 @@ bar2: leal 1 + und_symbol@GOTOFF, %edi movl zed@PLT(%eax), %eax + .code64 + jmpq *tr_start(%rip) + + .word foo + .byte foo + .section zedsec,"awT",@progbits zed: .long 0 diff --git a/test/MC/ELF/relocation.s b/test/MC/ELF/relocation.s index c0e6007..de2b434 100644 --- a/test/MC/ELF/relocation.s +++ b/test/MC/ELF/relocation.s @@ -34,6 +34,15 @@ bar: movl $_GLOBAL_OFFSET_TABLE_, %eax movabs $_GLOBAL_OFFSET_TABLE_, %rax + .quad blah@SIZE # R_X86_64_SIZE64 + .quad blah@SIZE + 32 # R_X86_64_SIZE64 + .quad blah@SIZE - 32 # R_X86_64_SIZE64 + movl blah@SIZE, %eax # R_X86_64_SIZE32 + movl blah@SIZE + 32, %eax # R_X86_64_SIZE32 + movl blah@SIZE - 32, %eax # R_X86_64_SIZE32 + + .long foo@gotpcrel + .long foo@plt // CHECK: Section { // CHECK: Name: .rela.text // CHECK: Relocations [ @@ -62,6 +71,14 @@ bar: // CHECK-NEXT: 0x98 R_X86_64_PC32 foo 0xFFFFFFFFFFFFFFFB // CHECK-NEXT: 0x9D R_X86_64_GOTPC32 _GLOBAL_OFFSET_TABLE_ 0x1 // CHECK-NEXT: 0xA3 R_X86_64_GOTPC64 _GLOBAL_OFFSET_TABLE_ 0x2 +// CHECK-NEXT: 0xAB R_X86_64_SIZE64 blah 0x0 +// CHECK-NEXT: 0xB3 R_X86_64_SIZE64 blah 0x20 +// CHECK-NEXT: 0xBB R_X86_64_SIZE64 blah 0xFFFFFFFFFFFFFFE0 +// CHECK-NEXT: 0xC6 R_X86_64_SIZE32 blah 0x0 +// CHECK-NEXT: 0xCD R_X86_64_SIZE32 blah 0x20 +// CHECK-NEXT: 0xD4 R_X86_64_SIZE32 blah 0xFFFFFFFFFFFFFFE0 +// CHECK-NEXT: 0xD8 R_X86_64_GOTPCREL foo 0x0 +// CHECK-NEXT: 0xDC R_X86_64_PLT32 foo 0x0 // CHECK-NEXT: ] // CHECK-NEXT: } diff --git a/test/MC/ELF/size.s b/test/MC/ELF/size.s new file mode 100644 index 0000000..7bbf661 --- /dev/null +++ b/test/MC/ELF/size.s @@ -0,0 +1,15 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux < %s | llvm-readobj -t | FileCheck %s + +foo: +bar = . + .size foo, . - bar + 42 + +// CHECK: Symbol { +// CHECK: Name: foo +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 42 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text +// CHECK-NEXT: } diff --git a/test/MC/ELF/weak-diff.s b/test/MC/ELF/weak-diff.s new file mode 100644 index 0000000..d270bbb --- /dev/null +++ b/test/MC/ELF/weak-diff.s @@ -0,0 +1,12 @@ +// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t 2>&1 | FileCheck %s + +// CHECK: error: Cannot represent a subtraction with a weak symbol + +.weak f +.weak g +f: + nop +g: + nop + +.quad g - f diff --git a/test/MC/MachO/AArch64/cstexpr-gotpcrel.ll b/test/MC/MachO/AArch64/cstexpr-gotpcrel.ll new file mode 100644 index 0000000..b52a5ab --- /dev/null +++ b/test/MC/MachO/AArch64/cstexpr-gotpcrel.ll @@ -0,0 +1,92 @@ +; RUN: llc -mtriple=arm64-apple-darwin %s -o - | FileCheck %s + +; GOT equivalent globals references can be replaced by the GOT entry of the +; final symbol instead. + +%struct.data = type { i32, %struct.anon } +%struct.anon = type { i32, i32 } + +@localfoo = global i32 42 +@localgotequiv = private unnamed_addr constant i32* @localfoo + +@extfoo = external global i32 +@extgotequiv = private unnamed_addr constant i32* @extfoo + +; Don't replace GOT equivalent usage within instructions and emit the GOT +; equivalent since it can't be replaced by the GOT entry. @bargotequiv is +; used by an instruction inside @t0. +; +; CHECK: l_bargotequiv: +; CHECK-NEXT: .quad _extbar +@extbar = external global i32 +@bargotequiv = private unnamed_addr constant i32* @extbar + +@table = global [4 x %struct.data] [ +; CHECK-LABEL: _table + %struct.data { i32 1, %struct.anon { i32 2, i32 3 } }, +; Test GOT equivalent usage inside nested constant arrays. + +; CHECK: .long 5 +; CHECK-NOT: .long _localgotequiv-(_table+20) +; CHECK-NEXT: Ltmp1: +; CHECK-NEXT: .long _localfoo@GOT-Ltmp1 + %struct.data { i32 4, %struct.anon { i32 5, + i32 trunc (i64 sub (i64 ptrtoint (i32** @localgotequiv to i64), + i64 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data], [4 x %struct.data]* @table, i32 0, i64 1, i32 1, i32 1) to i64)) + to i32)} + }, + +; CHECK: .long 5 +; CHECK-NOT: _extgotequiv-(_table+32) +; CHECK-NEXT: Ltmp2: +; CHECK-NEXT: _extfoo@GOT-Ltmp2 + %struct.data { i32 4, %struct.anon { i32 5, + i32 trunc (i64 sub (i64 ptrtoint (i32** @extgotequiv to i64), + i64 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data], [4 x %struct.data]* @table, i32 0, i64 2, i32 1, i32 1) to i64)) + to i32)} + }, +; Test support for arbitrary constants into the GOTPCREL offset, which is +; supported on x86-64 but not on ARM64 + +; CHECK: .long 5 +; CHECK-NEXT: .long (l_extgotequiv-(_table+44))+24 + %struct.data { i32 4, %struct.anon { i32 5, + i32 add (i32 trunc (i64 sub (i64 ptrtoint (i32** @extgotequiv to i64), + i64 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data], [4 x %struct.data]* @table, i32 0, i64 3, i32 1, i32 1) to i64)) + to i32), i32 24)} + } +], align 16 + +; Test multiple uses of GOT equivalents. + +; CHECK-LABEL: _delta +; CHECK: Ltmp3: +; CHECK-NEXT: .long _extfoo@GOT-Ltmp3 +@delta = global i32 trunc (i64 sub (i64 ptrtoint (i32** @extgotequiv to i64), + i64 ptrtoint (i32* @delta to i64)) + to i32) + +; CHECK-LABEL: _deltaplus: +; CHECK: .long (l_localgotequiv-_deltaplus)+55 +@deltaplus = global i32 add (i32 trunc (i64 sub (i64 ptrtoint (i32** @localgotequiv to i64), + i64 ptrtoint (i32* @deltaplus to i64)) + to i32), i32 55) + +define i32 @t0(i32 %a) { + %x = add i32 trunc (i64 sub (i64 ptrtoint (i32** @bargotequiv to i64), + i64 ptrtoint (i32 (i32)* @t0 to i64)) + to i32), %a + ret i32 %x +} + +; Check that these got equivalent symbols are emitted on ARM64. Since ARM64 +; does not support encoding an extra offset with @GOT, we still need to emit the +; equivalents for use by such IR constructs. Check them at the end of the test +; since they will start out as GOT equivalent candidates, but they are actually +; needed and are therefore emitted at the end. + +; CHECK-LABEL: l_localgotequiv: +; CHECK-NEXT: .quad _localfoo + +; CHECK-LABEL: l_extgotequiv: +; CHECK-NEXT: .quad _extfoo diff --git a/test/MC/MachO/ARM/cstexpr-gotpcrel.ll b/test/MC/MachO/ARM/cstexpr-gotpcrel.ll new file mode 100644 index 0000000..95d830c --- /dev/null +++ b/test/MC/MachO/ARM/cstexpr-gotpcrel.ll @@ -0,0 +1,74 @@ +; RUN: llc -mtriple=arm-apple-darwin %s -o %t +; RUN: FileCheck %s < %t +; RUN: FileCheck %s -check-prefix=GOT-EQUIV < %t + +; GOT equivalent globals references can be replaced by the GOT entry of the +; final symbol instead. + +%struct.data = type { i32, %struct.anon } +%struct.anon = type { i32, i32 } + +; Check that these got equivalent symbols are never emitted or used +; GOT-EQUIV-NOT: _localgotequiv +; GOT-EQUIV-NOT: _extgotequiv +@localfoo = global i32 42 +@localgotequiv = private unnamed_addr constant i32* @localfoo + +@extfoo = external global i32 +@extgotequiv = private unnamed_addr constant i32* @extfoo + +; Don't replace GOT equivalent usage within instructions and emit the GOT +; equivalent since it can't be replaced by the GOT entry. @bargotequiv is +; used by an instruction inside @t0. +; +; CHECK: l_bargotequiv: +; CHECK-NEXT: .long _extbar +@extbar = external global i32 +@bargotequiv = private unnamed_addr constant i32* @extbar + +@table = global [4 x %struct.data] [ +; CHECK-LABEL: _table + %struct.data { i32 1, %struct.anon { i32 2, i32 3 } }, +; Test GOT equivalent usage inside nested constant arrays. +; CHECK: .long 5 +; CHECK-NOT: l_localgotequiv-(_table+20) +; CHECK-NEXT: L_localfoo$non_lazy_ptr-(_table+20) + %struct.data { i32 4, %struct.anon { i32 5, + i32 sub (i32 ptrtoint (i32** @localgotequiv to i32), + i32 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data], [4 x %struct.data]* @table, i32 0, i32 1, i32 1, i32 1) to i32))} + }, +; CHECK: .long 5 +; CHECK-NOT: l_extgotequiv-(_table+32) +; CHECK-NEXT: L_extfoo$non_lazy_ptr-(_table+32) + %struct.data { i32 4, %struct.anon { i32 5, + i32 sub (i32 ptrtoint (i32** @extgotequiv to i32), + i32 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data], [4 x %struct.data]* @table, i32 0, i32 2, i32 1, i32 1) to i32))} + }, +; Test support for arbitrary constants into the GOTPCREL offset +; CHECK: .long 5 +; CHECK-NOT: (l_extgotequiv-(_table+44))+24 +; CHECK-NEXT: L_extfoo$non_lazy_ptr-(_table+20) + %struct.data { i32 4, %struct.anon { i32 5, + i32 add (i32 sub (i32 ptrtoint (i32** @extgotequiv to i32), + i32 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data], [4 x %struct.data]* @table, i32 0, i32 3, i32 1, i32 1) to i32)), + i32 24)} + } +], align 16 + +; Test multiple uses of GOT equivalents. +; CHECK-LABEL: _delta +; CHECK: .long L_extfoo$non_lazy_ptr-_delta +@delta = global i32 sub (i32 ptrtoint (i32** @extgotequiv to i32), + i32 ptrtoint (i32* @delta to i32)) + +; CHECK-LABEL: _deltaplus: +; CHECK: .long L_localfoo$non_lazy_ptr-(_deltaplus-55) +@deltaplus = global i32 add (i32 sub (i32 ptrtoint (i32** @localgotequiv to i32), + i32 ptrtoint (i32* @deltaplus to i32)), + i32 55) + +define i32 @t0(i32 %a) { + %x = add i32 sub (i32 ptrtoint (i32** @bargotequiv to i32), + i32 ptrtoint (i32 (i32)* @t0 to i32)), %a + ret i32 %x +} diff --git a/test/MC/MachO/cstexpr-gotpcrel-32.ll b/test/MC/MachO/cstexpr-gotpcrel-32.ll new file mode 100644 index 0000000..8e00b4a --- /dev/null +++ b/test/MC/MachO/cstexpr-gotpcrel-32.ll @@ -0,0 +1,74 @@ +; RUN: llc -mtriple=i386-apple-darwin %s -o %t +; RUN: FileCheck %s < %t +; RUN: FileCheck %s -check-prefix=GOT-EQUIV < %t + +; GOT equivalent globals references can be replaced by the GOT entry of the +; final symbol instead. + +%struct.data = type { i32, %struct.anon } +%struct.anon = type { i32, i32 } + +; Check that these got equivalent symbols are never emitted or used +; GOT-EQUIV-NOT: _localgotequiv +; GOT-EQUIV-NOT: _extgotequiv +@localfoo = global i32 42 +@localgotequiv = private unnamed_addr constant i32* @localfoo + +@extfoo = external global i32 +@extgotequiv = private unnamed_addr constant i32* @extfoo + +; Don't replace GOT equivalent usage within instructions and emit the GOT +; equivalent since it can't be replaced by the GOT entry. @bargotequiv is +; used by an instruction inside @t0. +; +; CHECK: l_bargotequiv: +; CHECK-NEXT: .long _extbar +@extbar = external global i32 +@bargotequiv = private unnamed_addr constant i32* @extbar + +@table = global [4 x %struct.data] [ +; CHECK-LABEL: _table + %struct.data { i32 1, %struct.anon { i32 2, i32 3 } }, +; Test GOT equivalent usage inside nested constant arrays. +; CHECK: .long 5 +; CHECK-NOT: l_localgotequiv-(_table+20) +; CHECK-NEXT: L_localfoo$non_lazy_ptr-(_table+20) + %struct.data { i32 4, %struct.anon { i32 5, + i32 sub (i32 ptrtoint (i32** @localgotequiv to i32), + i32 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data], [4 x %struct.data]* @table, i32 0, i32 1, i32 1, i32 1) to i32))} + }, +; CHECK: .long 5 +; CHECK-NOT: l_extgotequiv-(_table+32) +; CHECK-NEXT: L_extfoo$non_lazy_ptr-(_table+32) + %struct.data { i32 4, %struct.anon { i32 5, + i32 sub (i32 ptrtoint (i32** @extgotequiv to i32), + i32 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data], [4 x %struct.data]* @table, i32 0, i32 2, i32 1, i32 1) to i32))} + }, +; Test support for arbitrary constants into the GOTPCREL offset +; CHECK: .long 5 +; CHECK-NOT: (l_extgotequiv-(_table+44))+24 +; CHECK-NEXT: L_extfoo$non_lazy_ptr-(_table+20) + %struct.data { i32 4, %struct.anon { i32 5, + i32 add (i32 sub (i32 ptrtoint (i32** @extgotequiv to i32), + i32 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data], [4 x %struct.data]* @table, i32 0, i32 3, i32 1, i32 1) to i32)), + i32 24)} + } +], align 16 + +; Test multiple uses of GOT equivalents. +; CHECK-LABEL: _delta +; CHECK: .long L_extfoo$non_lazy_ptr-_delta +@delta = global i32 sub (i32 ptrtoint (i32** @extgotequiv to i32), + i32 ptrtoint (i32* @delta to i32)) + +; CHECK-LABEL: _deltaplus: +; CHECK: .long L_localfoo$non_lazy_ptr-(_deltaplus-55) +@deltaplus = global i32 add (i32 sub (i32 ptrtoint (i32** @localgotequiv to i32), + i32 ptrtoint (i32* @deltaplus to i32)), + i32 55) + +define i32 @t0(i32 %a) { + %x = add i32 sub (i32 ptrtoint (i32** @bargotequiv to i32), + i32 ptrtoint (i32 (i32)* @t0 to i32)), %a + ret i32 %x +} diff --git a/test/MC/MachO/cstexpr-gotpcrel-64.ll b/test/MC/MachO/cstexpr-gotpcrel-64.ll new file mode 100644 index 0000000..bf15564 --- /dev/null +++ b/test/MC/MachO/cstexpr-gotpcrel-64.ll @@ -0,0 +1,86 @@ +; RUN: llc -mtriple=x86_64-apple-darwin %s -o %t +; RUN: FileCheck %s -check-prefix=X86 < %t +; RUN: FileCheck %s -check-prefix=X86-GOT-EQUIV < %t + +; GOT equivalent globals references can be replaced by the GOT entry of the +; final symbol instead. + +%struct.data = type { i32, %struct.anon } +%struct.anon = type { i32, i32 } + +; Check that these got equivalent symbols are never emitted. + +; X86-GOT-EQUIV-NOT: L_localgotequiv +; X86-GOT-EQUIV-NOT: l_extgotequiv +@localfoo = global i32 42 +@localgotequiv = private unnamed_addr constant i32* @localfoo + +@extfoo = external global i32 +@extgotequiv = private unnamed_addr constant i32* @extfoo + +; Don't replace GOT equivalent usage within instructions and emit the GOT +; equivalent since it can't be replaced by the GOT entry. @bargotequiv is +; used by an instruction inside @t0. +; +; X86: l_bargotequiv: +; X86-NEXT: .quad _extbar +@extbar = external global i32 +@bargotequiv = private unnamed_addr constant i32* @extbar + +@table = global [4 x %struct.data] [ + %struct.data { i32 1, %struct.anon { i32 2, i32 3 } }, +; Test GOT equivalent usage inside nested constant arrays. + +; X86: .long 5 +; X86-NOT: .long _localgotequiv-(_table+20) +; X86-NEXT: .long _localfoo@GOTPCREL+4 + %struct.data { i32 4, %struct.anon { i32 5, + i32 trunc (i64 sub (i64 ptrtoint (i32** @localgotequiv to i64), + i64 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data], [4 x %struct.data]* @table, i32 0, i64 1, i32 1, i32 1) to i64)) + to i32)} + }, +; X86: .long 5 +; X86-NOT: _extgotequiv-(_table+32) +; X86-NEXT: .long _extfoo@GOTPCREL+4 + %struct.data { i32 4, %struct.anon { i32 5, + i32 trunc (i64 sub (i64 ptrtoint (i32** @extgotequiv to i64), + i64 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data], [4 x %struct.data]* @table, i32 0, i64 2, i32 1, i32 1) to i64)) + to i32)} + }, +; Test support for arbitrary constants into the GOTPCREL offset. + +; X86: .long 5 +; X86-NOT: _extgotequiv-(_table+44) +; X86-NEXT: .long _extfoo@GOTPCREL+28 + %struct.data { i32 4, %struct.anon { i32 5, + i32 add (i32 trunc (i64 sub (i64 ptrtoint (i32** @extgotequiv to i64), + i64 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data], [4 x %struct.data]* @table, i32 0, i64 3, i32 1, i32 1) to i64)) + to i32), i32 24)} + } +], align 16 + +; Test multiple uses of GOT equivalents. + +; X86-LABEL: _delta +; X86: .long _extfoo@GOTPCREL+4 +@delta = global i32 trunc (i64 sub (i64 ptrtoint (i32** @extgotequiv to i64), + i64 ptrtoint (i32* @delta to i64)) + to i32) + +; X86-LABEL: _deltaplus: +; X86: .long _localfoo@GOTPCREL+59 +@deltaplus = global i32 add (i32 trunc (i64 sub (i64 ptrtoint (i32** @localgotequiv to i64), + i64 ptrtoint (i32* @deltaplus to i64)) + to i32), i32 55) + +define i32 @t0(i32 %a) { + %x = add i32 trunc (i64 sub (i64 ptrtoint (i32** @bargotequiv to i64), + i64 ptrtoint (i32 (i32)* @t0 to i64)) + to i32), %a + ret i32 %x +} + +; Also test direct instruction uses. +define i32** @t1() { + ret i32** @bargotequiv +} diff --git a/test/MC/MachO/tlv-bss.ll b/test/MC/MachO/tlv-bss.ll index af620f9..3dbf4b0 100644 --- a/test/MC/MachO/tlv-bss.ll +++ b/test/MC/MachO/tlv-bss.ll @@ -26,7 +26,7 @@ define i8* @_Z1fi(i32 %x) #0 { entry: %x.addr = alloca i32, align 4 store i32 %x, i32* %x.addr, align 4 - %0 = load i8** @_ZN3TlsIlE3valE, align 8 + %0 = load i8*, i8** @_ZN3TlsIlE3valE, align 8 ret i8* %0 } diff --git a/test/MC/MachO/x86-data-in-code.ll b/test/MC/MachO/x86-data-in-code.ll index 2410974..c2e136f 100644 --- a/test/MC/MachO/x86-data-in-code.ll +++ b/test/MC/MachO/x86-data-in-code.ll @@ -6,7 +6,7 @@ ; CHECK-NOT: (('command', 41) define void @foo(i32* %ptr) nounwind ssp { - %tmp = load i32* %ptr, align 4 + %tmp = load i32, i32* %ptr, align 4 switch i32 %tmp, label %default [ i32 11, label %bb0 i32 10, label %bb1 diff --git a/test/MC/Mips/elf-bigendian.ll b/test/MC/Mips/elf-bigendian.ll index a92fe33..4990f4e 100644 --- a/test/MC/Mips/elf-bigendian.ll +++ b/test/MC/Mips/elf-bigendian.ll @@ -43,16 +43,16 @@ target triple = "mips-unknown-linux" define i32 @main() nounwind { entry: - %0 = load i32* @x, align 4 + %0 = load i32, i32* @x, align 4 %tobool = icmp eq i32 %0, 0 br i1 %tobool, label %if.end, label %foo if.end: ; preds = %entry - %puts = tail call i32 @puts(i8* getelementptr inbounds ([4 x i8]* @str, i32 0, i32 0)) + %puts = tail call i32 @puts(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @str, i32 0, i32 0)) br label %foo foo: ; preds = %entry, %if.end - %puts2 = tail call i32 @puts(i8* getelementptr inbounds ([4 x i8]* @str2, i32 0, i32 0)) + %puts2 = tail call i32 @puts(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @str2, i32 0, i32 0)) ret i32 0 } diff --git a/test/MC/Mips/mips-abi-bad.s b/test/MC/Mips/mips-abi-bad.s index ba6564f..0e065bf 100644 --- a/test/MC/Mips/mips-abi-bad.s +++ b/test/MC/Mips/mips-abi-bad.s @@ -22,9 +22,3 @@ # CHECK: :[[@LINE-1]]:13: error: expected .module option identifier # CHECK-NEXT: .module 34 # CHECK-NEXT: ^ - - .set mips16 - .module fp=32 -# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code -# CHECK-NEXT: .module fp=32 -# CHECK-NEXT: ^ diff --git a/test/MC/Mips/mips1/valid.s b/test/MC/Mips/mips1/valid.s index 53ff6a0..d18f6f5 100644 --- a/test/MC/Mips/mips1/valid.s +++ b/test/MC/Mips/mips1/valid.s @@ -116,3 +116,4 @@ tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] diff --git a/test/MC/Mips/mips2/valid.s b/test/MC/Mips/mips2/valid.s index 34843bc..6ee6512 100644 --- a/test/MC/Mips/mips2/valid.s +++ b/test/MC/Mips/mips2/valid.s @@ -165,3 +165,4 @@ trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] diff --git a/test/MC/Mips/mips3/valid.s b/test/MC/Mips/mips3/valid.s index a55576d..6d55079 100644 --- a/test/MC/Mips/mips3/valid.s +++ b/test/MC/Mips/mips3/valid.s @@ -228,3 +228,4 @@ trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] diff --git a/test/MC/Mips/mips32/valid.s b/test/MC/Mips/mips32/valid.s index d79c390..ba75d77 100644 --- a/test/MC/Mips/mips32/valid.s +++ b/test/MC/Mips/mips32/valid.s @@ -195,3 +195,4 @@ trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] diff --git a/test/MC/Mips/mips32r2/valid.s b/test/MC/Mips/mips32r2/valid.s index 97cfa36..61be290 100644 --- a/test/MC/Mips/mips32r2/valid.s +++ b/test/MC/Mips/mips32r2/valid.s @@ -233,4 +233,5 @@ trunc.w.s $f28,$f30 wsbh $k1,$9 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] synci -15842($a2) # CHECK: synci -15842($6) # encoding: [0x04,0xdf,0xc2,0x1e] diff --git a/test/MC/Mips/mips32r3/valid.s b/test/MC/Mips/mips32r3/valid.s index 4280de5..ff6589d 100644 --- a/test/MC/Mips/mips32r3/valid.s +++ b/test/MC/Mips/mips32r3/valid.s @@ -233,4 +233,5 @@ trunc.w.s $f28,$f30 wsbh $k1,$9 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] synci -15842($a2) # CHECK: synci -15842($6) # encoding: [0x04,0xdf,0xc2,0x1e] diff --git a/test/MC/Mips/mips32r5/valid.s b/test/MC/Mips/mips32r5/valid.s index 13341d5..408d0cc 100644 --- a/test/MC/Mips/mips32r5/valid.s +++ b/test/MC/Mips/mips32r5/valid.s @@ -233,4 +233,5 @@ trunc.w.s $f28,$f30 wsbh $k1,$9 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] synci -15842($a2) # CHECK: synci -15842($6) # encoding: [0x04,0xdf,0xc2,0x1e] diff --git a/test/MC/Mips/mips32r6/valid.s b/test/MC/Mips/mips32r6/valid.s index 362785b..7033d4a 100644 --- a/test/MC/Mips/mips32r6/valid.s +++ b/test/MC/Mips/mips32r6/valid.s @@ -175,3 +175,4 @@ tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] diff --git a/test/MC/Mips/mips4/valid.s b/test/MC/Mips/mips4/valid.s index fc747a5..7fcf781 100644 --- a/test/MC/Mips/mips4/valid.s +++ b/test/MC/Mips/mips4/valid.s @@ -257,3 +257,4 @@ trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] diff --git a/test/MC/Mips/mips5/valid.s b/test/MC/Mips/mips5/valid.s index 995d1a5..4b1282e 100644 --- a/test/MC/Mips/mips5/valid.s +++ b/test/MC/Mips/mips5/valid.s @@ -259,3 +259,4 @@ trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] diff --git a/test/MC/Mips/mips64/valid.s b/test/MC/Mips/mips64/valid.s index f481a28..d900ab7 100644 --- a/test/MC/Mips/mips64/valid.s +++ b/test/MC/Mips/mips64/valid.s @@ -276,3 +276,4 @@ trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] diff --git a/test/MC/Mips/mips64r2/valid.s b/test/MC/Mips/mips64r2/valid.s index 7717238..7193451 100644 --- a/test/MC/Mips/mips64r2/valid.s +++ b/test/MC/Mips/mips64r2/valid.s @@ -302,4 +302,5 @@ trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] wsbh $k1,$9 diff --git a/test/MC/Mips/mips64r3/valid.s b/test/MC/Mips/mips64r3/valid.s index d8f1721..3a3f7ad 100644 --- a/test/MC/Mips/mips64r3/valid.s +++ b/test/MC/Mips/mips64r3/valid.s @@ -302,4 +302,5 @@ trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] wsbh $k1,$9 diff --git a/test/MC/Mips/mips64r5/valid.s b/test/MC/Mips/mips64r5/valid.s index 1706852..5ba102d 100644 --- a/test/MC/Mips/mips64r5/valid.s +++ b/test/MC/Mips/mips64r5/valid.s @@ -302,4 +302,5 @@ trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] wsbh $k1,$9 diff --git a/test/MC/Mips/mips64r6/valid.s b/test/MC/Mips/mips64r6/valid.s index 3e8fc41..600cb48 100644 --- a/test/MC/Mips/mips64r6/valid.s +++ b/test/MC/Mips/mips64r6/valid.s @@ -198,3 +198,4 @@ tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] diff --git a/test/MC/Mips/module-directive-bad.s b/test/MC/Mips/module-directive-bad.s new file mode 100644 index 0000000..963d651 --- /dev/null +++ b/test/MC/Mips/module-directive-bad.s @@ -0,0 +1,262 @@ +# RUN: not llvm-mc -triple mips-unknown-unknown %s 2>%t1 +# RUN: FileCheck %s < %t1 + + .set mips0 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set mips1 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set mips2 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set mips3 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set mips4 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set mips5 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set mips32 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set mips32r2 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set mips32r6 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set mips64 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set mips64r2 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set mips64r6 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set arch=mips32 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set mips16 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set nomips16 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set micromips + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set nomicromips + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set msa + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set nomsa + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set dsp + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set nodsp + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set push + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set pop + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set reorder + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set noreorder + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set macro + .module fp=64 +# FIXME: emitDirectiveSetMacro should call forbidModuleDirective(). + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set nomacro + .module fp=64 +# FIXME: emitDirectiveSetNoMacro should call forbidModuleDirective(). + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set at + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set at=$3 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set noat + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .set fp=32 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .cpload $25 + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .llvm_internal_mips_reallow_module_directive + .module fp=32 +# CHECK-NOT: :[[@LINE-1]]:13: error: .module directive must appear before any code + + .cpsetup $25, 8, __cerror + .module fp=64 +# CHECK: :[[@LINE-1]]:13: error: .module directive must appear before any code diff --git a/test/MC/Mips/sym-offset.ll b/test/MC/Mips/sym-offset.ll index c7450f7..55adc22 100644 --- a/test/MC/Mips/sym-offset.ll +++ b/test/MC/Mips/sym-offset.ll @@ -17,7 +17,7 @@ entry: ; CHECK: 0000: 00001C3C 00009C27 21E09903 0000828F ; CHECK-NEXT: 0010: 0E004188 0B004198 - %call = tail call i32 @memcmp(i8* getelementptr inbounds ([11 x i8]* @string1, i32 0, i32 0), i8* getelementptr inbounds ([10 x i8]* @string2, i32 0, i32 0), i32 4) nounwind readonly + %call = tail call i32 @memcmp(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @string1, i32 0, i32 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @string2, i32 0, i32 0), i32 4) nounwind readonly %cmp = icmp eq i32 %call, 0 %conv = zext i1 %cmp to i32 ret i32 %conv diff --git a/test/MC/PowerPC/htm.s b/test/MC/PowerPC/htm.s new file mode 100644 index 0000000..f99ff3c --- /dev/null +++ b/test/MC/PowerPC/htm.s @@ -0,0 +1,53 @@ +# RUN: llvm-mc -triple powerpc64-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s +# RUN: llvm-mc -triple powerpc64le-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s + +# CHECK-BE: tbegin. 0 # encoding: [0x7c,0x00,0x05,0x1d] +# CHECK-LE: tbegin. 0 # encoding: [0x1d,0x05,0x00,0x7c] + tbegin. 0 +# CHECK-BE: tbegin. 1 # encoding: [0x7c,0x20,0x05,0x1d] +# CHECK-LE: tbegin. 1 # encoding: [0x1d,0x05,0x20,0x7c] + tbegin. 1 + +# CHECK-BE: tend. 0 # encoding: [0x7c,0x00,0x05,0x5d] +# CHECK-LE: tend. 0 # encoding: [0x5d,0x05,0x00,0x7c] + tend. 0 +# CHECK-BE: tend. 1 # encoding: [0x7e,0x00,0x05,0x5d] +# CHECK-LE: tend. 1 # encoding: [0x5d,0x05,0x00,0x7e] + tend. 1 + +# CHECK-BE: tabort. 9 # encoding: [0x7c,0x09,0x07,0x1d] +# CHECK-LE: tabort. 9 # encoding: [0x1d,0x07,0x09,0x7c] + tabort. 9 +# CHECK-BE: tabortdc. 0, 9, 9 # encoding: [0x7c,0x09,0x4e,0x5d] +# CHECK-LE: tabortdc. 0, 9, 9 # encoding: [0x5d,0x4e,0x09,0x7c] + tabortdc. 0, 9, 9 +# CHECK-BE: tabortdci. 0, 9, 0 # encoding: [0x7c,0x09,0x06,0xdd] +# CHECK-LE: tabortdci. 0, 9, 0 # encoding: [0xdd,0x06,0x09,0x7c] + tabortdci. 0, 9, 0 +# CHECK-BE: tabortwc. 0, 9, 9 # encoding: [0x7c,0x09,0x4e,0x1d] +# CHECK-LE: tabortwc. 0, 9, 9 # encoding: [0x1d,0x4e,0x09,0x7c] + tabortwc. 0, 9, 9 +# CHECK-BE: tabortwci. 0, 9, 0 # encoding: [0x7c,0x09,0x06,0x9d] +# CHECK-LE: tabortwci. 0, 9, 0 # encoding: [0x9d,0x06,0x09,0x7c] + tabortwci. 0, 9, 0 + +# CHECK-BE: tsr. 0 # encoding: [0x7c,0x00,0x05,0xdd] +# CHECK-LE: tsr. 0 # encoding: [0xdd,0x05,0x00,0x7c] + tsr. 0 +# CHECK-BE: tsr. 1 # encoding: [0x7c,0x20,0x05,0xdd] +# CHECK-LE: tsr. 1 # encoding: [0xdd,0x05,0x20,0x7c] + tsr. 1 + +# CHECK-BE: tcheck 0 # encoding: [0x7c,0x00,0x05,0x9c] +# CHECK-LE: tcheck 0 # encoding: [0x9c,0x05,0x00,0x7c] + tcheck 0 +# CHECK-BE: tcheck 3 # encoding: [0x7d,0x80,0x05,0x9c] +# CHECK-LE: tcheck 3 # encoding: [0x9c,0x05,0x80,0x7d] + tcheck 3 + +# CHECK-BE: treclaim. 9 # encoding: [0x7c,0x09,0x07,0x5d] +# CHECK-LE: treclaim. 9 # encoding: [0x5d,0x07,0x09,0x7c] + treclaim. 9 +# CHECK-BE: trechkpt. # encoding: [0x7c,0x00,0x07,0xdd] +# CHECK-LE: trechkpt. # encoding: [0xdd,0x07,0x00,0x7c] + trechkpt. diff --git a/test/MC/PowerPC/ppc64-encoding-bookII.s b/test/MC/PowerPC/ppc64-encoding-bookII.s index 20eba70..a4e2d0e 100644 --- a/test/MC/PowerPC/ppc64-encoding-bookII.s +++ b/test/MC/PowerPC/ppc64-encoding-bookII.s @@ -34,11 +34,6 @@ # CHECK-LE: isync # encoding: [0x2c,0x01,0x00,0x4c] isync -# FIXME: lbarx 2, 3, 4, 1 -# FIXME: lharx 2, 3, 4, 1 -# FIXME: lwarx 2, 3, 4, 1 -# FIXME: ldarx 2, 3, 4, 1 - # FIXME: stbcx. 2, 3, 4 # FIXME: sthcx. 2, 3, 4 # CHECK-BE: stwcx. 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x2d] @@ -70,15 +65,38 @@ dcbf 2, 3 # FIXME: dcbfl 2, 3 -# FIXME: lbarx 2, 3, 4 -# FIXME: lharx 2, 3, 4 +# CHECK-BE: lbarx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x68] +# CHECK-LE: lbarx 2, 3, 4 # encoding: [0x68,0x20,0x43,0x7c] + lbarx 2, 3, 4 + +# CHECK-BE: lharx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0xe8] +# CHECK-LE: lharx 2, 3, 4 # encoding: [0xe8,0x20,0x43,0x7c] + lharx 2, 3, 4 + # CHECK-BE: lwarx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x28] # CHECK-LE: lwarx 2, 3, 4 # encoding: [0x28,0x20,0x43,0x7c] lwarx 2, 3, 4 + # CHECK-BE: ldarx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0xa8] # CHECK-LE: ldarx 2, 3, 4 # encoding: [0xa8,0x20,0x43,0x7c] ldarx 2, 3, 4 +# CHECK-BE: lbarx 2, 3, 4, 1 # encoding: [0x7c,0x43,0x20,0x69] +# CHECK-LE: lbarx 2, 3, 4, 1 # encoding: [0x69,0x20,0x43,0x7c] + lbarx 2, 3, 4, 1 + +# CHECK-BE: lharx 2, 3, 4, 1 # encoding: [0x7c,0x43,0x20,0xe9] +# CHECK-LE: lharx 2, 3, 4, 1 # encoding: [0xe9,0x20,0x43,0x7c] + lharx 2, 3, 4, 1 + +# CHECK-BE: lwarx 2, 3, 4, 1 # encoding: [0x7c,0x43,0x20,0x29] +# CHECK-LE: lwarx 2, 3, 4, 1 # encoding: [0x29,0x20,0x43,0x7c] + lwarx 2, 3, 4, 1 + +# CHECK-BE: ldarx 2, 3, 4, 1 # encoding: [0x7c,0x43,0x20,0xa9] +# CHECK-LE: ldarx 2, 3, 4, 1 # encoding: [0xa9,0x20,0x43,0x7c] + ldarx 2, 3, 4, 1 + # CHECK-BE: sync 0 # encoding: [0x7c,0x00,0x04,0xac] # CHECK-LE: sync 0 # encoding: [0xac,0x04,0x00,0x7c] sync diff --git a/test/MC/PowerPC/ppc64-encoding-vmx.s b/test/MC/PowerPC/ppc64-encoding-vmx.s index 7641d1d..8f7e919 100644 --- a/test/MC/PowerPC/ppc64-encoding-vmx.s +++ b/test/MC/PowerPC/ppc64-encoding-vmx.s @@ -133,6 +133,55 @@ # CHECK-BE: vperm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x6b] # CHECK-LE: vperm 2, 3, 4, 5 # encoding: [0x6b,0x21,0x43,0x10] vperm 2, 3, 4, 5 + +# CHECK-BE: vpermxor 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x6d] +# CHECK-LE: vpermxor 2, 3, 4, 5 # encoding: [0x6d,0x21,0x43,0x10] + vpermxor 2, 3, 4, 5 + +# CHECK-BE: vsbox 2, 5 # encoding: [0x10,0x45,0x05,0xc8] +# CHECK-LE: vsbox 2, 5 # encoding: [0xc8,0x05,0x45,0x10] + vsbox 2, 5 + +# CHECK-BE: vcipher 2, 5, 17 # encoding: [0x10,0x45,0x8d,0x08] +# CHECK-LE: vcipher 2, 5, 17 # encoding: [0x08,0x8d,0x45,0x10] + vcipher 2, 5, 17 + +# CHECK-BE: vcipherlast 2, 5, 17 # encoding: [0x10,0x45,0x8d,0x09] +# CHECK-LE: vcipherlast 2, 5, 17 # encoding: [0x09,0x8d,0x45,0x10] + vcipherlast 2, 5, 17 + +# CHECK-BE: vncipher 2, 5, 17 # encoding: [0x10,0x45,0x8d,0x48] +# CHECK-LE: vncipher 2, 5, 17 # encoding: [0x48,0x8d,0x45,0x10] + vncipher 2, 5, 17 + +# CHECK-BE: vncipherlast 2, 5, 17 # encoding: [0x10,0x45,0x8d,0x49] +# CHECK-LE: vncipherlast 2, 5, 17 # encoding: [0x49,0x8d,0x45,0x10] + vncipherlast 2, 5, 17 + +# CHECK-BE: vpmsumb 2, 5, 17 # encoding: [0x10,0x45,0x8c,0x08] +# CHECK-LE: vpmsumb 2, 5, 17 # encoding: [0x08,0x8c,0x45,0x10] + vpmsumb 2, 5, 17 + +# CHECK-BE: vpmsumh 2, 5, 17 # encoding: [0x10,0x45,0x8c,0x48] +# CHECK-LE: vpmsumh 2, 5, 17 # encoding: [0x48,0x8c,0x45,0x10] + vpmsumh 2, 5, 17 + +# CHECK-BE: vpmsumw 2, 5, 17 # encoding: [0x10,0x45,0x8c,0x88] +# CHECK-LE: vpmsumw 2, 5, 17 # encoding: [0x88,0x8c,0x45,0x10] + vpmsumw 2, 5, 17 + +# CHECK-BE: vpmsumd 2, 5, 17 # encoding: [0x10,0x45,0x8c,0xc8] +# CHECK-LE: vpmsumd 2, 5, 17 # encoding: [0xc8,0x8c,0x45,0x10] + vpmsumd 2, 5, 17 + +# CHECK-BE: vshasigmaw 2, 3, 0, 11 # encoding: [0x10,0x43,0x5e,0x82] +# CHECK-LE: vshasigmaw 2, 3, 0, 11 # encoding: [0x82,0x5e,0x43,0x10] + vshasigmaw 2, 3, 0, 11 + +# CHECK-BE: vshasigmad 2, 3, 1, 15 # encoding: [0x10,0x43,0xfe,0xc2] +# CHECK-LE: vshasigmad 2, 3, 1, 15 # encoding: [0xc2,0xfe,0x43,0x10] + vshasigmad 2, 3, 1, 15 + # CHECK-BE: vsel 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x6a] # CHECK-LE: vsel 2, 3, 4, 5 # encoding: [0x6a,0x21,0x43,0x10] vsel 2, 3, 4, 5 @@ -176,6 +225,9 @@ # CHECK-BE: vadduwm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x80] # CHECK-LE: vadduwm 2, 3, 4 # encoding: [0x80,0x20,0x43,0x10] vadduwm 2, 3, 4 +# CHECK-BE: vaddudm 2, 3, 4 # encoding: [0x10,0x43,0x20,0xc0] +# CHECK-LE: vaddudm 2, 3, 4 # encoding: [0xc0,0x20,0x43,0x10] + vaddudm 2, 3, 4 # CHECK-BE: vaddubs 2, 3, 4 # encoding: [0x10,0x43,0x22,0x00] # CHECK-LE: vaddubs 2, 3, 4 # encoding: [0x00,0x22,0x43,0x10] vaddubs 2, 3, 4 @@ -207,6 +259,9 @@ # CHECK-BE: vsubuwm 2, 3, 4 # encoding: [0x10,0x43,0x24,0x80] # CHECK-LE: vsubuwm 2, 3, 4 # encoding: [0x80,0x24,0x43,0x10] vsubuwm 2, 3, 4 +# CHECK-BE: vsubudm 2, 3, 4 # encoding: [0x10,0x43,0x24,0xc0] +# CHECK-LE: vsubudm 2, 3, 4 # encoding: [0xc0,0x24,0x43,0x10] + vsubudm 2, 3, 4 # CHECK-BE: vsububs 2, 3, 4 # encoding: [0x10,0x43,0x26,0x00] # CHECK-LE: vsububs 2, 3, 4 # encoding: [0x00,0x26,0x43,0x10] vsububs 2, 3, 4 @@ -223,24 +278,39 @@ # CHECK-BE: vmulesh 2, 3, 4 # encoding: [0x10,0x43,0x23,0x48] # CHECK-LE: vmulesh 2, 3, 4 # encoding: [0x48,0x23,0x43,0x10] vmulesh 2, 3, 4 +# CHECK-BE: vmulesw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x88] +# CHECK-LE: vmulesw 2, 3, 4 # encoding: [0x88,0x23,0x43,0x10] + vmulesw 2, 3, 4 # CHECK-BE: vmuleub 2, 3, 4 # encoding: [0x10,0x43,0x22,0x08] # CHECK-LE: vmuleub 2, 3, 4 # encoding: [0x08,0x22,0x43,0x10] vmuleub 2, 3, 4 # CHECK-BE: vmuleuh 2, 3, 4 # encoding: [0x10,0x43,0x22,0x48] # CHECK-LE: vmuleuh 2, 3, 4 # encoding: [0x48,0x22,0x43,0x10] vmuleuh 2, 3, 4 +# CHECK-BE: vmuleuw 2, 3, 4 # encoding: [0x10,0x43,0x22,0x88] +# CHECK-LE: vmuleuw 2, 3, 4 # encoding: [0x88,0x22,0x43,0x10] + vmuleuw 2, 3, 4 # CHECK-BE: vmulosb 2, 3, 4 # encoding: [0x10,0x43,0x21,0x08] # CHECK-LE: vmulosb 2, 3, 4 # encoding: [0x08,0x21,0x43,0x10] vmulosb 2, 3, 4 # CHECK-BE: vmulosh 2, 3, 4 # encoding: [0x10,0x43,0x21,0x48] # CHECK-LE: vmulosh 2, 3, 4 # encoding: [0x48,0x21,0x43,0x10] vmulosh 2, 3, 4 +# CHECK-BE: vmulosw 2, 3, 4 # encoding: [0x10,0x43,0x21,0x88] +# CHECK-LE: vmulosw 2, 3, 4 # encoding: [0x88,0x21,0x43,0x10] + vmulosw 2, 3, 4 # CHECK-BE: vmuloub 2, 3, 4 # encoding: [0x10,0x43,0x20,0x08] # CHECK-LE: vmuloub 2, 3, 4 # encoding: [0x08,0x20,0x43,0x10] vmuloub 2, 3, 4 # CHECK-BE: vmulouh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x48] # CHECK-LE: vmulouh 2, 3, 4 # encoding: [0x48,0x20,0x43,0x10] vmulouh 2, 3, 4 +# CHECK-BE: vmulouw 2, 3, 4 # encoding: [0x10,0x43,0x20,0x88] +# CHECK-LE: vmulouw 2, 3, 4 # encoding: [0x88,0x20,0x43,0x10] + vmulouw 2, 3, 4 +# CHECK-BE: vmuluwm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x89] +# CHECK-LE: vmuluwm 2, 3, 4 # encoding: [0x89,0x20,0x43,0x10] + vmuluwm 2, 3, 4 # CHECK-BE: vmhaddshs 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x60] # CHECK-LE: vmhaddshs 2, 3, 4, 5 # encoding: [0x60,0x21,0x43,0x10] @@ -314,6 +384,9 @@ # CHECK-BE: vmaxsw 2, 3, 4 # encoding: [0x10,0x43,0x21,0x82] # CHECK-LE: vmaxsw 2, 3, 4 # encoding: [0x82,0x21,0x43,0x10] vmaxsw 2, 3, 4 +# CHECK-BE: vmaxsd 2, 3, 4 # encoding: [0x10,0x43,0x21,0xc2] +# CHECK-LE: vmaxsd 2, 3, 4 # encoding: [0xc2,0x21,0x43,0x10] + vmaxsd 2, 3, 4 # CHECK-BE: vmaxub 2, 3, 4 # encoding: [0x10,0x43,0x20,0x02] # CHECK-LE: vmaxub 2, 3, 4 # encoding: [0x02,0x20,0x43,0x10] vmaxub 2, 3, 4 @@ -323,7 +396,10 @@ # CHECK-BE: vmaxuw 2, 3, 4 # encoding: [0x10,0x43,0x20,0x82] # CHECK-LE: vmaxuw 2, 3, 4 # encoding: [0x82,0x20,0x43,0x10] vmaxuw 2, 3, 4 - +# CHECK-BE: vmaxud 2, 3, 4 # encoding: [0x10,0x43,0x20,0xc2] +# CHECK-LE: vmaxud 2, 3, 4 # encoding: [0xc2,0x20,0x43,0x10] + vmaxud 2, 3, 4 + # CHECK-BE: vminsb 2, 3, 4 # encoding: [0x10,0x43,0x23,0x02] # CHECK-LE: vminsb 2, 3, 4 # encoding: [0x02,0x23,0x43,0x10] vminsb 2, 3, 4 @@ -333,6 +409,9 @@ # CHECK-BE: vminsw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x82] # CHECK-LE: vminsw 2, 3, 4 # encoding: [0x82,0x23,0x43,0x10] vminsw 2, 3, 4 +# CHECK-BE: vminsd 2, 3, 4 # encoding: [0x10,0x43,0x23,0xc2] +# CHECK-LE: vminsd 2, 3, 4 # encoding: [0xc2,0x23,0x43,0x10] + vminsd 2, 3, 4 # CHECK-BE: vminub 2, 3, 4 # encoding: [0x10,0x43,0x22,0x02] # CHECK-LE: vminub 2, 3, 4 # encoding: [0x02,0x22,0x43,0x10] vminub 2, 3, 4 @@ -342,6 +421,9 @@ # CHECK-BE: vminuw 2, 3, 4 # encoding: [0x10,0x43,0x22,0x82] # CHECK-LE: vminuw 2, 3, 4 # encoding: [0x82,0x22,0x43,0x10] vminuw 2, 3, 4 +# CHECK-BE: vminud 2, 3, 4 # encoding: [0x10,0x43,0x22,0xc2] +# CHECK-LE: vminud 2, 3, 4 # encoding: [0xc2,0x22,0x43,0x10] + vminud 2, 3, 4 # Vector integer compare instructions @@ -363,6 +445,12 @@ # CHECK-BE: vcmpequw. 2, 3, 4 # encoding: [0x10,0x43,0x24,0x86] # CHECK-LE: vcmpequw. 2, 3, 4 # encoding: [0x86,0x24,0x43,0x10] vcmpequw. 2, 3, 4 +# CHECK-BE: vcmpequd 2, 3, 4 # encoding: [0x10,0x43,0x20,0xc7] +# CHECK-LE: vcmpequd 2, 3, 4 # encoding: [0xc7,0x20,0x43,0x10] + vcmpequd 2, 3, 4 +# CHECK-BE: vcmpequd. 2, 3, 4 # encoding: [0x10,0x43,0x24,0xc7] +# CHECK-LE: vcmpequd. 2, 3, 4 # encoding: [0xc7,0x24,0x43,0x10] + vcmpequd. 2, 3, 4 # CHECK-BE: vcmpgtsb 2, 3, 4 # encoding: [0x10,0x43,0x23,0x06] # CHECK-LE: vcmpgtsb 2, 3, 4 # encoding: [0x06,0x23,0x43,0x10] vcmpgtsb 2, 3, 4 @@ -381,6 +469,12 @@ # CHECK-BE: vcmpgtsw. 2, 3, 4 # encoding: [0x10,0x43,0x27,0x86] # CHECK-LE: vcmpgtsw. 2, 3, 4 # encoding: [0x86,0x27,0x43,0x10] vcmpgtsw. 2, 3, 4 +# CHECK-BE: vcmpgtsd 2, 3, 4 # encoding: [0x10,0x43,0x23,0xc7] +# CHECK-LE: vcmpgtsd 2, 3, 4 # encoding: [0xc7,0x23,0x43,0x10] + vcmpgtsd 2, 3, 4 +# CHECK-BE: vcmpgtsd. 2, 3, 4 # encoding: [0x10,0x43,0x27,0xc7] +# CHECK-LE: vcmpgtsd. 2, 3, 4 # encoding: [0xc7,0x27,0x43,0x10] + vcmpgtsd. 2, 3, 4 # CHECK-BE: vcmpgtub 2, 3, 4 # encoding: [0x10,0x43,0x22,0x06] # CHECK-LE: vcmpgtub 2, 3, 4 # encoding: [0x06,0x22,0x43,0x10] vcmpgtub 2, 3, 4 @@ -399,7 +493,13 @@ # CHECK-BE: vcmpgtuw. 2, 3, 4 # encoding: [0x10,0x43,0x26,0x86] # CHECK-LE: vcmpgtuw. 2, 3, 4 # encoding: [0x86,0x26,0x43,0x10] vcmpgtuw. 2, 3, 4 - +# CHECK-BE: vcmpgtud 2, 3, 4 # encoding: [0x10,0x43,0x22,0xc7] +# CHECK-LE: vcmpgtud 2, 3, 4 # encoding: [0xc7,0x22,0x43,0x10] + vcmpgtud 2, 3, 4 +# CHECK-BE: vcmpgtud. 2, 3, 4 # encoding: [0x10,0x43,0x26,0xc7] +# CHECK-LE: vcmpgtud. 2, 3, 4 # encoding: [0xc7,0x26,0x43,0x10] + vcmpgtud. 2, 3, 4 + # Vector integer logical instructions # CHECK-BE: vand 2, 3, 4 # encoding: [0x10,0x43,0x24,0x04] @@ -438,7 +538,9 @@ # CHECK-BE: vrlw 2, 3, 4 # encoding: [0x10,0x43,0x20,0x84] # CHECK-LE: vrlw 2, 3, 4 # encoding: [0x84,0x20,0x43,0x10] vrlw 2, 3, 4 - +# CHECK-BE: vrld 2, 3, 4 # encoding: [0x10,0x43,0x20,0xc4] +# CHECK-LE: vrld 2, 3, 4 # encoding: [0xc4,0x20,0x43,0x10] + vrld 2, 3, 4 # CHECK-BE: vslb 2, 3, 4 # encoding: [0x10,0x43,0x21,0x04] # CHECK-LE: vslb 2, 3, 4 # encoding: [0x04,0x21,0x43,0x10] vslb 2, 3, 4 @@ -448,6 +550,9 @@ # CHECK-BE: vslw 2, 3, 4 # encoding: [0x10,0x43,0x21,0x84] # CHECK-LE: vslw 2, 3, 4 # encoding: [0x84,0x21,0x43,0x10] vslw 2, 3, 4 +# CHECK-BE: vsld 2, 3, 4 # encoding: [0x10,0x43,0x25,0xc4] +# CHECK-LE: vsld 2, 3, 4 # encoding: [0xc4,0x25,0x43,0x10] + vsld 2, 3, 4 # CHECK-BE: vsrb 2, 3, 4 # encoding: [0x10,0x43,0x22,0x04] # CHECK-LE: vsrb 2, 3, 4 # encoding: [0x04,0x22,0x43,0x10] vsrb 2, 3, 4 @@ -457,6 +562,9 @@ # CHECK-BE: vsrw 2, 3, 4 # encoding: [0x10,0x43,0x22,0x84] # CHECK-LE: vsrw 2, 3, 4 # encoding: [0x84,0x22,0x43,0x10] vsrw 2, 3, 4 +# CHECK-BE: vsrd 2, 3, 4 # encoding: [0x10,0x43,0x26,0xc4] +# CHECK-LE: vsrd 2, 3, 4 # encoding: [0xc4,0x26,0x43,0x10] + vsrd 2, 3, 4 # CHECK-BE: vsrab 2, 3, 4 # encoding: [0x10,0x43,0x23,0x04] # CHECK-LE: vsrab 2, 3, 4 # encoding: [0x04,0x23,0x43,0x10] vsrab 2, 3, 4 @@ -466,6 +574,9 @@ # CHECK-BE: vsraw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x84] # CHECK-LE: vsraw 2, 3, 4 # encoding: [0x84,0x23,0x43,0x10] vsraw 2, 3, 4 +# CHECK-BE: vsrad 2, 3, 4 # encoding: [0x10,0x43,0x23,0xc4] +# CHECK-LE: vsrad 2, 3, 4 # encoding: [0xc4,0x23,0x43,0x10] + vsrad 2, 3, 4 # Vector floating-point instructions @@ -576,16 +687,16 @@ # CHECK-BE: vpopcnth 2, 3 # encoding: [0x10,0x40,0x1f,0x43] # CHECK-LE: vpopcnth 2, 3 # encoding: [0x43,0x1f,0x40,0x10] - vpopcnth 2, 3 + vpopcnth 2, 3 # CHECK-BE: vpopcntw 2, 3 # encoding: [0x10,0x40,0x1f,0x83] # CHECK-LE: vpopcntw 2, 3 # encoding: [0x83,0x1f,0x40,0x10] vpopcntw 2, 3 - + # BCHECK-BE: vpopcntd 2, 3 # encoding: [0x10,0x40,0x1f,0xC3] # BCHECK-LE: vpopcntd 2, 3 # encoding: [0xC3,0x1f,0x40,0x10] # vpopcntd 2, 3 - + # Vector status and control register instructions # CHECK-BE: mtvscr 2 # encoding: [0x10,0x00,0x16,0x44] diff --git a/test/MC/X86/cstexpr-gotpcrel.ll b/test/MC/X86/cstexpr-gotpcrel.ll deleted file mode 100644 index 82da870..0000000 --- a/test/MC/X86/cstexpr-gotpcrel.ll +++ /dev/null @@ -1,78 +0,0 @@ -; RUN: llc -mtriple=x86_64-apple-darwin %s -o %t -; RUN: FileCheck %s < %t -; RUN: FileCheck %s -check-prefix=GOT-EQUIV < %t - -; GOT equivalent globals references can be replaced by the GOT entry of the -; final symbol instead. - -%struct.data = type { i32, %struct.anon } -%struct.anon = type { i32, i32 } - -; Check that these got equivalent symbols are never emitted or used -; GOT-EQUIV-NOT: _localgotequiv -; GOT-EQUIV-NOT: _extgotequiv -@localfoo = global i32 42 -@localgotequiv = private unnamed_addr constant i32* @localfoo - -@extfoo = external global i32 -@extgotequiv = private unnamed_addr constant i32* @extfoo - -; Don't replace GOT equivalent usage within instructions and emit the GOT -; equivalent since it can't be replaced by the GOT entry. @bargotequiv is -; used by an instruction inside @t0. -; -; CHECK: l_bargotequiv: -; CHECK-NEXT: .quad _extbar -@extbar = external global i32 -@bargotequiv = private unnamed_addr constant i32* @extbar - -@table = global [4 x %struct.data] [ -; CHECK-LABEL: _table - %struct.data { i32 1, %struct.anon { i32 2, i32 3 } }, -; Test GOT equivalent usage inside nested constant arrays. -; CHECK: .long 5 -; CHECK-NOT: .long _localgotequiv-(_table+20) -; CHECK-NEXT: .long _localfoo@GOTPCREL+4 - %struct.data { i32 4, %struct.anon { i32 5, - i32 trunc (i64 sub (i64 ptrtoint (i32** @localgotequiv to i64), - i64 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data]* @table, i32 0, i64 1, i32 1, i32 1) to i64)) - to i32)} - }, -; CHECK: .long 5 -; CHECK-NOT: _extgotequiv-(_table+32) -; CHECK-NEXT: .long _extfoo@GOTPCREL+4 - %struct.data { i32 4, %struct.anon { i32 5, - i32 trunc (i64 sub (i64 ptrtoint (i32** @extgotequiv to i64), - i64 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data]* @table, i32 0, i64 2, i32 1, i32 1) to i64)) - to i32)} - }, -; Test support for arbitrary constants into the GOTPCREL offset -; CHECK: .long 5 -; CHECK-NOT: _extgotequiv-(_table+44) -; CHECK-NEXT: .long _extfoo@GOTPCREL+28 - %struct.data { i32 4, %struct.anon { i32 5, - i32 add (i32 trunc (i64 sub (i64 ptrtoint (i32** @extgotequiv to i64), - i64 ptrtoint (i32* getelementptr inbounds ([4 x %struct.data]* @table, i32 0, i64 3, i32 1, i32 1) to i64)) - to i32), i32 24)} - } -], align 16 - -; Test multiple uses of GOT equivalents. -; CHECK-LABEL: _delta -; CHECK: .long _extfoo@GOTPCREL+4 -@delta = global i32 trunc (i64 sub (i64 ptrtoint (i32** @extgotequiv to i64), - i64 ptrtoint (i32* @delta to i64)) - to i32) - -; CHECK-LABEL: _deltaplus: -; CHECK: .long _localfoo@GOTPCREL+59 -@deltaplus = global i32 add (i32 trunc (i64 sub (i64 ptrtoint (i32** @localgotequiv to i64), - i64 ptrtoint (i32* @deltaplus to i64)) - to i32), i32 55) - -define i32 @t0(i32 %a) { - %x = add i32 trunc (i64 sub (i64 ptrtoint (i32** @bargotequiv to i64), - i64 ptrtoint (i32 (i32)* @t0 to i64)) - to i32), %a - ret i32 %x -} diff --git a/test/MC/X86/expand-var.s b/test/MC/X86/expand-var.s new file mode 100644 index 0000000..ef62d8a --- /dev/null +++ b/test/MC/X86/expand-var.s @@ -0,0 +1,18 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux < %s | llvm-readobj -r | FileCheck %s + +// CHECK: Section (2) .rela.text { +// CHECK-NEXT: 0x0 R_X86_64_32 d 0x0 +// CHECK-NEXT: } + +a: + b = a + c = a + d = a + .weak d + .long d + (b - c) + + +a2: + .weak b2 + b2 = a2 + c2 = b2 - a2 diff --git a/test/MC/X86/i386-darwin-frame-register.ll b/test/MC/X86/i386-darwin-frame-register.ll index dd8c88d..b382a70 100644 --- a/test/MC/X86/i386-darwin-frame-register.ll +++ b/test/MC/X86/i386-darwin-frame-register.ll @@ -29,10 +29,10 @@ attributes #0 = { nounwind } !llvm.module.flags = !{!3, !4, !5} !llvm.ident = !{!6} -!0 = !{!"0x11\0012\00clang version 3.7.0 (trunk 230514) (llvm/trunk 230518)\000\00\000\00\001", !1, !2, !2, !2, !2, !2} ; [ DW_TAG_compile_unit ] [/tmp/foo.c] [DW_LANG_C99] -!1 = !{!"foo.c", !"/tmp"} +!0 = !MDCompileUnit(language: DW_LANG_C99, producer: "clang version 3.7.0 (trunk 230514) (llvm/trunk 230518)", isOptimized: false, emissionKind: 1, file: !1, enums: !2, retainedTypes: !2, subprograms: !2, globals: !2, imports: !2) +!1 = !MDFile(filename: "foo.c", directory: "/tmp") !2 = !{} !3 = !{i32 2, !"Dwarf Version", i32 2} -!4 = !{i32 2, !"Debug Info Version", i32 2} +!4 = !{i32 2, !"Debug Info Version", i32 3} !5 = !{i32 1, !"PIC Level", i32 2} !6 = !{!"clang version 3.7.0 (trunk 230514) (llvm/trunk 230518)"} diff --git a/test/MC/X86/intel-syntax-avx512.s b/test/MC/X86/intel-syntax-avx512.s index b382994..af4e98c 100644 --- a/test/MC/X86/intel-syntax-avx512.s +++ b/test/MC/X86/intel-syntax-avx512.s @@ -3,3 +3,32 @@ // CHECK: vaddps (%rax), %zmm1, %zmm1 // CHECK: encoding: [0x62,0xf1,0x74,0x48,0x58,0x08] vaddps zmm1, zmm1, zmmword ptr [rax] + +// CHECK: vaddpd %zmm2, %zmm1, %zmm1 +// CHECK: encoding: [0x62,0xf1,0xf5,0x48,0x58,0xca] +vaddpd zmm1,zmm1,zmm2 + +// CHECK: vaddpd %zmm2, %zmm1, %zmm1 {%k5} +// CHECK: encoding: [0x62,0xf1,0xf5,0x4d,0x58,0xca] +vaddpd zmm1{k5},zmm1,zmm2 + +// CHECK: vaddpd %zmm2, %zmm1, %zmm1 {%k5} {z} +// CHECK: encoding: [0x62,0xf1,0xf5,0xcd,0x58,0xca] +vaddpd zmm1{k5} {z},zmm1,zmm2 + +// CHECK: vaddpd {rn-sae}, %zmm2, %zmm1, %zmm1 +// CHECK: encoding: [0x62,0xf1,0xf5,0x18,0x58,0xca] +vaddpd zmm1,zmm1,zmm2,{rn-sae} + +// CHECK: vaddpd {ru-sae}, %zmm2, %zmm1, %zmm1 +// CHECK: encoding: [0x62,0xf1,0xf5,0x58,0x58,0xca] +vaddpd zmm1,zmm1,zmm2,{ru-sae} + +// CHECK: vaddpd {rd-sae}, %zmm2, %zmm1, %zmm1 +// CHECK: encoding: [0x62,0xf1,0xf5,0x38,0x58,0xca] +vaddpd zmm1,zmm1,zmm2,{rd-sae} + +// CHECK: vaddpd {rz-sae}, %zmm2, %zmm1, %zmm1 +// CHECK: encoding: [0x62,0xf1,0xf5,0x78,0x58,0xca] +vaddpd zmm1,zmm1,zmm2,{rz-sae} + diff --git a/test/MC/X86/invalid-sleb.s b/test/MC/X86/invalid-sleb.s new file mode 100644 index 0000000..ad27444 --- /dev/null +++ b/test/MC/X86/invalid-sleb.s @@ -0,0 +1,5 @@ +// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux %s -o %t 2>&1 | FileCheck %s + +// CHECK: sleb128 and uleb128 expressions must be absolute + + .sleb128 undefined diff --git a/test/MC/X86/x86-64-avx512bw.s b/test/MC/X86/x86-64-avx512bw.s index 7aa7afa..0d055b1 100644 --- a/test/MC/X86/x86-64-avx512bw.s +++ b/test/MC/X86/x86-64-avx512bw.s @@ -1747,3 +1747,264 @@ // CHECK: vpcmpnleuw -8256(%rdx), %zmm22, %k4 // CHECK: encoding: [0x62,0xf3,0xcd,0x40,0x3e,0xa2,0xc0,0xdf,0xff,0xff,0x06] vpcmpnleuw -8256(%rdx), %zmm22, %k4 + +// CHECK: vpsllw %xmm24, %zmm21, %zmm24 +// CHECK: encoding: [0x62,0x01,0x55,0x40,0xf1,0xc0] + vpsllw %xmm24, %zmm21, %zmm24 + +// CHECK: vpsllw %xmm24, %zmm21, %zmm24 {%k2} +// CHECK: encoding: [0x62,0x01,0x55,0x42,0xf1,0xc0] + vpsllw %xmm24, %zmm21, %zmm24 {%k2} + +// CHECK: vpsllw %xmm24, %zmm21, %zmm24 {%k2} {z} +// CHECK: encoding: [0x62,0x01,0x55,0xc2,0xf1,0xc0] + vpsllw %xmm24, %zmm21, %zmm24 {%k2} {z} + +// CHECK: vpsllw (%rcx), %zmm21, %zmm24 +// CHECK: encoding: [0x62,0x61,0x55,0x40,0xf1,0x01] + vpsllw (%rcx), %zmm21, %zmm24 + +// CHECK: vpsllw 291(%rax,%r14,8), %zmm21, %zmm24 +// CHECK: encoding: [0x62,0x21,0x55,0x40,0xf1,0x84,0xf0,0x23,0x01,0x00,0x00] + vpsllw 291(%rax,%r14,8), %zmm21, %zmm24 + +// CHECK: vpsllw 2032(%rdx), %zmm21, %zmm24 +// CHECK: encoding: [0x62,0x61,0x55,0x40,0xf1,0x42,0x7f] + vpsllw 2032(%rdx), %zmm21, %zmm24 + +// CHECK: vpsllw 2048(%rdx), %zmm21, %zmm24 +// CHECK: encoding: [0x62,0x61,0x55,0x40,0xf1,0x82,0x00,0x08,0x00,0x00] + vpsllw 2048(%rdx), %zmm21, %zmm24 + +// CHECK: vpsllw -2048(%rdx), %zmm21, %zmm24 +// CHECK: encoding: [0x62,0x61,0x55,0x40,0xf1,0x42,0x80] + vpsllw -2048(%rdx), %zmm21, %zmm24 + +// CHECK: vpsllw -2064(%rdx), %zmm21, %zmm24 +// CHECK: encoding: [0x62,0x61,0x55,0x40,0xf1,0x82,0xf0,0xf7,0xff,0xff] + vpsllw -2064(%rdx), %zmm21, %zmm24 + +// CHECK: vpsraw %xmm21, %zmm27, %zmm28 +// CHECK: encoding: [0x62,0x21,0x25,0x40,0xe1,0xe5] + vpsraw %xmm21, %zmm27, %zmm28 + +// CHECK: vpsraw %xmm21, %zmm27, %zmm28 {%k4} +// CHECK: encoding: [0x62,0x21,0x25,0x44,0xe1,0xe5] + vpsraw %xmm21, %zmm27, %zmm28 {%k4} + +// CHECK: vpsraw %xmm21, %zmm27, %zmm28 {%k4} {z} +// CHECK: encoding: [0x62,0x21,0x25,0xc4,0xe1,0xe5] + vpsraw %xmm21, %zmm27, %zmm28 {%k4} {z} + +// CHECK: vpsraw (%rcx), %zmm27, %zmm28 +// CHECK: encoding: [0x62,0x61,0x25,0x40,0xe1,0x21] + vpsraw (%rcx), %zmm27, %zmm28 + +// CHECK: vpsraw 291(%rax,%r14,8), %zmm27, %zmm28 +// CHECK: encoding: [0x62,0x21,0x25,0x40,0xe1,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsraw 291(%rax,%r14,8), %zmm27, %zmm28 + +// CHECK: vpsraw 2032(%rdx), %zmm27, %zmm28 +// CHECK: encoding: [0x62,0x61,0x25,0x40,0xe1,0x62,0x7f] + vpsraw 2032(%rdx), %zmm27, %zmm28 + +// CHECK: vpsraw 2048(%rdx), %zmm27, %zmm28 +// CHECK: encoding: [0x62,0x61,0x25,0x40,0xe1,0xa2,0x00,0x08,0x00,0x00] + vpsraw 2048(%rdx), %zmm27, %zmm28 + +// CHECK: vpsraw -2048(%rdx), %zmm27, %zmm28 +// CHECK: encoding: [0x62,0x61,0x25,0x40,0xe1,0x62,0x80] + vpsraw -2048(%rdx), %zmm27, %zmm28 + +// CHECK: vpsraw -2064(%rdx), %zmm27, %zmm28 +// CHECK: encoding: [0x62,0x61,0x25,0x40,0xe1,0xa2,0xf0,0xf7,0xff,0xff] + vpsraw -2064(%rdx), %zmm27, %zmm28 + +// CHECK: vpsrlw %xmm22, %zmm20, %zmm23 +// CHECK: encoding: [0x62,0xa1,0x5d,0x40,0xd1,0xfe] + vpsrlw %xmm22, %zmm20, %zmm23 + +// CHECK: vpsrlw %xmm22, %zmm20, %zmm23 {%k6} +// CHECK: encoding: [0x62,0xa1,0x5d,0x46,0xd1,0xfe] + vpsrlw %xmm22, %zmm20, %zmm23 {%k6} + +// CHECK: vpsrlw %xmm22, %zmm20, %zmm23 {%k6} {z} +// CHECK: encoding: [0x62,0xa1,0x5d,0xc6,0xd1,0xfe] + vpsrlw %xmm22, %zmm20, %zmm23 {%k6} {z} + +// CHECK: vpsrlw (%rcx), %zmm20, %zmm23 +// CHECK: encoding: [0x62,0xe1,0x5d,0x40,0xd1,0x39] + vpsrlw (%rcx), %zmm20, %zmm23 + +// CHECK: vpsrlw 291(%rax,%r14,8), %zmm20, %zmm23 +// CHECK: encoding: [0x62,0xa1,0x5d,0x40,0xd1,0xbc,0xf0,0x23,0x01,0x00,0x00] + vpsrlw 291(%rax,%r14,8), %zmm20, %zmm23 + +// CHECK: vpsrlw 2032(%rdx), %zmm20, %zmm23 +// CHECK: encoding: [0x62,0xe1,0x5d,0x40,0xd1,0x7a,0x7f] + vpsrlw 2032(%rdx), %zmm20, %zmm23 + +// CHECK: vpsrlw 2048(%rdx), %zmm20, %zmm23 +// CHECK: encoding: [0x62,0xe1,0x5d,0x40,0xd1,0xba,0x00,0x08,0x00,0x00] + vpsrlw 2048(%rdx), %zmm20, %zmm23 + +// CHECK: vpsrlw -2048(%rdx), %zmm20, %zmm23 +// CHECK: encoding: [0x62,0xe1,0x5d,0x40,0xd1,0x7a,0x80] + vpsrlw -2048(%rdx), %zmm20, %zmm23 + +// CHECK: vpsrlw -2064(%rdx), %zmm20, %zmm23 +// CHECK: encoding: [0x62,0xe1,0x5d,0x40,0xd1,0xba,0xf0,0xf7,0xff,0xff] + vpsrlw -2064(%rdx), %zmm20, %zmm23 + +// CHECK: vpsrlw $171, %zmm26, %zmm25 +// CHECK: encoding: [0x62,0x91,0x35,0x40,0x71,0xd2,0xab] + vpsrlw $171, %zmm26, %zmm25 + +// CHECK: vpsrlw $171, %zmm26, %zmm25 {%k6} +// CHECK: encoding: [0x62,0x91,0x35,0x46,0x71,0xd2,0xab] + vpsrlw $171, %zmm26, %zmm25 {%k6} + +// CHECK: vpsrlw $171, %zmm26, %zmm25 {%k6} {z} +// CHECK: encoding: [0x62,0x91,0x35,0xc6,0x71,0xd2,0xab] + vpsrlw $171, %zmm26, %zmm25 {%k6} {z} + +// CHECK: vpsrlw $123, %zmm26, %zmm25 +// CHECK: encoding: [0x62,0x91,0x35,0x40,0x71,0xd2,0x7b] + vpsrlw $123, %zmm26, %zmm25 + +// CHECK: vpsrlw $123, (%rcx), %zmm25 +// CHECK: encoding: [0x62,0xf1,0x35,0x40,0x71,0x11,0x7b] + vpsrlw $123, (%rcx), %zmm25 + +// CHECK: vpsrlw $123, 291(%rax,%r14,8), %zmm25 +// CHECK: encoding: [0x62,0xb1,0x35,0x40,0x71,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpsrlw $123, 291(%rax,%r14,8), %zmm25 + +// CHECK: vpsrlw $123, 8128(%rdx), %zmm25 +// CHECK: encoding: [0x62,0xf1,0x35,0x40,0x71,0x52,0x7f,0x7b] + vpsrlw $123, 8128(%rdx), %zmm25 + +// CHECK: vpsrlw $123, 8192(%rdx), %zmm25 +// CHECK: encoding: [0x62,0xf1,0x35,0x40,0x71,0x92,0x00,0x20,0x00,0x00,0x7b] + vpsrlw $123, 8192(%rdx), %zmm25 + +// CHECK: vpsrlw $123, -8192(%rdx), %zmm25 +// CHECK: encoding: [0x62,0xf1,0x35,0x40,0x71,0x52,0x80,0x7b] + vpsrlw $123, -8192(%rdx), %zmm25 + +// CHECK: vpsrlw $123, -8256(%rdx), %zmm25 +// CHECK: encoding: [0x62,0xf1,0x35,0x40,0x71,0x92,0xc0,0xdf,0xff,0xff,0x7b] + vpsrlw $123, -8256(%rdx), %zmm25 + +// CHECK: vpsraw $171, %zmm29, %zmm28 +// CHECK: encoding: [0x62,0x91,0x1d,0x40,0x71,0xe5,0xab] + vpsraw $171, %zmm29, %zmm28 + +// CHECK: vpsraw $171, %zmm29, %zmm28 {%k4} +// CHECK: encoding: [0x62,0x91,0x1d,0x44,0x71,0xe5,0xab] + vpsraw $171, %zmm29, %zmm28 {%k4} + +// CHECK: vpsraw $171, %zmm29, %zmm28 {%k4} {z} +// CHECK: encoding: [0x62,0x91,0x1d,0xc4,0x71,0xe5,0xab] + vpsraw $171, %zmm29, %zmm28 {%k4} {z} + +// CHECK: vpsraw $123, %zmm29, %zmm28 +// CHECK: encoding: [0x62,0x91,0x1d,0x40,0x71,0xe5,0x7b] + vpsraw $123, %zmm29, %zmm28 + +// CHECK: vpsraw $123, (%rcx), %zmm28 +// CHECK: encoding: [0x62,0xf1,0x1d,0x40,0x71,0x21,0x7b] + vpsraw $123, (%rcx), %zmm28 + +// CHECK: vpsraw $123, 291(%rax,%r14,8), %zmm28 +// CHECK: encoding: [0x62,0xb1,0x1d,0x40,0x71,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpsraw $123, 291(%rax,%r14,8), %zmm28 + +// CHECK: vpsraw $123, 8128(%rdx), %zmm28 +// CHECK: encoding: [0x62,0xf1,0x1d,0x40,0x71,0x62,0x7f,0x7b] + vpsraw $123, 8128(%rdx), %zmm28 + +// CHECK: vpsraw $123, 8192(%rdx), %zmm28 +// CHECK: encoding: [0x62,0xf1,0x1d,0x40,0x71,0xa2,0x00,0x20,0x00,0x00,0x7b] + vpsraw $123, 8192(%rdx), %zmm28 + +// CHECK: vpsraw $123, -8192(%rdx), %zmm28 +// CHECK: encoding: [0x62,0xf1,0x1d,0x40,0x71,0x62,0x80,0x7b] + vpsraw $123, -8192(%rdx), %zmm28 + +// CHECK: vpsraw $123, -8256(%rdx), %zmm28 +// CHECK: encoding: [0x62,0xf1,0x1d,0x40,0x71,0xa2,0xc0,0xdf,0xff,0xff,0x7b] + vpsraw $123, -8256(%rdx), %zmm28 + +// CHECK: vpsrlvw %zmm21, %zmm18, %zmm17 +// CHECK: encoding: [0x62,0xa2,0xed,0x40,0x10,0xcd] + vpsrlvw %zmm21, %zmm18, %zmm17 + +// CHECK: vpsrlvw %zmm21, %zmm18, %zmm17 {%k6} +// CHECK: encoding: [0x62,0xa2,0xed,0x46,0x10,0xcd] + vpsrlvw %zmm21, %zmm18, %zmm17 {%k6} + +// CHECK: vpsrlvw %zmm21, %zmm18, %zmm17 {%k6} {z} +// CHECK: encoding: [0x62,0xa2,0xed,0xc6,0x10,0xcd] + vpsrlvw %zmm21, %zmm18, %zmm17 {%k6} {z} + +// CHECK: vpsrlvw (%rcx), %zmm18, %zmm17 +// CHECK: encoding: [0x62,0xe2,0xed,0x40,0x10,0x09] + vpsrlvw (%rcx), %zmm18, %zmm17 + +// CHECK: vpsrlvw 291(%rax,%r14,8), %zmm18, %zmm17 +// CHECK: encoding: [0x62,0xa2,0xed,0x40,0x10,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpsrlvw 291(%rax,%r14,8), %zmm18, %zmm17 + +// CHECK: vpsrlvw 8128(%rdx), %zmm18, %zmm17 +// CHECK: encoding: [0x62,0xe2,0xed,0x40,0x10,0x4a,0x7f] + vpsrlvw 8128(%rdx), %zmm18, %zmm17 + +// CHECK: vpsrlvw 8192(%rdx), %zmm18, %zmm17 +// CHECK: encoding: [0x62,0xe2,0xed,0x40,0x10,0x8a,0x00,0x20,0x00,0x00] + vpsrlvw 8192(%rdx), %zmm18, %zmm17 + +// CHECK: vpsrlvw -8192(%rdx), %zmm18, %zmm17 +// CHECK: encoding: [0x62,0xe2,0xed,0x40,0x10,0x4a,0x80] + vpsrlvw -8192(%rdx), %zmm18, %zmm17 + +// CHECK: vpsrlvw -8256(%rdx), %zmm18, %zmm17 +// CHECK: encoding: [0x62,0xe2,0xed,0x40,0x10,0x8a,0xc0,0xdf,0xff,0xff] + vpsrlvw -8256(%rdx), %zmm18, %zmm17 + +// CHECK: vpsravw %zmm20, %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xa2,0x95,0x40,0x11,0xdc] + vpsravw %zmm20, %zmm29, %zmm19 + +// CHECK: vpsravw %zmm20, %zmm29, %zmm19 {%k7} +// CHECK: encoding: [0x62,0xa2,0x95,0x47,0x11,0xdc] + vpsravw %zmm20, %zmm29, %zmm19 {%k7} + +// CHECK: vpsravw %zmm20, %zmm29, %zmm19 {%k7} {z} +// CHECK: encoding: [0x62,0xa2,0x95,0xc7,0x11,0xdc] + vpsravw %zmm20, %zmm29, %zmm19 {%k7} {z} + +// CHECK: vpsravw (%rcx), %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xe2,0x95,0x40,0x11,0x19] + vpsravw (%rcx), %zmm29, %zmm19 + +// CHECK: vpsravw 291(%rax,%r14,8), %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xa2,0x95,0x40,0x11,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpsravw 291(%rax,%r14,8), %zmm29, %zmm19 + +// CHECK: vpsravw 8128(%rdx), %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xe2,0x95,0x40,0x11,0x5a,0x7f] + vpsravw 8128(%rdx), %zmm29, %zmm19 + +// CHECK: vpsravw 8192(%rdx), %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xe2,0x95,0x40,0x11,0x9a,0x00,0x20,0x00,0x00] + vpsravw 8192(%rdx), %zmm29, %zmm19 + +// CHECK: vpsravw -8192(%rdx), %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xe2,0x95,0x40,0x11,0x5a,0x80] + vpsravw -8192(%rdx), %zmm29, %zmm19 + +// CHECK: vpsravw -8256(%rdx), %zmm29, %zmm19 +// CHECK: encoding: [0x62,0xe2,0x95,0x40,0x11,0x9a,0xc0,0xdf,0xff,0xff] + vpsravw -8256(%rdx), %zmm29, %zmm19 + diff --git a/test/MC/X86/x86-64-avx512bw_vl.s b/test/MC/X86/x86-64-avx512bw_vl.s index e847550..3f45582 100644 --- a/test/MC/X86/x86-64-avx512bw_vl.s +++ b/test/MC/X86/x86-64-avx512bw_vl.s @@ -1783,3 +1783,523 @@ // CHECK: vmovdqu16 %ymm29, -4128(%rdx) // CHECK: encoding: [0x62,0x61,0xff,0x28,0x7f,0xaa,0xe0,0xef,0xff,0xff] vmovdqu16 %ymm29, -4128(%rdx) + +// CHECK: vpsllw %xmm26, %xmm23, %xmm19 +// CHECK: encoding: [0x62,0x81,0x45,0x00,0xf1,0xda] + vpsllw %xmm26, %xmm23, %xmm19 + +// CHECK: vpsllw %xmm26, %xmm23, %xmm19 {%k7} +// CHECK: encoding: [0x62,0x81,0x45,0x07,0xf1,0xda] + vpsllw %xmm26, %xmm23, %xmm19 {%k7} + +// CHECK: vpsllw %xmm26, %xmm23, %xmm19 {%k7} {z} +// CHECK: encoding: [0x62,0x81,0x45,0x87,0xf1,0xda] + vpsllw %xmm26, %xmm23, %xmm19 {%k7} {z} + +// CHECK: vpsllw (%rcx), %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x45,0x00,0xf1,0x19] + vpsllw (%rcx), %xmm23, %xmm19 + +// CHECK: vpsllw 291(%rax,%r14,8), %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xa1,0x45,0x00,0xf1,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpsllw 291(%rax,%r14,8), %xmm23, %xmm19 + +// CHECK: vpsllw 2032(%rdx), %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x45,0x00,0xf1,0x5a,0x7f] + vpsllw 2032(%rdx), %xmm23, %xmm19 + +// CHECK: vpsllw 2048(%rdx), %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x45,0x00,0xf1,0x9a,0x00,0x08,0x00,0x00] + vpsllw 2048(%rdx), %xmm23, %xmm19 + +// CHECK: vpsllw -2048(%rdx), %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x45,0x00,0xf1,0x5a,0x80] + vpsllw -2048(%rdx), %xmm23, %xmm19 + +// CHECK: vpsllw -2064(%rdx), %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x45,0x00,0xf1,0x9a,0xf0,0xf7,0xff,0xff] + vpsllw -2064(%rdx), %xmm23, %xmm19 + +// CHECK: vpsllw %xmm26, %ymm21, %ymm20 +// CHECK: encoding: [0x62,0x81,0x55,0x20,0xf1,0xe2] + vpsllw %xmm26, %ymm21, %ymm20 + +// CHECK: vpsllw %xmm26, %ymm21, %ymm20 {%k7} +// CHECK: encoding: [0x62,0x81,0x55,0x27,0xf1,0xe2] + vpsllw %xmm26, %ymm21, %ymm20 {%k7} + +// CHECK: vpsllw %xmm26, %ymm21, %ymm20 {%k7} {z} +// CHECK: encoding: [0x62,0x81,0x55,0xa7,0xf1,0xe2] + vpsllw %xmm26, %ymm21, %ymm20 {%k7} {z} + +// CHECK: vpsllw (%rcx), %ymm21, %ymm20 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xf1,0x21] + vpsllw (%rcx), %ymm21, %ymm20 + +// CHECK: vpsllw 291(%rax,%r14,8), %ymm21, %ymm20 +// CHECK: encoding: [0x62,0xa1,0x55,0x20,0xf1,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsllw 291(%rax,%r14,8), %ymm21, %ymm20 + +// CHECK: vpsllw 2032(%rdx), %ymm21, %ymm20 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xf1,0x62,0x7f] + vpsllw 2032(%rdx), %ymm21, %ymm20 + +// CHECK: vpsllw 2048(%rdx), %ymm21, %ymm20 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xf1,0xa2,0x00,0x08,0x00,0x00] + vpsllw 2048(%rdx), %ymm21, %ymm20 + +// CHECK: vpsllw -2048(%rdx), %ymm21, %ymm20 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xf1,0x62,0x80] + vpsllw -2048(%rdx), %ymm21, %ymm20 + +// CHECK: vpsllw -2064(%rdx), %ymm21, %ymm20 +// CHECK: encoding: [0x62,0xe1,0x55,0x20,0xf1,0xa2,0xf0,0xf7,0xff,0xff] + vpsllw -2064(%rdx), %ymm21, %ymm20 + +// CHECK: vpsraw %xmm28, %xmm28, %xmm17 +// CHECK: encoding: [0x62,0x81,0x1d,0x00,0xe1,0xcc] + vpsraw %xmm28, %xmm28, %xmm17 + +// CHECK: vpsraw %xmm28, %xmm28, %xmm17 {%k1} +// CHECK: encoding: [0x62,0x81,0x1d,0x01,0xe1,0xcc] + vpsraw %xmm28, %xmm28, %xmm17 {%k1} + +// CHECK: vpsraw %xmm28, %xmm28, %xmm17 {%k1} {z} +// CHECK: encoding: [0x62,0x81,0x1d,0x81,0xe1,0xcc] + vpsraw %xmm28, %xmm28, %xmm17 {%k1} {z} + +// CHECK: vpsraw (%rcx), %xmm28, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x1d,0x00,0xe1,0x09] + vpsraw (%rcx), %xmm28, %xmm17 + +// CHECK: vpsraw 291(%rax,%r14,8), %xmm28, %xmm17 +// CHECK: encoding: [0x62,0xa1,0x1d,0x00,0xe1,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpsraw 291(%rax,%r14,8), %xmm28, %xmm17 + +// CHECK: vpsraw 2032(%rdx), %xmm28, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x1d,0x00,0xe1,0x4a,0x7f] + vpsraw 2032(%rdx), %xmm28, %xmm17 + +// CHECK: vpsraw 2048(%rdx), %xmm28, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x1d,0x00,0xe1,0x8a,0x00,0x08,0x00,0x00] + vpsraw 2048(%rdx), %xmm28, %xmm17 + +// CHECK: vpsraw -2048(%rdx), %xmm28, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x1d,0x00,0xe1,0x4a,0x80] + vpsraw -2048(%rdx), %xmm28, %xmm17 + +// CHECK: vpsraw -2064(%rdx), %xmm28, %xmm17 +// CHECK: encoding: [0x62,0xe1,0x1d,0x00,0xe1,0x8a,0xf0,0xf7,0xff,0xff] + vpsraw -2064(%rdx), %xmm28, %xmm17 + +// CHECK: vpsraw %xmm19, %ymm26, %ymm18 +// CHECK: encoding: [0x62,0xa1,0x2d,0x20,0xe1,0xd3] + vpsraw %xmm19, %ymm26, %ymm18 + +// CHECK: vpsraw %xmm19, %ymm26, %ymm18 {%k7} +// CHECK: encoding: [0x62,0xa1,0x2d,0x27,0xe1,0xd3] + vpsraw %xmm19, %ymm26, %ymm18 {%k7} + +// CHECK: vpsraw %xmm19, %ymm26, %ymm18 {%k7} {z} +// CHECK: encoding: [0x62,0xa1,0x2d,0xa7,0xe1,0xd3] + vpsraw %xmm19, %ymm26, %ymm18 {%k7} {z} + +// CHECK: vpsraw (%rcx), %ymm26, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x2d,0x20,0xe1,0x11] + vpsraw (%rcx), %ymm26, %ymm18 + +// CHECK: vpsraw 291(%rax,%r14,8), %ymm26, %ymm18 +// CHECK: encoding: [0x62,0xa1,0x2d,0x20,0xe1,0x94,0xf0,0x23,0x01,0x00,0x00] + vpsraw 291(%rax,%r14,8), %ymm26, %ymm18 + +// CHECK: vpsraw 2032(%rdx), %ymm26, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x2d,0x20,0xe1,0x52,0x7f] + vpsraw 2032(%rdx), %ymm26, %ymm18 + +// CHECK: vpsraw 2048(%rdx), %ymm26, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x2d,0x20,0xe1,0x92,0x00,0x08,0x00,0x00] + vpsraw 2048(%rdx), %ymm26, %ymm18 + +// CHECK: vpsraw -2048(%rdx), %ymm26, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x2d,0x20,0xe1,0x52,0x80] + vpsraw -2048(%rdx), %ymm26, %ymm18 + +// CHECK: vpsraw -2064(%rdx), %ymm26, %ymm18 +// CHECK: encoding: [0x62,0xe1,0x2d,0x20,0xe1,0x92,0xf0,0xf7,0xff,0xff] + vpsraw -2064(%rdx), %ymm26, %ymm18 + +// CHECK: vpsrlw %xmm27, %xmm29, %xmm30 +// CHECK: encoding: [0x62,0x01,0x15,0x00,0xd1,0xf3] + vpsrlw %xmm27, %xmm29, %xmm30 + +// CHECK: vpsrlw %xmm27, %xmm29, %xmm30 {%k1} +// CHECK: encoding: [0x62,0x01,0x15,0x01,0xd1,0xf3] + vpsrlw %xmm27, %xmm29, %xmm30 {%k1} + +// CHECK: vpsrlw %xmm27, %xmm29, %xmm30 {%k1} {z} +// CHECK: encoding: [0x62,0x01,0x15,0x81,0xd1,0xf3] + vpsrlw %xmm27, %xmm29, %xmm30 {%k1} {z} + +// CHECK: vpsrlw (%rcx), %xmm29, %xmm30 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xd1,0x31] + vpsrlw (%rcx), %xmm29, %xmm30 + +// CHECK: vpsrlw 291(%rax,%r14,8), %xmm29, %xmm30 +// CHECK: encoding: [0x62,0x21,0x15,0x00,0xd1,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpsrlw 291(%rax,%r14,8), %xmm29, %xmm30 + +// CHECK: vpsrlw 2032(%rdx), %xmm29, %xmm30 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xd1,0x72,0x7f] + vpsrlw 2032(%rdx), %xmm29, %xmm30 + +// CHECK: vpsrlw 2048(%rdx), %xmm29, %xmm30 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xd1,0xb2,0x00,0x08,0x00,0x00] + vpsrlw 2048(%rdx), %xmm29, %xmm30 + +// CHECK: vpsrlw -2048(%rdx), %xmm29, %xmm30 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xd1,0x72,0x80] + vpsrlw -2048(%rdx), %xmm29, %xmm30 + +// CHECK: vpsrlw -2064(%rdx), %xmm29, %xmm30 +// CHECK: encoding: [0x62,0x61,0x15,0x00,0xd1,0xb2,0xf0,0xf7,0xff,0xff] + vpsrlw -2064(%rdx), %xmm29, %xmm30 + +// CHECK: vpsrlw %xmm27, %ymm18, %ymm28 +// CHECK: encoding: [0x62,0x01,0x6d,0x20,0xd1,0xe3] + vpsrlw %xmm27, %ymm18, %ymm28 + +// CHECK: vpsrlw %xmm27, %ymm18, %ymm28 {%k2} +// CHECK: encoding: [0x62,0x01,0x6d,0x22,0xd1,0xe3] + vpsrlw %xmm27, %ymm18, %ymm28 {%k2} + +// CHECK: vpsrlw %xmm27, %ymm18, %ymm28 {%k2} {z} +// CHECK: encoding: [0x62,0x01,0x6d,0xa2,0xd1,0xe3] + vpsrlw %xmm27, %ymm18, %ymm28 {%k2} {z} + +// CHECK: vpsrlw (%rcx), %ymm18, %ymm28 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xd1,0x21] + vpsrlw (%rcx), %ymm18, %ymm28 + +// CHECK: vpsrlw 291(%rax,%r14,8), %ymm18, %ymm28 +// CHECK: encoding: [0x62,0x21,0x6d,0x20,0xd1,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsrlw 291(%rax,%r14,8), %ymm18, %ymm28 + +// CHECK: vpsrlw 2032(%rdx), %ymm18, %ymm28 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xd1,0x62,0x7f] + vpsrlw 2032(%rdx), %ymm18, %ymm28 + +// CHECK: vpsrlw 2048(%rdx), %ymm18, %ymm28 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xd1,0xa2,0x00,0x08,0x00,0x00] + vpsrlw 2048(%rdx), %ymm18, %ymm28 + +// CHECK: vpsrlw -2048(%rdx), %ymm18, %ymm28 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xd1,0x62,0x80] + vpsrlw -2048(%rdx), %ymm18, %ymm28 + +// CHECK: vpsrlw -2064(%rdx), %ymm18, %ymm28 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xd1,0xa2,0xf0,0xf7,0xff,0xff] + vpsrlw -2064(%rdx), %ymm18, %ymm28 + +// CHECK: vpsrlw $171, %xmm21, %xmm22 +// CHECK: encoding: [0x62,0xb1,0x4d,0x00,0x71,0xd5,0xab] + vpsrlw $171, %xmm21, %xmm22 + +// CHECK: vpsrlw $171, %xmm21, %xmm22 {%k7} +// CHECK: encoding: [0x62,0xb1,0x4d,0x07,0x71,0xd5,0xab] + vpsrlw $171, %xmm21, %xmm22 {%k7} + +// CHECK: vpsrlw $171, %xmm21, %xmm22 {%k7} {z} +// CHECK: encoding: [0x62,0xb1,0x4d,0x87,0x71,0xd5,0xab] + vpsrlw $171, %xmm21, %xmm22 {%k7} {z} + +// CHECK: vpsrlw $123, %xmm21, %xmm22 +// CHECK: encoding: [0x62,0xb1,0x4d,0x00,0x71,0xd5,0x7b] + vpsrlw $123, %xmm21, %xmm22 + +// CHECK: vpsrlw $123, (%rcx), %xmm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x00,0x71,0x11,0x7b] + vpsrlw $123, (%rcx), %xmm22 + +// CHECK: vpsrlw $123, 291(%rax,%r14,8), %xmm22 +// CHECK: encoding: [0x62,0xb1,0x4d,0x00,0x71,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpsrlw $123, 291(%rax,%r14,8), %xmm22 + +// CHECK: vpsrlw $123, 2032(%rdx), %xmm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x00,0x71,0x52,0x7f,0x7b] + vpsrlw $123, 2032(%rdx), %xmm22 + +// CHECK: vpsrlw $123, 2048(%rdx), %xmm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x00,0x71,0x92,0x00,0x08,0x00,0x00,0x7b] + vpsrlw $123, 2048(%rdx), %xmm22 + +// CHECK: vpsrlw $123, -2048(%rdx), %xmm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x00,0x71,0x52,0x80,0x7b] + vpsrlw $123, -2048(%rdx), %xmm22 + +// CHECK: vpsrlw $123, -2064(%rdx), %xmm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x00,0x71,0x92,0xf0,0xf7,0xff,0xff,0x7b] + vpsrlw $123, -2064(%rdx), %xmm22 + +// CHECK: vpsrlw $171, %ymm19, %ymm27 +// CHECK: encoding: [0x62,0xb1,0x25,0x20,0x71,0xd3,0xab] + vpsrlw $171, %ymm19, %ymm27 + +// CHECK: vpsrlw $171, %ymm19, %ymm27 {%k3} +// CHECK: encoding: [0x62,0xb1,0x25,0x23,0x71,0xd3,0xab] + vpsrlw $171, %ymm19, %ymm27 {%k3} + +// CHECK: vpsrlw $171, %ymm19, %ymm27 {%k3} {z} +// CHECK: encoding: [0x62,0xb1,0x25,0xa3,0x71,0xd3,0xab] + vpsrlw $171, %ymm19, %ymm27 {%k3} {z} + +// CHECK: vpsrlw $123, %ymm19, %ymm27 +// CHECK: encoding: [0x62,0xb1,0x25,0x20,0x71,0xd3,0x7b] + vpsrlw $123, %ymm19, %ymm27 + +// CHECK: vpsrlw $123, (%rcx), %ymm27 +// CHECK: encoding: [0x62,0xf1,0x25,0x20,0x71,0x11,0x7b] + vpsrlw $123, (%rcx), %ymm27 + +// CHECK: vpsrlw $123, 291(%rax,%r14,8), %ymm27 +// CHECK: encoding: [0x62,0xb1,0x25,0x20,0x71,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpsrlw $123, 291(%rax,%r14,8), %ymm27 + +// CHECK: vpsrlw $123, 4064(%rdx), %ymm27 +// CHECK: encoding: [0x62,0xf1,0x25,0x20,0x71,0x52,0x7f,0x7b] + vpsrlw $123, 4064(%rdx), %ymm27 + +// CHECK: vpsrlw $123, 4096(%rdx), %ymm27 +// CHECK: encoding: [0x62,0xf1,0x25,0x20,0x71,0x92,0x00,0x10,0x00,0x00,0x7b] + vpsrlw $123, 4096(%rdx), %ymm27 + +// CHECK: vpsrlw $123, -4096(%rdx), %ymm27 +// CHECK: encoding: [0x62,0xf1,0x25,0x20,0x71,0x52,0x80,0x7b] + vpsrlw $123, -4096(%rdx), %ymm27 + +// CHECK: vpsrlw $123, -4128(%rdx), %ymm27 +// CHECK: encoding: [0x62,0xf1,0x25,0x20,0x71,0x92,0xe0,0xef,0xff,0xff,0x7b] + vpsrlw $123, -4128(%rdx), %ymm27 + +// CHECK: vpsraw $171, %xmm22, %xmm22 +// CHECK: encoding: [0x62,0xb1,0x4d,0x00,0x71,0xe6,0xab] + vpsraw $171, %xmm22, %xmm22 + +// CHECK: vpsraw $171, %xmm22, %xmm22 {%k4} +// CHECK: encoding: [0x62,0xb1,0x4d,0x04,0x71,0xe6,0xab] + vpsraw $171, %xmm22, %xmm22 {%k4} + +// CHECK: vpsraw $171, %xmm22, %xmm22 {%k4} {z} +// CHECK: encoding: [0x62,0xb1,0x4d,0x84,0x71,0xe6,0xab] + vpsraw $171, %xmm22, %xmm22 {%k4} {z} + +// CHECK: vpsraw $123, %xmm22, %xmm22 +// CHECK: encoding: [0x62,0xb1,0x4d,0x00,0x71,0xe6,0x7b] + vpsraw $123, %xmm22, %xmm22 + +// CHECK: vpsraw $123, (%rcx), %xmm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x00,0x71,0x21,0x7b] + vpsraw $123, (%rcx), %xmm22 + +// CHECK: vpsraw $123, 291(%rax,%r14,8), %xmm22 +// CHECK: encoding: [0x62,0xb1,0x4d,0x00,0x71,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpsraw $123, 291(%rax,%r14,8), %xmm22 + +// CHECK: vpsraw $123, 2032(%rdx), %xmm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x00,0x71,0x62,0x7f,0x7b] + vpsraw $123, 2032(%rdx), %xmm22 + +// CHECK: vpsraw $123, 2048(%rdx), %xmm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x00,0x71,0xa2,0x00,0x08,0x00,0x00,0x7b] + vpsraw $123, 2048(%rdx), %xmm22 + +// CHECK: vpsraw $123, -2048(%rdx), %xmm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x00,0x71,0x62,0x80,0x7b] + vpsraw $123, -2048(%rdx), %xmm22 + +// CHECK: vpsraw $123, -2064(%rdx), %xmm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x00,0x71,0xa2,0xf0,0xf7,0xff,0xff,0x7b] + vpsraw $123, -2064(%rdx), %xmm22 + +// CHECK: vpsraw $171, %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xb1,0x65,0x20,0x71,0xe6,0xab] + vpsraw $171, %ymm22, %ymm19 + +// CHECK: vpsraw $171, %ymm22, %ymm19 {%k7} +// CHECK: encoding: [0x62,0xb1,0x65,0x27,0x71,0xe6,0xab] + vpsraw $171, %ymm22, %ymm19 {%k7} + +// CHECK: vpsraw $171, %ymm22, %ymm19 {%k7} {z} +// CHECK: encoding: [0x62,0xb1,0x65,0xa7,0x71,0xe6,0xab] + vpsraw $171, %ymm22, %ymm19 {%k7} {z} + +// CHECK: vpsraw $123, %ymm22, %ymm19 +// CHECK: encoding: [0x62,0xb1,0x65,0x20,0x71,0xe6,0x7b] + vpsraw $123, %ymm22, %ymm19 + +// CHECK: vpsraw $123, (%rcx), %ymm19 +// CHECK: encoding: [0x62,0xf1,0x65,0x20,0x71,0x21,0x7b] + vpsraw $123, (%rcx), %ymm19 + +// CHECK: vpsraw $123, 291(%rax,%r14,8), %ymm19 +// CHECK: encoding: [0x62,0xb1,0x65,0x20,0x71,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpsraw $123, 291(%rax,%r14,8), %ymm19 + +// CHECK: vpsraw $123, 4064(%rdx), %ymm19 +// CHECK: encoding: [0x62,0xf1,0x65,0x20,0x71,0x62,0x7f,0x7b] + vpsraw $123, 4064(%rdx), %ymm19 + +// CHECK: vpsraw $123, 4096(%rdx), %ymm19 +// CHECK: encoding: [0x62,0xf1,0x65,0x20,0x71,0xa2,0x00,0x10,0x00,0x00,0x7b] + vpsraw $123, 4096(%rdx), %ymm19 + +// CHECK: vpsraw $123, -4096(%rdx), %ymm19 +// CHECK: encoding: [0x62,0xf1,0x65,0x20,0x71,0x62,0x80,0x7b] + vpsraw $123, -4096(%rdx), %ymm19 + +// CHECK: vpsraw $123, -4128(%rdx), %ymm19 +// CHECK: encoding: [0x62,0xf1,0x65,0x20,0x71,0xa2,0xe0,0xef,0xff,0xff,0x7b] + vpsraw $123, -4128(%rdx), %ymm19 + +// CHECK: vpsrlvw %xmm19, %xmm22, %xmm30 +// CHECK: encoding: [0x62,0x22,0xcd,0x00,0x10,0xf3] + vpsrlvw %xmm19, %xmm22, %xmm30 + +// CHECK: vpsrlvw %xmm19, %xmm22, %xmm30 {%k7} +// CHECK: encoding: [0x62,0x22,0xcd,0x07,0x10,0xf3] + vpsrlvw %xmm19, %xmm22, %xmm30 {%k7} + +// CHECK: vpsrlvw %xmm19, %xmm22, %xmm30 {%k7} {z} +// CHECK: encoding: [0x62,0x22,0xcd,0x87,0x10,0xf3] + vpsrlvw %xmm19, %xmm22, %xmm30 {%k7} {z} + +// CHECK: vpsrlvw (%rcx), %xmm22, %xmm30 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x10,0x31] + vpsrlvw (%rcx), %xmm22, %xmm30 + +// CHECK: vpsrlvw 291(%rax,%r14,8), %xmm22, %xmm30 +// CHECK: encoding: [0x62,0x22,0xcd,0x00,0x10,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpsrlvw 291(%rax,%r14,8), %xmm22, %xmm30 + +// CHECK: vpsrlvw 2032(%rdx), %xmm22, %xmm30 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x10,0x72,0x7f] + vpsrlvw 2032(%rdx), %xmm22, %xmm30 + +// CHECK: vpsrlvw 2048(%rdx), %xmm22, %xmm30 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x10,0xb2,0x00,0x08,0x00,0x00] + vpsrlvw 2048(%rdx), %xmm22, %xmm30 + +// CHECK: vpsrlvw -2048(%rdx), %xmm22, %xmm30 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x10,0x72,0x80] + vpsrlvw -2048(%rdx), %xmm22, %xmm30 + +// CHECK: vpsrlvw -2064(%rdx), %xmm22, %xmm30 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x10,0xb2,0xf0,0xf7,0xff,0xff] + vpsrlvw -2064(%rdx), %xmm22, %xmm30 + +// CHECK: vpsrlvw %ymm27, %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x02,0xb5,0x20,0x10,0xf3] + vpsrlvw %ymm27, %ymm25, %ymm30 + +// CHECK: vpsrlvw %ymm27, %ymm25, %ymm30 {%k1} +// CHECK: encoding: [0x62,0x02,0xb5,0x21,0x10,0xf3] + vpsrlvw %ymm27, %ymm25, %ymm30 {%k1} + +// CHECK: vpsrlvw %ymm27, %ymm25, %ymm30 {%k1} {z} +// CHECK: encoding: [0x62,0x02,0xb5,0xa1,0x10,0xf3] + vpsrlvw %ymm27, %ymm25, %ymm30 {%k1} {z} + +// CHECK: vpsrlvw (%rcx), %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x10,0x31] + vpsrlvw (%rcx), %ymm25, %ymm30 + +// CHECK: vpsrlvw 291(%rax,%r14,8), %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x22,0xb5,0x20,0x10,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpsrlvw 291(%rax,%r14,8), %ymm25, %ymm30 + +// CHECK: vpsrlvw 4064(%rdx), %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x10,0x72,0x7f] + vpsrlvw 4064(%rdx), %ymm25, %ymm30 + +// CHECK: vpsrlvw 4096(%rdx), %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x10,0xb2,0x00,0x10,0x00,0x00] + vpsrlvw 4096(%rdx), %ymm25, %ymm30 + +// CHECK: vpsrlvw -4096(%rdx), %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x10,0x72,0x80] + vpsrlvw -4096(%rdx), %ymm25, %ymm30 + +// CHECK: vpsrlvw -4128(%rdx), %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x10,0xb2,0xe0,0xef,0xff,0xff] + vpsrlvw -4128(%rdx), %ymm25, %ymm30 + +// CHECK: vpsravw %xmm27, %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x02,0x9d,0x00,0x11,0xe3] + vpsravw %xmm27, %xmm28, %xmm28 + +// CHECK: vpsravw %xmm27, %xmm28, %xmm28 {%k3} +// CHECK: encoding: [0x62,0x02,0x9d,0x03,0x11,0xe3] + vpsravw %xmm27, %xmm28, %xmm28 {%k3} + +// CHECK: vpsravw %xmm27, %xmm28, %xmm28 {%k3} {z} +// CHECK: encoding: [0x62,0x02,0x9d,0x83,0x11,0xe3] + vpsravw %xmm27, %xmm28, %xmm28 {%k3} {z} + +// CHECK: vpsravw (%rcx), %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x00,0x11,0x21] + vpsravw (%rcx), %xmm28, %xmm28 + +// CHECK: vpsravw 291(%rax,%r14,8), %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x22,0x9d,0x00,0x11,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsravw 291(%rax,%r14,8), %xmm28, %xmm28 + +// CHECK: vpsravw 2032(%rdx), %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x00,0x11,0x62,0x7f] + vpsravw 2032(%rdx), %xmm28, %xmm28 + +// CHECK: vpsravw 2048(%rdx), %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x00,0x11,0xa2,0x00,0x08,0x00,0x00] + vpsravw 2048(%rdx), %xmm28, %xmm28 + +// CHECK: vpsravw -2048(%rdx), %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x00,0x11,0x62,0x80] + vpsravw -2048(%rdx), %xmm28, %xmm28 + +// CHECK: vpsravw -2064(%rdx), %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x00,0x11,0xa2,0xf0,0xf7,0xff,0xff] + vpsravw -2064(%rdx), %xmm28, %xmm28 + +// CHECK: vpsravw %ymm17, %ymm28, %ymm20 +// CHECK: encoding: [0x62,0xa2,0x9d,0x20,0x11,0xe1] + vpsravw %ymm17, %ymm28, %ymm20 + +// CHECK: vpsravw %ymm17, %ymm28, %ymm20 {%k5} +// CHECK: encoding: [0x62,0xa2,0x9d,0x25,0x11,0xe1] + vpsravw %ymm17, %ymm28, %ymm20 {%k5} + +// CHECK: vpsravw %ymm17, %ymm28, %ymm20 {%k5} {z} +// CHECK: encoding: [0x62,0xa2,0x9d,0xa5,0x11,0xe1] + vpsravw %ymm17, %ymm28, %ymm20 {%k5} {z} + +// CHECK: vpsravw (%rcx), %ymm28, %ymm20 +// CHECK: encoding: [0x62,0xe2,0x9d,0x20,0x11,0x21] + vpsravw (%rcx), %ymm28, %ymm20 + +// CHECK: vpsravw 291(%rax,%r14,8), %ymm28, %ymm20 +// CHECK: encoding: [0x62,0xa2,0x9d,0x20,0x11,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsravw 291(%rax,%r14,8), %ymm28, %ymm20 + +// CHECK: vpsravw 4064(%rdx), %ymm28, %ymm20 +// CHECK: encoding: [0x62,0xe2,0x9d,0x20,0x11,0x62,0x7f] + vpsravw 4064(%rdx), %ymm28, %ymm20 + +// CHECK: vpsravw 4096(%rdx), %ymm28, %ymm20 +// CHECK: encoding: [0x62,0xe2,0x9d,0x20,0x11,0xa2,0x00,0x10,0x00,0x00] + vpsravw 4096(%rdx), %ymm28, %ymm20 + +// CHECK: vpsravw -4096(%rdx), %ymm28, %ymm20 +// CHECK: encoding: [0x62,0xe2,0x9d,0x20,0x11,0x62,0x80] + vpsravw -4096(%rdx), %ymm28, %ymm20 + +// CHECK: vpsravw -4128(%rdx), %ymm28, %ymm20 +// CHECK: encoding: [0x62,0xe2,0x9d,0x20,0x11,0xa2,0xe0,0xef,0xff,0xff] + vpsravw -4128(%rdx), %ymm28, %ymm20 diff --git a/test/MC/X86/x86-64-avx512f_vl.s b/test/MC/X86/x86-64-avx512f_vl.s index ad121dc..09386b0 100644 --- a/test/MC/X86/x86-64-avx512f_vl.s +++ b/test/MC/X86/x86-64-avx512f_vl.s @@ -6651,3 +6651,2307 @@ // CHECK: vmovups %ymm23, -4128(%rdx) // CHECK: encoding: [0x62,0xe1,0x7c,0x28,0x11,0xba,0xe0,0xef,0xff,0xff] vmovups %ymm23, -4128(%rdx) + +// CHECK: vaddpd %zmm2, %zmm1, %zmm1 +// CHECK: encoding: [0x62,0xf1,0xf5,0x48,0x58,0xca] +vaddpd %zmm2, %zmm1, %zmm1 + +// CHECK: vaddpd %zmm2, %zmm1, %zmm1 {%k5} +// CHECK: encoding: [0x62,0xf1,0xf5,0x4d,0x58,0xca] +vaddpd %zmm2, %zmm1, %zmm1 {%k5} + +// CHECK: vaddpd %zmm2, %zmm1, %zmm1 {%k5} {z} +// CHECK: encoding: [0x62,0xf1,0xf5,0xcd,0x58,0xca] +vaddpd %zmm2, %zmm1, %zmm1 {%k5} {z} + +// CHECK: vaddpd {rn-sae}, %zmm2, %zmm1, %zmm1 {%k5} {z} +// CHECK: encoding: [0x62,0xf1,0xf5,0x9d,0x58,0xca] +vaddpd {rn-sae}, %zmm2, %zmm1, %zmm1 {%k5} {z} + +// CHECK: vaddpd {rn-sae}, %zmm2, %zmm1, %zmm1 +// CHECK: encoding: [0x62,0xf1,0xf5,0x18,0x58,0xca] +vaddpd {rn-sae}, %zmm2, %zmm1, %zmm1 + +// CHECK: vaddpd {ru-sae}, %zmm2, %zmm1, %zmm1 +// CHECK: encoding: [0x62,0xf1,0xf5,0x58,0x58,0xca] +vaddpd {ru-sae}, %zmm2, %zmm1, %zmm1 + +// CHECK: vaddpd {rd-sae}, %zmm2, %zmm1, %zmm1 +// CHECK: encoding: [0x62,0xf1,0xf5,0x38,0x58,0xca] +vaddpd {rd-sae}, %zmm2, %zmm1, %zmm1 + +// CHECK: vaddpd {rz-sae}, %zmm2, %zmm1, %zmm1 +// CHECK: encoding: [0x62,0xf1,0xf5,0x78,0x58,0xca] +vaddpd {rz-sae}, %zmm2, %zmm1, %zmm1 + +// CHECK: vpslld %xmm22, %xmm21, %xmm18 +// CHECK: encoding: [0x62,0xa1,0x55,0x00,0xf2,0xd6] + vpslld %xmm22, %xmm21, %xmm18 + +// CHECK: vpslld %xmm22, %xmm21, %xmm18 {%k1} +// CHECK: encoding: [0x62,0xa1,0x55,0x01,0xf2,0xd6] + vpslld %xmm22, %xmm21, %xmm18 {%k1} + +// CHECK: vpslld %xmm22, %xmm21, %xmm18 {%k1} {z} +// CHECK: encoding: [0x62,0xa1,0x55,0x81,0xf2,0xd6] + vpslld %xmm22, %xmm21, %xmm18 {%k1} {z} + +// CHECK: vpslld (%rcx), %xmm21, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x00,0xf2,0x11] + vpslld (%rcx), %xmm21, %xmm18 + +// CHECK: vpslld 291(%rax,%r14,8), %xmm21, %xmm18 +// CHECK: encoding: [0x62,0xa1,0x55,0x00,0xf2,0x94,0xf0,0x23,0x01,0x00,0x00] + vpslld 291(%rax,%r14,8), %xmm21, %xmm18 + +// CHECK: vpslld 2032(%rdx), %xmm21, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x00,0xf2,0x52,0x7f] + vpslld 2032(%rdx), %xmm21, %xmm18 + +// CHECK: vpslld 2048(%rdx), %xmm21, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x00,0xf2,0x92,0x00,0x08,0x00,0x00] + vpslld 2048(%rdx), %xmm21, %xmm18 + +// CHECK: vpslld -2048(%rdx), %xmm21, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x00,0xf2,0x52,0x80] + vpslld -2048(%rdx), %xmm21, %xmm18 + +// CHECK: vpslld -2064(%rdx), %xmm21, %xmm18 +// CHECK: encoding: [0x62,0xe1,0x55,0x00,0xf2,0x92,0xf0,0xf7,0xff,0xff] + vpslld -2064(%rdx), %xmm21, %xmm18 + +// CHECK: vpslld %xmm25, %ymm26, %ymm29 +// CHECK: encoding: [0x62,0x01,0x2d,0x20,0xf2,0xe9] + vpslld %xmm25, %ymm26, %ymm29 + +// CHECK: vpslld %xmm25, %ymm26, %ymm29 {%k7} +// CHECK: encoding: [0x62,0x01,0x2d,0x27,0xf2,0xe9] + vpslld %xmm25, %ymm26, %ymm29 {%k7} + +// CHECK: vpslld %xmm25, %ymm26, %ymm29 {%k7} {z} +// CHECK: encoding: [0x62,0x01,0x2d,0xa7,0xf2,0xe9] + vpslld %xmm25, %ymm26, %ymm29 {%k7} {z} + +// CHECK: vpslld (%rcx), %ymm26, %ymm29 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xf2,0x29] + vpslld (%rcx), %ymm26, %ymm29 + +// CHECK: vpslld 291(%rax,%r14,8), %ymm26, %ymm29 +// CHECK: encoding: [0x62,0x21,0x2d,0x20,0xf2,0xac,0xf0,0x23,0x01,0x00,0x00] + vpslld 291(%rax,%r14,8), %ymm26, %ymm29 + +// CHECK: vpslld 2032(%rdx), %ymm26, %ymm29 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xf2,0x6a,0x7f] + vpslld 2032(%rdx), %ymm26, %ymm29 + +// CHECK: vpslld 2048(%rdx), %ymm26, %ymm29 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xf2,0xaa,0x00,0x08,0x00,0x00] + vpslld 2048(%rdx), %ymm26, %ymm29 + +// CHECK: vpslld -2048(%rdx), %ymm26, %ymm29 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xf2,0x6a,0x80] + vpslld -2048(%rdx), %ymm26, %ymm29 + +// CHECK: vpslld -2064(%rdx), %ymm26, %ymm29 +// CHECK: encoding: [0x62,0x61,0x2d,0x20,0xf2,0xaa,0xf0,0xf7,0xff,0xff] + vpslld -2064(%rdx), %ymm26, %ymm29 + +// CHECK: vpsllq %xmm24, %xmm28, %xmm20 +// CHECK: encoding: [0x62,0x81,0x9d,0x00,0xf3,0xe0] + vpsllq %xmm24, %xmm28, %xmm20 + +// CHECK: vpsllq %xmm24, %xmm28, %xmm20 {%k1} +// CHECK: encoding: [0x62,0x81,0x9d,0x01,0xf3,0xe0] + vpsllq %xmm24, %xmm28, %xmm20 {%k1} + +// CHECK: vpsllq %xmm24, %xmm28, %xmm20 {%k1} {z} +// CHECK: encoding: [0x62,0x81,0x9d,0x81,0xf3,0xe0] + vpsllq %xmm24, %xmm28, %xmm20 {%k1} {z} + +// CHECK: vpsllq (%rcx), %xmm28, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xf3,0x21] + vpsllq (%rcx), %xmm28, %xmm20 + +// CHECK: vpsllq 291(%rax,%r14,8), %xmm28, %xmm20 +// CHECK: encoding: [0x62,0xa1,0x9d,0x00,0xf3,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsllq 291(%rax,%r14,8), %xmm28, %xmm20 + +// CHECK: vpsllq 2032(%rdx), %xmm28, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xf3,0x62,0x7f] + vpsllq 2032(%rdx), %xmm28, %xmm20 + +// CHECK: vpsllq 2048(%rdx), %xmm28, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xf3,0xa2,0x00,0x08,0x00,0x00] + vpsllq 2048(%rdx), %xmm28, %xmm20 + +// CHECK: vpsllq -2048(%rdx), %xmm28, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xf3,0x62,0x80] + vpsllq -2048(%rdx), %xmm28, %xmm20 + +// CHECK: vpsllq -2064(%rdx), %xmm28, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x9d,0x00,0xf3,0xa2,0xf0,0xf7,0xff,0xff] + vpsllq -2064(%rdx), %xmm28, %xmm20 + +// CHECK: vpsllq %xmm20, %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xa1,0xd5,0x20,0xf3,0xfc] + vpsllq %xmm20, %ymm21, %ymm23 + +// CHECK: vpsllq %xmm20, %ymm21, %ymm23 {%k1} +// CHECK: encoding: [0x62,0xa1,0xd5,0x21,0xf3,0xfc] + vpsllq %xmm20, %ymm21, %ymm23 {%k1} + +// CHECK: vpsllq %xmm20, %ymm21, %ymm23 {%k1} {z} +// CHECK: encoding: [0x62,0xa1,0xd5,0xa1,0xf3,0xfc] + vpsllq %xmm20, %ymm21, %ymm23 {%k1} {z} + +// CHECK: vpsllq (%rcx), %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xd5,0x20,0xf3,0x39] + vpsllq (%rcx), %ymm21, %ymm23 + +// CHECK: vpsllq 291(%rax,%r14,8), %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xa1,0xd5,0x20,0xf3,0xbc,0xf0,0x23,0x01,0x00,0x00] + vpsllq 291(%rax,%r14,8), %ymm21, %ymm23 + +// CHECK: vpsllq 2032(%rdx), %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xd5,0x20,0xf3,0x7a,0x7f] + vpsllq 2032(%rdx), %ymm21, %ymm23 + +// CHECK: vpsllq 2048(%rdx), %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xd5,0x20,0xf3,0xba,0x00,0x08,0x00,0x00] + vpsllq 2048(%rdx), %ymm21, %ymm23 + +// CHECK: vpsllq -2048(%rdx), %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xd5,0x20,0xf3,0x7a,0x80] + vpsllq -2048(%rdx), %ymm21, %ymm23 + +// CHECK: vpsllq -2064(%rdx), %ymm21, %ymm23 +// CHECK: encoding: [0x62,0xe1,0xd5,0x20,0xf3,0xba,0xf0,0xf7,0xff,0xff] + vpsllq -2064(%rdx), %ymm21, %ymm23 + +// CHECK: vpsllvd %xmm24, %xmm23, %xmm23 +// CHECK: encoding: [0x62,0x82,0x45,0x00,0x47,0xf8] + vpsllvd %xmm24, %xmm23, %xmm23 + +// CHECK: vpsllvd %xmm24, %xmm23, %xmm23 {%k6} +// CHECK: encoding: [0x62,0x82,0x45,0x06,0x47,0xf8] + vpsllvd %xmm24, %xmm23, %xmm23 {%k6} + +// CHECK: vpsllvd %xmm24, %xmm23, %xmm23 {%k6} {z} +// CHECK: encoding: [0x62,0x82,0x45,0x86,0x47,0xf8] + vpsllvd %xmm24, %xmm23, %xmm23 {%k6} {z} + +// CHECK: vpsllvd (%rcx), %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x47,0x39] + vpsllvd (%rcx), %xmm23, %xmm23 + +// CHECK: vpsllvd 291(%rax,%r14,8), %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xa2,0x45,0x00,0x47,0xbc,0xf0,0x23,0x01,0x00,0x00] + vpsllvd 291(%rax,%r14,8), %xmm23, %xmm23 + +// CHECK: vpsllvd (%rcx){1to4}, %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x47,0x39] + vpsllvd (%rcx){1to4}, %xmm23, %xmm23 + +// CHECK: vpsllvd 2032(%rdx), %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x47,0x7a,0x7f] + vpsllvd 2032(%rdx), %xmm23, %xmm23 + +// CHECK: vpsllvd 2048(%rdx), %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x47,0xba,0x00,0x08,0x00,0x00] + vpsllvd 2048(%rdx), %xmm23, %xmm23 + +// CHECK: vpsllvd -2048(%rdx), %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x47,0x7a,0x80] + vpsllvd -2048(%rdx), %xmm23, %xmm23 + +// CHECK: vpsllvd -2064(%rdx), %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x47,0xba,0xf0,0xf7,0xff,0xff] + vpsllvd -2064(%rdx), %xmm23, %xmm23 + +// CHECK: vpsllvd 508(%rdx){1to4}, %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x47,0x7a,0x7f] + vpsllvd 508(%rdx){1to4}, %xmm23, %xmm23 + +// CHECK: vpsllvd 512(%rdx){1to4}, %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x47,0xba,0x00,0x02,0x00,0x00] + vpsllvd 512(%rdx){1to4}, %xmm23, %xmm23 + +// CHECK: vpsllvd -512(%rdx){1to4}, %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x47,0x7a,0x80] + vpsllvd -512(%rdx){1to4}, %xmm23, %xmm23 + +// CHECK: vpsllvd -516(%rdx){1to4}, %xmm23, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x47,0xba,0xfc,0xfd,0xff,0xff] + vpsllvd -516(%rdx){1to4}, %xmm23, %xmm23 + +// CHECK: vpsllvd %ymm19, %ymm22, %ymm17 +// CHECK: encoding: [0x62,0xa2,0x4d,0x20,0x47,0xcb] + vpsllvd %ymm19, %ymm22, %ymm17 + +// CHECK: vpsllvd %ymm19, %ymm22, %ymm17 {%k5} +// CHECK: encoding: [0x62,0xa2,0x4d,0x25,0x47,0xcb] + vpsllvd %ymm19, %ymm22, %ymm17 {%k5} + +// CHECK: vpsllvd %ymm19, %ymm22, %ymm17 {%k5} {z} +// CHECK: encoding: [0x62,0xa2,0x4d,0xa5,0x47,0xcb] + vpsllvd %ymm19, %ymm22, %ymm17 {%k5} {z} + +// CHECK: vpsllvd (%rcx), %ymm22, %ymm17 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x47,0x09] + vpsllvd (%rcx), %ymm22, %ymm17 + +// CHECK: vpsllvd 291(%rax,%r14,8), %ymm22, %ymm17 +// CHECK: encoding: [0x62,0xa2,0x4d,0x20,0x47,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpsllvd 291(%rax,%r14,8), %ymm22, %ymm17 + +// CHECK: vpsllvd (%rcx){1to8}, %ymm22, %ymm17 +// CHECK: encoding: [0x62,0xe2,0x4d,0x30,0x47,0x09] + vpsllvd (%rcx){1to8}, %ymm22, %ymm17 + +// CHECK: vpsllvd 4064(%rdx), %ymm22, %ymm17 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x47,0x4a,0x7f] + vpsllvd 4064(%rdx), %ymm22, %ymm17 + +// CHECK: vpsllvd 4096(%rdx), %ymm22, %ymm17 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x47,0x8a,0x00,0x10,0x00,0x00] + vpsllvd 4096(%rdx), %ymm22, %ymm17 + +// CHECK: vpsllvd -4096(%rdx), %ymm22, %ymm17 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x47,0x4a,0x80] + vpsllvd -4096(%rdx), %ymm22, %ymm17 + +// CHECK: vpsllvd -4128(%rdx), %ymm22, %ymm17 +// CHECK: encoding: [0x62,0xe2,0x4d,0x20,0x47,0x8a,0xe0,0xef,0xff,0xff] + vpsllvd -4128(%rdx), %ymm22, %ymm17 + +// CHECK: vpsllvd 508(%rdx){1to8}, %ymm22, %ymm17 +// CHECK: encoding: [0x62,0xe2,0x4d,0x30,0x47,0x4a,0x7f] + vpsllvd 508(%rdx){1to8}, %ymm22, %ymm17 + +// CHECK: vpsllvd 512(%rdx){1to8}, %ymm22, %ymm17 +// CHECK: encoding: [0x62,0xe2,0x4d,0x30,0x47,0x8a,0x00,0x02,0x00,0x00] + vpsllvd 512(%rdx){1to8}, %ymm22, %ymm17 + +// CHECK: vpsllvd -512(%rdx){1to8}, %ymm22, %ymm17 +// CHECK: encoding: [0x62,0xe2,0x4d,0x30,0x47,0x4a,0x80] + vpsllvd -512(%rdx){1to8}, %ymm22, %ymm17 + +// CHECK: vpsllvd -516(%rdx){1to8}, %ymm22, %ymm17 +// CHECK: encoding: [0x62,0xe2,0x4d,0x30,0x47,0x8a,0xfc,0xfd,0xff,0xff] + vpsllvd -516(%rdx){1to8}, %ymm22, %ymm17 + +// CHECK: vpsllvq %xmm18, %xmm21, %xmm19 +// CHECK: encoding: [0x62,0xa2,0xd5,0x00,0x47,0xda] + vpsllvq %xmm18, %xmm21, %xmm19 + +// CHECK: vpsllvq %xmm18, %xmm21, %xmm19 {%k2} +// CHECK: encoding: [0x62,0xa2,0xd5,0x02,0x47,0xda] + vpsllvq %xmm18, %xmm21, %xmm19 {%k2} + +// CHECK: vpsllvq %xmm18, %xmm21, %xmm19 {%k2} {z} +// CHECK: encoding: [0x62,0xa2,0xd5,0x82,0x47,0xda] + vpsllvq %xmm18, %xmm21, %xmm19 {%k2} {z} + +// CHECK: vpsllvq (%rcx), %xmm21, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xd5,0x00,0x47,0x19] + vpsllvq (%rcx), %xmm21, %xmm19 + +// CHECK: vpsllvq 291(%rax,%r14,8), %xmm21, %xmm19 +// CHECK: encoding: [0x62,0xa2,0xd5,0x00,0x47,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpsllvq 291(%rax,%r14,8), %xmm21, %xmm19 + +// CHECK: vpsllvq (%rcx){1to2}, %xmm21, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xd5,0x10,0x47,0x19] + vpsllvq (%rcx){1to2}, %xmm21, %xmm19 + +// CHECK: vpsllvq 2032(%rdx), %xmm21, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xd5,0x00,0x47,0x5a,0x7f] + vpsllvq 2032(%rdx), %xmm21, %xmm19 + +// CHECK: vpsllvq 2048(%rdx), %xmm21, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xd5,0x00,0x47,0x9a,0x00,0x08,0x00,0x00] + vpsllvq 2048(%rdx), %xmm21, %xmm19 + +// CHECK: vpsllvq -2048(%rdx), %xmm21, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xd5,0x00,0x47,0x5a,0x80] + vpsllvq -2048(%rdx), %xmm21, %xmm19 + +// CHECK: vpsllvq -2064(%rdx), %xmm21, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xd5,0x00,0x47,0x9a,0xf0,0xf7,0xff,0xff] + vpsllvq -2064(%rdx), %xmm21, %xmm19 + +// CHECK: vpsllvq 1016(%rdx){1to2}, %xmm21, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xd5,0x10,0x47,0x5a,0x7f] + vpsllvq 1016(%rdx){1to2}, %xmm21, %xmm19 + +// CHECK: vpsllvq 1024(%rdx){1to2}, %xmm21, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xd5,0x10,0x47,0x9a,0x00,0x04,0x00,0x00] + vpsllvq 1024(%rdx){1to2}, %xmm21, %xmm19 + +// CHECK: vpsllvq -1024(%rdx){1to2}, %xmm21, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xd5,0x10,0x47,0x5a,0x80] + vpsllvq -1024(%rdx){1to2}, %xmm21, %xmm19 + +// CHECK: vpsllvq -1032(%rdx){1to2}, %xmm21, %xmm19 +// CHECK: encoding: [0x62,0xe2,0xd5,0x10,0x47,0x9a,0xf8,0xfb,0xff,0xff] + vpsllvq -1032(%rdx){1to2}, %xmm21, %xmm19 + +// CHECK: vpsllvq %ymm18, %ymm25, %ymm23 +// CHECK: encoding: [0x62,0xa2,0xb5,0x20,0x47,0xfa] + vpsllvq %ymm18, %ymm25, %ymm23 + +// CHECK: vpsllvq %ymm18, %ymm25, %ymm23 {%k2} +// CHECK: encoding: [0x62,0xa2,0xb5,0x22,0x47,0xfa] + vpsllvq %ymm18, %ymm25, %ymm23 {%k2} + +// CHECK: vpsllvq %ymm18, %ymm25, %ymm23 {%k2} {z} +// CHECK: encoding: [0x62,0xa2,0xb5,0xa2,0x47,0xfa] + vpsllvq %ymm18, %ymm25, %ymm23 {%k2} {z} + +// CHECK: vpsllvq (%rcx), %ymm25, %ymm23 +// CHECK: encoding: [0x62,0xe2,0xb5,0x20,0x47,0x39] + vpsllvq (%rcx), %ymm25, %ymm23 + +// CHECK: vpsllvq 291(%rax,%r14,8), %ymm25, %ymm23 +// CHECK: encoding: [0x62,0xa2,0xb5,0x20,0x47,0xbc,0xf0,0x23,0x01,0x00,0x00] + vpsllvq 291(%rax,%r14,8), %ymm25, %ymm23 + +// CHECK: vpsllvq (%rcx){1to4}, %ymm25, %ymm23 +// CHECK: encoding: [0x62,0xe2,0xb5,0x30,0x47,0x39] + vpsllvq (%rcx){1to4}, %ymm25, %ymm23 + +// CHECK: vpsllvq 4064(%rdx), %ymm25, %ymm23 +// CHECK: encoding: [0x62,0xe2,0xb5,0x20,0x47,0x7a,0x7f] + vpsllvq 4064(%rdx), %ymm25, %ymm23 + +// CHECK: vpsllvq 4096(%rdx), %ymm25, %ymm23 +// CHECK: encoding: [0x62,0xe2,0xb5,0x20,0x47,0xba,0x00,0x10,0x00,0x00] + vpsllvq 4096(%rdx), %ymm25, %ymm23 + +// CHECK: vpsllvq -4096(%rdx), %ymm25, %ymm23 +// CHECK: encoding: [0x62,0xe2,0xb5,0x20,0x47,0x7a,0x80] + vpsllvq -4096(%rdx), %ymm25, %ymm23 + +// CHECK: vpsllvq -4128(%rdx), %ymm25, %ymm23 +// CHECK: encoding: [0x62,0xe2,0xb5,0x20,0x47,0xba,0xe0,0xef,0xff,0xff] + vpsllvq -4128(%rdx), %ymm25, %ymm23 + +// CHECK: vpsllvq 1016(%rdx){1to4}, %ymm25, %ymm23 +// CHECK: encoding: [0x62,0xe2,0xb5,0x30,0x47,0x7a,0x7f] + vpsllvq 1016(%rdx){1to4}, %ymm25, %ymm23 + +// CHECK: vpsllvq 1024(%rdx){1to4}, %ymm25, %ymm23 +// CHECK: encoding: [0x62,0xe2,0xb5,0x30,0x47,0xba,0x00,0x04,0x00,0x00] + vpsllvq 1024(%rdx){1to4}, %ymm25, %ymm23 + +// CHECK: vpsllvq -1024(%rdx){1to4}, %ymm25, %ymm23 +// CHECK: encoding: [0x62,0xe2,0xb5,0x30,0x47,0x7a,0x80] + vpsllvq -1024(%rdx){1to4}, %ymm25, %ymm23 + +// CHECK: vpsllvq -1032(%rdx){1to4}, %ymm25, %ymm23 +// CHECK: encoding: [0x62,0xe2,0xb5,0x30,0x47,0xba,0xf8,0xfb,0xff,0xff] + vpsllvq -1032(%rdx){1to4}, %ymm25, %ymm23 + +// CHECK: vpsrad %xmm20, %xmm23, %xmm28 +// CHECK: encoding: [0x62,0x21,0x45,0x00,0xe2,0xe4] + vpsrad %xmm20, %xmm23, %xmm28 + +// CHECK: vpsrad %xmm20, %xmm23, %xmm28 {%k3} +// CHECK: encoding: [0x62,0x21,0x45,0x03,0xe2,0xe4] + vpsrad %xmm20, %xmm23, %xmm28 {%k3} + +// CHECK: vpsrad %xmm20, %xmm23, %xmm28 {%k3} {z} +// CHECK: encoding: [0x62,0x21,0x45,0x83,0xe2,0xe4] + vpsrad %xmm20, %xmm23, %xmm28 {%k3} {z} + +// CHECK: vpsrad (%rcx), %xmm23, %xmm28 +// CHECK: encoding: [0x62,0x61,0x45,0x00,0xe2,0x21] + vpsrad (%rcx), %xmm23, %xmm28 + +// CHECK: vpsrad 291(%rax,%r14,8), %xmm23, %xmm28 +// CHECK: encoding: [0x62,0x21,0x45,0x00,0xe2,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsrad 291(%rax,%r14,8), %xmm23, %xmm28 + +// CHECK: vpsrad 2032(%rdx), %xmm23, %xmm28 +// CHECK: encoding: [0x62,0x61,0x45,0x00,0xe2,0x62,0x7f] + vpsrad 2032(%rdx), %xmm23, %xmm28 + +// CHECK: vpsrad 2048(%rdx), %xmm23, %xmm28 +// CHECK: encoding: [0x62,0x61,0x45,0x00,0xe2,0xa2,0x00,0x08,0x00,0x00] + vpsrad 2048(%rdx), %xmm23, %xmm28 + +// CHECK: vpsrad -2048(%rdx), %xmm23, %xmm28 +// CHECK: encoding: [0x62,0x61,0x45,0x00,0xe2,0x62,0x80] + vpsrad -2048(%rdx), %xmm23, %xmm28 + +// CHECK: vpsrad -2064(%rdx), %xmm23, %xmm28 +// CHECK: encoding: [0x62,0x61,0x45,0x00,0xe2,0xa2,0xf0,0xf7,0xff,0xff] + vpsrad -2064(%rdx), %xmm23, %xmm28 + +// CHECK: vpsrad %xmm24, %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x01,0x25,0x20,0xe2,0xc8] + vpsrad %xmm24, %ymm27, %ymm25 + +// CHECK: vpsrad %xmm24, %ymm27, %ymm25 {%k4} +// CHECK: encoding: [0x62,0x01,0x25,0x24,0xe2,0xc8] + vpsrad %xmm24, %ymm27, %ymm25 {%k4} + +// CHECK: vpsrad %xmm24, %ymm27, %ymm25 {%k4} {z} +// CHECK: encoding: [0x62,0x01,0x25,0xa4,0xe2,0xc8] + vpsrad %xmm24, %ymm27, %ymm25 {%k4} {z} + +// CHECK: vpsrad (%rcx), %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0x25,0x20,0xe2,0x09] + vpsrad (%rcx), %ymm27, %ymm25 + +// CHECK: vpsrad 291(%rax,%r14,8), %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x21,0x25,0x20,0xe2,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpsrad 291(%rax,%r14,8), %ymm27, %ymm25 + +// CHECK: vpsrad 2032(%rdx), %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0x25,0x20,0xe2,0x4a,0x7f] + vpsrad 2032(%rdx), %ymm27, %ymm25 + +// CHECK: vpsrad 2048(%rdx), %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0x25,0x20,0xe2,0x8a,0x00,0x08,0x00,0x00] + vpsrad 2048(%rdx), %ymm27, %ymm25 + +// CHECK: vpsrad -2048(%rdx), %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0x25,0x20,0xe2,0x4a,0x80] + vpsrad -2048(%rdx), %ymm27, %ymm25 + +// CHECK: vpsrad -2064(%rdx), %ymm27, %ymm25 +// CHECK: encoding: [0x62,0x61,0x25,0x20,0xe2,0x8a,0xf0,0xf7,0xff,0xff] + vpsrad -2064(%rdx), %ymm27, %ymm25 + +// CHECK: vpsraq %xmm24, %xmm24, %xmm29 +// CHECK: encoding: [0x62,0x01,0xbd,0x00,0xe2,0xe8] + vpsraq %xmm24, %xmm24, %xmm29 + +// CHECK: vpsraq %xmm24, %xmm24, %xmm29 {%k3} +// CHECK: encoding: [0x62,0x01,0xbd,0x03,0xe2,0xe8] + vpsraq %xmm24, %xmm24, %xmm29 {%k3} + +// CHECK: vpsraq %xmm24, %xmm24, %xmm29 {%k3} {z} +// CHECK: encoding: [0x62,0x01,0xbd,0x83,0xe2,0xe8] + vpsraq %xmm24, %xmm24, %xmm29 {%k3} {z} + +// CHECK: vpsraq (%rcx), %xmm24, %xmm29 +// CHECK: encoding: [0x62,0x61,0xbd,0x00,0xe2,0x29] + vpsraq (%rcx), %xmm24, %xmm29 + +// CHECK: vpsraq 291(%rax,%r14,8), %xmm24, %xmm29 +// CHECK: encoding: [0x62,0x21,0xbd,0x00,0xe2,0xac,0xf0,0x23,0x01,0x00,0x00] + vpsraq 291(%rax,%r14,8), %xmm24, %xmm29 + +// CHECK: vpsraq 2032(%rdx), %xmm24, %xmm29 +// CHECK: encoding: [0x62,0x61,0xbd,0x00,0xe2,0x6a,0x7f] + vpsraq 2032(%rdx), %xmm24, %xmm29 + +// CHECK: vpsraq 2048(%rdx), %xmm24, %xmm29 +// CHECK: encoding: [0x62,0x61,0xbd,0x00,0xe2,0xaa,0x00,0x08,0x00,0x00] + vpsraq 2048(%rdx), %xmm24, %xmm29 + +// CHECK: vpsraq -2048(%rdx), %xmm24, %xmm29 +// CHECK: encoding: [0x62,0x61,0xbd,0x00,0xe2,0x6a,0x80] + vpsraq -2048(%rdx), %xmm24, %xmm29 + +// CHECK: vpsraq -2064(%rdx), %xmm24, %xmm29 +// CHECK: encoding: [0x62,0x61,0xbd,0x00,0xe2,0xaa,0xf0,0xf7,0xff,0xff] + vpsraq -2064(%rdx), %xmm24, %xmm29 + +// CHECK: vpsraq %xmm26, %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x01,0xad,0x20,0xe2,0xe2] + vpsraq %xmm26, %ymm26, %ymm28 + +// CHECK: vpsraq %xmm26, %ymm26, %ymm28 {%k4} +// CHECK: encoding: [0x62,0x01,0xad,0x24,0xe2,0xe2] + vpsraq %xmm26, %ymm26, %ymm28 {%k4} + +// CHECK: vpsraq %xmm26, %ymm26, %ymm28 {%k4} {z} +// CHECK: encoding: [0x62,0x01,0xad,0xa4,0xe2,0xe2] + vpsraq %xmm26, %ymm26, %ymm28 {%k4} {z} + +// CHECK: vpsraq (%rcx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0xe2,0x21] + vpsraq (%rcx), %ymm26, %ymm28 + +// CHECK: vpsraq 291(%rax,%r14,8), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x21,0xad,0x20,0xe2,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsraq 291(%rax,%r14,8), %ymm26, %ymm28 + +// CHECK: vpsraq 2032(%rdx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0xe2,0x62,0x7f] + vpsraq 2032(%rdx), %ymm26, %ymm28 + +// CHECK: vpsraq 2048(%rdx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0xe2,0xa2,0x00,0x08,0x00,0x00] + vpsraq 2048(%rdx), %ymm26, %ymm28 + +// CHECK: vpsraq -2048(%rdx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0xe2,0x62,0x80] + vpsraq -2048(%rdx), %ymm26, %ymm28 + +// CHECK: vpsraq -2064(%rdx), %ymm26, %ymm28 +// CHECK: encoding: [0x62,0x61,0xad,0x20,0xe2,0xa2,0xf0,0xf7,0xff,0xff] + vpsraq -2064(%rdx), %ymm26, %ymm28 + +// CHECK: vpsravd %xmm18, %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x22,0x2d,0x00,0x46,0xc2] + vpsravd %xmm18, %xmm26, %xmm24 + +// CHECK: vpsravd %xmm18, %xmm26, %xmm24 {%k5} +// CHECK: encoding: [0x62,0x22,0x2d,0x05,0x46,0xc2] + vpsravd %xmm18, %xmm26, %xmm24 {%k5} + +// CHECK: vpsravd %xmm18, %xmm26, %xmm24 {%k5} {z} +// CHECK: encoding: [0x62,0x22,0x2d,0x85,0x46,0xc2] + vpsravd %xmm18, %xmm26, %xmm24 {%k5} {z} + +// CHECK: vpsravd (%rcx), %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x62,0x2d,0x00,0x46,0x01] + vpsravd (%rcx), %xmm26, %xmm24 + +// CHECK: vpsravd 291(%rax,%r14,8), %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x22,0x2d,0x00,0x46,0x84,0xf0,0x23,0x01,0x00,0x00] + vpsravd 291(%rax,%r14,8), %xmm26, %xmm24 + +// CHECK: vpsravd (%rcx){1to4}, %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x62,0x2d,0x10,0x46,0x01] + vpsravd (%rcx){1to4}, %xmm26, %xmm24 + +// CHECK: vpsravd 2032(%rdx), %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x62,0x2d,0x00,0x46,0x42,0x7f] + vpsravd 2032(%rdx), %xmm26, %xmm24 + +// CHECK: vpsravd 2048(%rdx), %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x62,0x2d,0x00,0x46,0x82,0x00,0x08,0x00,0x00] + vpsravd 2048(%rdx), %xmm26, %xmm24 + +// CHECK: vpsravd -2048(%rdx), %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x62,0x2d,0x00,0x46,0x42,0x80] + vpsravd -2048(%rdx), %xmm26, %xmm24 + +// CHECK: vpsravd -2064(%rdx), %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x62,0x2d,0x00,0x46,0x82,0xf0,0xf7,0xff,0xff] + vpsravd -2064(%rdx), %xmm26, %xmm24 + +// CHECK: vpsravd 508(%rdx){1to4}, %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x62,0x2d,0x10,0x46,0x42,0x7f] + vpsravd 508(%rdx){1to4}, %xmm26, %xmm24 + +// CHECK: vpsravd 512(%rdx){1to4}, %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x62,0x2d,0x10,0x46,0x82,0x00,0x02,0x00,0x00] + vpsravd 512(%rdx){1to4}, %xmm26, %xmm24 + +// CHECK: vpsravd -512(%rdx){1to4}, %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x62,0x2d,0x10,0x46,0x42,0x80] + vpsravd -512(%rdx){1to4}, %xmm26, %xmm24 + +// CHECK: vpsravd -516(%rdx){1to4}, %xmm26, %xmm24 +// CHECK: encoding: [0x62,0x62,0x2d,0x10,0x46,0x82,0xfc,0xfd,0xff,0xff] + vpsravd -516(%rdx){1to4}, %xmm26, %xmm24 + +// CHECK: vpsravd %ymm23, %ymm25, %ymm22 +// CHECK: encoding: [0x62,0xa2,0x35,0x20,0x46,0xf7] + vpsravd %ymm23, %ymm25, %ymm22 + +// CHECK: vpsravd %ymm23, %ymm25, %ymm22 {%k7} +// CHECK: encoding: [0x62,0xa2,0x35,0x27,0x46,0xf7] + vpsravd %ymm23, %ymm25, %ymm22 {%k7} + +// CHECK: vpsravd %ymm23, %ymm25, %ymm22 {%k7} {z} +// CHECK: encoding: [0x62,0xa2,0x35,0xa7,0x46,0xf7] + vpsravd %ymm23, %ymm25, %ymm22 {%k7} {z} + +// CHECK: vpsravd (%rcx), %ymm25, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x35,0x20,0x46,0x31] + vpsravd (%rcx), %ymm25, %ymm22 + +// CHECK: vpsravd 291(%rax,%r14,8), %ymm25, %ymm22 +// CHECK: encoding: [0x62,0xa2,0x35,0x20,0x46,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpsravd 291(%rax,%r14,8), %ymm25, %ymm22 + +// CHECK: vpsravd (%rcx){1to8}, %ymm25, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x35,0x30,0x46,0x31] + vpsravd (%rcx){1to8}, %ymm25, %ymm22 + +// CHECK: vpsravd 4064(%rdx), %ymm25, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x35,0x20,0x46,0x72,0x7f] + vpsravd 4064(%rdx), %ymm25, %ymm22 + +// CHECK: vpsravd 4096(%rdx), %ymm25, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x35,0x20,0x46,0xb2,0x00,0x10,0x00,0x00] + vpsravd 4096(%rdx), %ymm25, %ymm22 + +// CHECK: vpsravd -4096(%rdx), %ymm25, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x35,0x20,0x46,0x72,0x80] + vpsravd -4096(%rdx), %ymm25, %ymm22 + +// CHECK: vpsravd -4128(%rdx), %ymm25, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x35,0x20,0x46,0xb2,0xe0,0xef,0xff,0xff] + vpsravd -4128(%rdx), %ymm25, %ymm22 + +// CHECK: vpsravd 508(%rdx){1to8}, %ymm25, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x35,0x30,0x46,0x72,0x7f] + vpsravd 508(%rdx){1to8}, %ymm25, %ymm22 + +// CHECK: vpsravd 512(%rdx){1to8}, %ymm25, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x35,0x30,0x46,0xb2,0x00,0x02,0x00,0x00] + vpsravd 512(%rdx){1to8}, %ymm25, %ymm22 + +// CHECK: vpsravd -512(%rdx){1to8}, %ymm25, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x35,0x30,0x46,0x72,0x80] + vpsravd -512(%rdx){1to8}, %ymm25, %ymm22 + +// CHECK: vpsravd -516(%rdx){1to8}, %ymm25, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x35,0x30,0x46,0xb2,0xfc,0xfd,0xff,0xff] + vpsravd -516(%rdx){1to8}, %ymm25, %ymm22 + +// CHECK: vpsravq %xmm17, %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x22,0x9d,0x00,0x46,0xe1] + vpsravq %xmm17, %xmm28, %xmm28 + +// CHECK: vpsravq %xmm17, %xmm28, %xmm28 {%k1} +// CHECK: encoding: [0x62,0x22,0x9d,0x01,0x46,0xe1] + vpsravq %xmm17, %xmm28, %xmm28 {%k1} + +// CHECK: vpsravq %xmm17, %xmm28, %xmm28 {%k1} {z} +// CHECK: encoding: [0x62,0x22,0x9d,0x81,0x46,0xe1] + vpsravq %xmm17, %xmm28, %xmm28 {%k1} {z} + +// CHECK: vpsravq (%rcx), %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x00,0x46,0x21] + vpsravq (%rcx), %xmm28, %xmm28 + +// CHECK: vpsravq 291(%rax,%r14,8), %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x22,0x9d,0x00,0x46,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsravq 291(%rax,%r14,8), %xmm28, %xmm28 + +// CHECK: vpsravq (%rcx){1to2}, %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x10,0x46,0x21] + vpsravq (%rcx){1to2}, %xmm28, %xmm28 + +// CHECK: vpsravq 2032(%rdx), %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x00,0x46,0x62,0x7f] + vpsravq 2032(%rdx), %xmm28, %xmm28 + +// CHECK: vpsravq 2048(%rdx), %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x00,0x46,0xa2,0x00,0x08,0x00,0x00] + vpsravq 2048(%rdx), %xmm28, %xmm28 + +// CHECK: vpsravq -2048(%rdx), %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x00,0x46,0x62,0x80] + vpsravq -2048(%rdx), %xmm28, %xmm28 + +// CHECK: vpsravq -2064(%rdx), %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x00,0x46,0xa2,0xf0,0xf7,0xff,0xff] + vpsravq -2064(%rdx), %xmm28, %xmm28 + +// CHECK: vpsravq 1016(%rdx){1to2}, %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x10,0x46,0x62,0x7f] + vpsravq 1016(%rdx){1to2}, %xmm28, %xmm28 + +// CHECK: vpsravq 1024(%rdx){1to2}, %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x10,0x46,0xa2,0x00,0x04,0x00,0x00] + vpsravq 1024(%rdx){1to2}, %xmm28, %xmm28 + +// CHECK: vpsravq -1024(%rdx){1to2}, %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x10,0x46,0x62,0x80] + vpsravq -1024(%rdx){1to2}, %xmm28, %xmm28 + +// CHECK: vpsravq -1032(%rdx){1to2}, %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x62,0x9d,0x10,0x46,0xa2,0xf8,0xfb,0xff,0xff] + vpsravq -1032(%rdx){1to2}, %xmm28, %xmm28 + +// CHECK: vpsravq %ymm21, %ymm24, %ymm30 +// CHECK: encoding: [0x62,0x22,0xbd,0x20,0x46,0xf5] + vpsravq %ymm21, %ymm24, %ymm30 + +// CHECK: vpsravq %ymm21, %ymm24, %ymm30 {%k7} +// CHECK: encoding: [0x62,0x22,0xbd,0x27,0x46,0xf5] + vpsravq %ymm21, %ymm24, %ymm30 {%k7} + +// CHECK: vpsravq %ymm21, %ymm24, %ymm30 {%k7} {z} +// CHECK: encoding: [0x62,0x22,0xbd,0xa7,0x46,0xf5] + vpsravq %ymm21, %ymm24, %ymm30 {%k7} {z} + +// CHECK: vpsravq (%rcx), %ymm24, %ymm30 +// CHECK: encoding: [0x62,0x62,0xbd,0x20,0x46,0x31] + vpsravq (%rcx), %ymm24, %ymm30 + +// CHECK: vpsravq 291(%rax,%r14,8), %ymm24, %ymm30 +// CHECK: encoding: [0x62,0x22,0xbd,0x20,0x46,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpsravq 291(%rax,%r14,8), %ymm24, %ymm30 + +// CHECK: vpsravq (%rcx){1to4}, %ymm24, %ymm30 +// CHECK: encoding: [0x62,0x62,0xbd,0x30,0x46,0x31] + vpsravq (%rcx){1to4}, %ymm24, %ymm30 + +// CHECK: vpsravq 4064(%rdx), %ymm24, %ymm30 +// CHECK: encoding: [0x62,0x62,0xbd,0x20,0x46,0x72,0x7f] + vpsravq 4064(%rdx), %ymm24, %ymm30 + +// CHECK: vpsravq 4096(%rdx), %ymm24, %ymm30 +// CHECK: encoding: [0x62,0x62,0xbd,0x20,0x46,0xb2,0x00,0x10,0x00,0x00] + vpsravq 4096(%rdx), %ymm24, %ymm30 + +// CHECK: vpsravq -4096(%rdx), %ymm24, %ymm30 +// CHECK: encoding: [0x62,0x62,0xbd,0x20,0x46,0x72,0x80] + vpsravq -4096(%rdx), %ymm24, %ymm30 + +// CHECK: vpsravq -4128(%rdx), %ymm24, %ymm30 +// CHECK: encoding: [0x62,0x62,0xbd,0x20,0x46,0xb2,0xe0,0xef,0xff,0xff] + vpsravq -4128(%rdx), %ymm24, %ymm30 + +// CHECK: vpsravq 1016(%rdx){1to4}, %ymm24, %ymm30 +// CHECK: encoding: [0x62,0x62,0xbd,0x30,0x46,0x72,0x7f] + vpsravq 1016(%rdx){1to4}, %ymm24, %ymm30 + +// CHECK: vpsravq 1024(%rdx){1to4}, %ymm24, %ymm30 +// CHECK: encoding: [0x62,0x62,0xbd,0x30,0x46,0xb2,0x00,0x04,0x00,0x00] + vpsravq 1024(%rdx){1to4}, %ymm24, %ymm30 + +// CHECK: vpsravq -1024(%rdx){1to4}, %ymm24, %ymm30 +// CHECK: encoding: [0x62,0x62,0xbd,0x30,0x46,0x72,0x80] + vpsravq -1024(%rdx){1to4}, %ymm24, %ymm30 + +// CHECK: vpsravq -1032(%rdx){1to4}, %ymm24, %ymm30 +// CHECK: encoding: [0x62,0x62,0xbd,0x30,0x46,0xb2,0xf8,0xfb,0xff,0xff] + vpsravq -1032(%rdx){1to4}, %ymm24, %ymm30 + +// CHECK: vpsrld %xmm20, %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x21,0x5d,0x00,0xd2,0xf4] + vpsrld %xmm20, %xmm20, %xmm30 + +// CHECK: vpsrld %xmm20, %xmm20, %xmm30 {%k3} +// CHECK: encoding: [0x62,0x21,0x5d,0x03,0xd2,0xf4] + vpsrld %xmm20, %xmm20, %xmm30 {%k3} + +// CHECK: vpsrld %xmm20, %xmm20, %xmm30 {%k3} {z} +// CHECK: encoding: [0x62,0x21,0x5d,0x83,0xd2,0xf4] + vpsrld %xmm20, %xmm20, %xmm30 {%k3} {z} + +// CHECK: vpsrld (%rcx), %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x61,0x5d,0x00,0xd2,0x31] + vpsrld (%rcx), %xmm20, %xmm30 + +// CHECK: vpsrld 291(%rax,%r14,8), %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x21,0x5d,0x00,0xd2,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpsrld 291(%rax,%r14,8), %xmm20, %xmm30 + +// CHECK: vpsrld 2032(%rdx), %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x61,0x5d,0x00,0xd2,0x72,0x7f] + vpsrld 2032(%rdx), %xmm20, %xmm30 + +// CHECK: vpsrld 2048(%rdx), %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x61,0x5d,0x00,0xd2,0xb2,0x00,0x08,0x00,0x00] + vpsrld 2048(%rdx), %xmm20, %xmm30 + +// CHECK: vpsrld -2048(%rdx), %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x61,0x5d,0x00,0xd2,0x72,0x80] + vpsrld -2048(%rdx), %xmm20, %xmm30 + +// CHECK: vpsrld -2064(%rdx), %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x61,0x5d,0x00,0xd2,0xb2,0xf0,0xf7,0xff,0xff] + vpsrld -2064(%rdx), %xmm20, %xmm30 + +// CHECK: vpsrld %xmm25, %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x01,0x6d,0x20,0xd2,0xd1] + vpsrld %xmm25, %ymm18, %ymm26 + +// CHECK: vpsrld %xmm25, %ymm18, %ymm26 {%k1} +// CHECK: encoding: [0x62,0x01,0x6d,0x21,0xd2,0xd1] + vpsrld %xmm25, %ymm18, %ymm26 {%k1} + +// CHECK: vpsrld %xmm25, %ymm18, %ymm26 {%k1} {z} +// CHECK: encoding: [0x62,0x01,0x6d,0xa1,0xd2,0xd1] + vpsrld %xmm25, %ymm18, %ymm26 {%k1} {z} + +// CHECK: vpsrld (%rcx), %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xd2,0x11] + vpsrld (%rcx), %ymm18, %ymm26 + +// CHECK: vpsrld 291(%rax,%r14,8), %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x21,0x6d,0x20,0xd2,0x94,0xf0,0x23,0x01,0x00,0x00] + vpsrld 291(%rax,%r14,8), %ymm18, %ymm26 + +// CHECK: vpsrld 2032(%rdx), %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xd2,0x52,0x7f] + vpsrld 2032(%rdx), %ymm18, %ymm26 + +// CHECK: vpsrld 2048(%rdx), %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xd2,0x92,0x00,0x08,0x00,0x00] + vpsrld 2048(%rdx), %ymm18, %ymm26 + +// CHECK: vpsrld -2048(%rdx), %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xd2,0x52,0x80] + vpsrld -2048(%rdx), %ymm18, %ymm26 + +// CHECK: vpsrld -2064(%rdx), %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xd2,0x92,0xf0,0xf7,0xff,0xff] + vpsrld -2064(%rdx), %ymm18, %ymm26 + +// CHECK: vpsrlq %xmm17, %xmm21, %xmm28 +// CHECK: encoding: [0x62,0x21,0xd5,0x00,0xd3,0xe1] + vpsrlq %xmm17, %xmm21, %xmm28 + +// CHECK: vpsrlq %xmm17, %xmm21, %xmm28 {%k2} +// CHECK: encoding: [0x62,0x21,0xd5,0x02,0xd3,0xe1] + vpsrlq %xmm17, %xmm21, %xmm28 {%k2} + +// CHECK: vpsrlq %xmm17, %xmm21, %xmm28 {%k2} {z} +// CHECK: encoding: [0x62,0x21,0xd5,0x82,0xd3,0xe1] + vpsrlq %xmm17, %xmm21, %xmm28 {%k2} {z} + +// CHECK: vpsrlq (%rcx), %xmm21, %xmm28 +// CHECK: encoding: [0x62,0x61,0xd5,0x00,0xd3,0x21] + vpsrlq (%rcx), %xmm21, %xmm28 + +// CHECK: vpsrlq 291(%rax,%r14,8), %xmm21, %xmm28 +// CHECK: encoding: [0x62,0x21,0xd5,0x00,0xd3,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsrlq 291(%rax,%r14,8), %xmm21, %xmm28 + +// CHECK: vpsrlq 2032(%rdx), %xmm21, %xmm28 +// CHECK: encoding: [0x62,0x61,0xd5,0x00,0xd3,0x62,0x7f] + vpsrlq 2032(%rdx), %xmm21, %xmm28 + +// CHECK: vpsrlq 2048(%rdx), %xmm21, %xmm28 +// CHECK: encoding: [0x62,0x61,0xd5,0x00,0xd3,0xa2,0x00,0x08,0x00,0x00] + vpsrlq 2048(%rdx), %xmm21, %xmm28 + +// CHECK: vpsrlq -2048(%rdx), %xmm21, %xmm28 +// CHECK: encoding: [0x62,0x61,0xd5,0x00,0xd3,0x62,0x80] + vpsrlq -2048(%rdx), %xmm21, %xmm28 + +// CHECK: vpsrlq -2064(%rdx), %xmm21, %xmm28 +// CHECK: encoding: [0x62,0x61,0xd5,0x00,0xd3,0xa2,0xf0,0xf7,0xff,0xff] + vpsrlq -2064(%rdx), %xmm21, %xmm28 + +// CHECK: vpsrlq %xmm18, %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xa1,0xad,0x20,0xd3,0xf2] + vpsrlq %xmm18, %ymm26, %ymm22 + +// CHECK: vpsrlq %xmm18, %ymm26, %ymm22 {%k2} +// CHECK: encoding: [0x62,0xa1,0xad,0x22,0xd3,0xf2] + vpsrlq %xmm18, %ymm26, %ymm22 {%k2} + +// CHECK: vpsrlq %xmm18, %ymm26, %ymm22 {%k2} {z} +// CHECK: encoding: [0x62,0xa1,0xad,0xa2,0xd3,0xf2] + vpsrlq %xmm18, %ymm26, %ymm22 {%k2} {z} + +// CHECK: vpsrlq (%rcx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe1,0xad,0x20,0xd3,0x31] + vpsrlq (%rcx), %ymm26, %ymm22 + +// CHECK: vpsrlq 291(%rax,%r14,8), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xa1,0xad,0x20,0xd3,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpsrlq 291(%rax,%r14,8), %ymm26, %ymm22 + +// CHECK: vpsrlq 2032(%rdx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe1,0xad,0x20,0xd3,0x72,0x7f] + vpsrlq 2032(%rdx), %ymm26, %ymm22 + +// CHECK: vpsrlq 2048(%rdx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe1,0xad,0x20,0xd3,0xb2,0x00,0x08,0x00,0x00] + vpsrlq 2048(%rdx), %ymm26, %ymm22 + +// CHECK: vpsrlq -2048(%rdx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe1,0xad,0x20,0xd3,0x72,0x80] + vpsrlq -2048(%rdx), %ymm26, %ymm22 + +// CHECK: vpsrlq -2064(%rdx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe1,0xad,0x20,0xd3,0xb2,0xf0,0xf7,0xff,0xff] + vpsrlq -2064(%rdx), %ymm26, %ymm22 + +// CHECK: vpsrlvd %xmm18, %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x22,0x35,0x00,0x45,0xea] + vpsrlvd %xmm18, %xmm25, %xmm29 + +// CHECK: vpsrlvd %xmm18, %xmm25, %xmm29 {%k3} +// CHECK: encoding: [0x62,0x22,0x35,0x03,0x45,0xea] + vpsrlvd %xmm18, %xmm25, %xmm29 {%k3} + +// CHECK: vpsrlvd %xmm18, %xmm25, %xmm29 {%k3} {z} +// CHECK: encoding: [0x62,0x22,0x35,0x83,0x45,0xea] + vpsrlvd %xmm18, %xmm25, %xmm29 {%k3} {z} + +// CHECK: vpsrlvd (%rcx), %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x62,0x35,0x00,0x45,0x29] + vpsrlvd (%rcx), %xmm25, %xmm29 + +// CHECK: vpsrlvd 291(%rax,%r14,8), %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x22,0x35,0x00,0x45,0xac,0xf0,0x23,0x01,0x00,0x00] + vpsrlvd 291(%rax,%r14,8), %xmm25, %xmm29 + +// CHECK: vpsrlvd (%rcx){1to4}, %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x62,0x35,0x10,0x45,0x29] + vpsrlvd (%rcx){1to4}, %xmm25, %xmm29 + +// CHECK: vpsrlvd 2032(%rdx), %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x62,0x35,0x00,0x45,0x6a,0x7f] + vpsrlvd 2032(%rdx), %xmm25, %xmm29 + +// CHECK: vpsrlvd 2048(%rdx), %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x62,0x35,0x00,0x45,0xaa,0x00,0x08,0x00,0x00] + vpsrlvd 2048(%rdx), %xmm25, %xmm29 + +// CHECK: vpsrlvd -2048(%rdx), %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x62,0x35,0x00,0x45,0x6a,0x80] + vpsrlvd -2048(%rdx), %xmm25, %xmm29 + +// CHECK: vpsrlvd -2064(%rdx), %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x62,0x35,0x00,0x45,0xaa,0xf0,0xf7,0xff,0xff] + vpsrlvd -2064(%rdx), %xmm25, %xmm29 + +// CHECK: vpsrlvd 508(%rdx){1to4}, %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x62,0x35,0x10,0x45,0x6a,0x7f] + vpsrlvd 508(%rdx){1to4}, %xmm25, %xmm29 + +// CHECK: vpsrlvd 512(%rdx){1to4}, %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x62,0x35,0x10,0x45,0xaa,0x00,0x02,0x00,0x00] + vpsrlvd 512(%rdx){1to4}, %xmm25, %xmm29 + +// CHECK: vpsrlvd -512(%rdx){1to4}, %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x62,0x35,0x10,0x45,0x6a,0x80] + vpsrlvd -512(%rdx){1to4}, %xmm25, %xmm29 + +// CHECK: vpsrlvd -516(%rdx){1to4}, %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x62,0x35,0x10,0x45,0xaa,0xfc,0xfd,0xff,0xff] + vpsrlvd -516(%rdx){1to4}, %xmm25, %xmm29 + +// CHECK: vpsrlvd %ymm20, %ymm21, %ymm28 +// CHECK: encoding: [0x62,0x22,0x55,0x20,0x45,0xe4] + vpsrlvd %ymm20, %ymm21, %ymm28 + +// CHECK: vpsrlvd %ymm20, %ymm21, %ymm28 {%k5} +// CHECK: encoding: [0x62,0x22,0x55,0x25,0x45,0xe4] + vpsrlvd %ymm20, %ymm21, %ymm28 {%k5} + +// CHECK: vpsrlvd %ymm20, %ymm21, %ymm28 {%k5} {z} +// CHECK: encoding: [0x62,0x22,0x55,0xa5,0x45,0xe4] + vpsrlvd %ymm20, %ymm21, %ymm28 {%k5} {z} + +// CHECK: vpsrlvd (%rcx), %ymm21, %ymm28 +// CHECK: encoding: [0x62,0x62,0x55,0x20,0x45,0x21] + vpsrlvd (%rcx), %ymm21, %ymm28 + +// CHECK: vpsrlvd 291(%rax,%r14,8), %ymm21, %ymm28 +// CHECK: encoding: [0x62,0x22,0x55,0x20,0x45,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsrlvd 291(%rax,%r14,8), %ymm21, %ymm28 + +// CHECK: vpsrlvd (%rcx){1to8}, %ymm21, %ymm28 +// CHECK: encoding: [0x62,0x62,0x55,0x30,0x45,0x21] + vpsrlvd (%rcx){1to8}, %ymm21, %ymm28 + +// CHECK: vpsrlvd 4064(%rdx), %ymm21, %ymm28 +// CHECK: encoding: [0x62,0x62,0x55,0x20,0x45,0x62,0x7f] + vpsrlvd 4064(%rdx), %ymm21, %ymm28 + +// CHECK: vpsrlvd 4096(%rdx), %ymm21, %ymm28 +// CHECK: encoding: [0x62,0x62,0x55,0x20,0x45,0xa2,0x00,0x10,0x00,0x00] + vpsrlvd 4096(%rdx), %ymm21, %ymm28 + +// CHECK: vpsrlvd -4096(%rdx), %ymm21, %ymm28 +// CHECK: encoding: [0x62,0x62,0x55,0x20,0x45,0x62,0x80] + vpsrlvd -4096(%rdx), %ymm21, %ymm28 + +// CHECK: vpsrlvd -4128(%rdx), %ymm21, %ymm28 +// CHECK: encoding: [0x62,0x62,0x55,0x20,0x45,0xa2,0xe0,0xef,0xff,0xff] + vpsrlvd -4128(%rdx), %ymm21, %ymm28 + +// CHECK: vpsrlvd 508(%rdx){1to8}, %ymm21, %ymm28 +// CHECK: encoding: [0x62,0x62,0x55,0x30,0x45,0x62,0x7f] + vpsrlvd 508(%rdx){1to8}, %ymm21, %ymm28 + +// CHECK: vpsrlvd 512(%rdx){1to8}, %ymm21, %ymm28 +// CHECK: encoding: [0x62,0x62,0x55,0x30,0x45,0xa2,0x00,0x02,0x00,0x00] + vpsrlvd 512(%rdx){1to8}, %ymm21, %ymm28 + +// CHECK: vpsrlvd -512(%rdx){1to8}, %ymm21, %ymm28 +// CHECK: encoding: [0x62,0x62,0x55,0x30,0x45,0x62,0x80] + vpsrlvd -512(%rdx){1to8}, %ymm21, %ymm28 + +// CHECK: vpsrlvd -516(%rdx){1to8}, %ymm21, %ymm28 +// CHECK: encoding: [0x62,0x62,0x55,0x30,0x45,0xa2,0xfc,0xfd,0xff,0xff] + vpsrlvd -516(%rdx){1to8}, %ymm21, %ymm28 + +// CHECK: vpsrlvq %xmm27, %xmm28, %xmm21 +// CHECK: encoding: [0x62,0x82,0x9d,0x00,0x45,0xeb] + vpsrlvq %xmm27, %xmm28, %xmm21 + +// CHECK: vpsrlvq %xmm27, %xmm28, %xmm21 {%k1} +// CHECK: encoding: [0x62,0x82,0x9d,0x01,0x45,0xeb] + vpsrlvq %xmm27, %xmm28, %xmm21 {%k1} + +// CHECK: vpsrlvq %xmm27, %xmm28, %xmm21 {%k1} {z} +// CHECK: encoding: [0x62,0x82,0x9d,0x81,0x45,0xeb] + vpsrlvq %xmm27, %xmm28, %xmm21 {%k1} {z} + +// CHECK: vpsrlvq (%rcx), %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x9d,0x00,0x45,0x29] + vpsrlvq (%rcx), %xmm28, %xmm21 + +// CHECK: vpsrlvq 291(%rax,%r14,8), %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xa2,0x9d,0x00,0x45,0xac,0xf0,0x23,0x01,0x00,0x00] + vpsrlvq 291(%rax,%r14,8), %xmm28, %xmm21 + +// CHECK: vpsrlvq (%rcx){1to2}, %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x9d,0x10,0x45,0x29] + vpsrlvq (%rcx){1to2}, %xmm28, %xmm21 + +// CHECK: vpsrlvq 2032(%rdx), %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x9d,0x00,0x45,0x6a,0x7f] + vpsrlvq 2032(%rdx), %xmm28, %xmm21 + +// CHECK: vpsrlvq 2048(%rdx), %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x9d,0x00,0x45,0xaa,0x00,0x08,0x00,0x00] + vpsrlvq 2048(%rdx), %xmm28, %xmm21 + +// CHECK: vpsrlvq -2048(%rdx), %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x9d,0x00,0x45,0x6a,0x80] + vpsrlvq -2048(%rdx), %xmm28, %xmm21 + +// CHECK: vpsrlvq -2064(%rdx), %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x9d,0x00,0x45,0xaa,0xf0,0xf7,0xff,0xff] + vpsrlvq -2064(%rdx), %xmm28, %xmm21 + +// CHECK: vpsrlvq 1016(%rdx){1to2}, %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x9d,0x10,0x45,0x6a,0x7f] + vpsrlvq 1016(%rdx){1to2}, %xmm28, %xmm21 + +// CHECK: vpsrlvq 1024(%rdx){1to2}, %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x9d,0x10,0x45,0xaa,0x00,0x04,0x00,0x00] + vpsrlvq 1024(%rdx){1to2}, %xmm28, %xmm21 + +// CHECK: vpsrlvq -1024(%rdx){1to2}, %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x9d,0x10,0x45,0x6a,0x80] + vpsrlvq -1024(%rdx){1to2}, %xmm28, %xmm21 + +// CHECK: vpsrlvq -1032(%rdx){1to2}, %xmm28, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x9d,0x10,0x45,0xaa,0xf8,0xfb,0xff,0xff] + vpsrlvq -1032(%rdx){1to2}, %xmm28, %xmm21 + +// CHECK: vpsrlvq %ymm26, %ymm27, %ymm28 +// CHECK: encoding: [0x62,0x02,0xa5,0x20,0x45,0xe2] + vpsrlvq %ymm26, %ymm27, %ymm28 + +// CHECK: vpsrlvq %ymm26, %ymm27, %ymm28 {%k7} +// CHECK: encoding: [0x62,0x02,0xa5,0x27,0x45,0xe2] + vpsrlvq %ymm26, %ymm27, %ymm28 {%k7} + +// CHECK: vpsrlvq %ymm26, %ymm27, %ymm28 {%k7} {z} +// CHECK: encoding: [0x62,0x02,0xa5,0xa7,0x45,0xe2] + vpsrlvq %ymm26, %ymm27, %ymm28 {%k7} {z} + +// CHECK: vpsrlvq (%rcx), %ymm27, %ymm28 +// CHECK: encoding: [0x62,0x62,0xa5,0x20,0x45,0x21] + vpsrlvq (%rcx), %ymm27, %ymm28 + +// CHECK: vpsrlvq 291(%rax,%r14,8), %ymm27, %ymm28 +// CHECK: encoding: [0x62,0x22,0xa5,0x20,0x45,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpsrlvq 291(%rax,%r14,8), %ymm27, %ymm28 + +// CHECK: vpsrlvq (%rcx){1to4}, %ymm27, %ymm28 +// CHECK: encoding: [0x62,0x62,0xa5,0x30,0x45,0x21] + vpsrlvq (%rcx){1to4}, %ymm27, %ymm28 + +// CHECK: vpsrlvq 4064(%rdx), %ymm27, %ymm28 +// CHECK: encoding: [0x62,0x62,0xa5,0x20,0x45,0x62,0x7f] + vpsrlvq 4064(%rdx), %ymm27, %ymm28 + +// CHECK: vpsrlvq 4096(%rdx), %ymm27, %ymm28 +// CHECK: encoding: [0x62,0x62,0xa5,0x20,0x45,0xa2,0x00,0x10,0x00,0x00] + vpsrlvq 4096(%rdx), %ymm27, %ymm28 + +// CHECK: vpsrlvq -4096(%rdx), %ymm27, %ymm28 +// CHECK: encoding: [0x62,0x62,0xa5,0x20,0x45,0x62,0x80] + vpsrlvq -4096(%rdx), %ymm27, %ymm28 + +// CHECK: vpsrlvq -4128(%rdx), %ymm27, %ymm28 +// CHECK: encoding: [0x62,0x62,0xa5,0x20,0x45,0xa2,0xe0,0xef,0xff,0xff] + vpsrlvq -4128(%rdx), %ymm27, %ymm28 + +// CHECK: vpsrlvq 1016(%rdx){1to4}, %ymm27, %ymm28 +// CHECK: encoding: [0x62,0x62,0xa5,0x30,0x45,0x62,0x7f] + vpsrlvq 1016(%rdx){1to4}, %ymm27, %ymm28 + +// CHECK: vpsrlvq 1024(%rdx){1to4}, %ymm27, %ymm28 +// CHECK: encoding: [0x62,0x62,0xa5,0x30,0x45,0xa2,0x00,0x04,0x00,0x00] + vpsrlvq 1024(%rdx){1to4}, %ymm27, %ymm28 + +// CHECK: vpsrlvq -1024(%rdx){1to4}, %ymm27, %ymm28 +// CHECK: encoding: [0x62,0x62,0xa5,0x30,0x45,0x62,0x80] + vpsrlvq -1024(%rdx){1to4}, %ymm27, %ymm28 + +// CHECK: vpsrlvq -1032(%rdx){1to4}, %ymm27, %ymm28 +// CHECK: encoding: [0x62,0x62,0xa5,0x30,0x45,0xa2,0xf8,0xfb,0xff,0xff] + vpsrlvq -1032(%rdx){1to4}, %ymm27, %ymm28 + +// CHECK: vpsrld $171, %xmm23, %xmm30 +// CHECK: encoding: [0x62,0xb1,0x0d,0x00,0x72,0xd7,0xab] + vpsrld $171, %xmm23, %xmm30 + +// CHECK: vpsrld $171, %xmm23, %xmm30 {%k3} +// CHECK: encoding: [0x62,0xb1,0x0d,0x03,0x72,0xd7,0xab] + vpsrld $171, %xmm23, %xmm30 {%k3} + +// CHECK: vpsrld $171, %xmm23, %xmm30 {%k3} {z} +// CHECK: encoding: [0x62,0xb1,0x0d,0x83,0x72,0xd7,0xab] + vpsrld $171, %xmm23, %xmm30 {%k3} {z} + +// CHECK: vpsrld $123, %xmm23, %xmm30 +// CHECK: encoding: [0x62,0xb1,0x0d,0x00,0x72,0xd7,0x7b] + vpsrld $123, %xmm23, %xmm30 + +// CHECK: vpsrld $123, (%rcx), %xmm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x72,0x11,0x7b] + vpsrld $123, (%rcx), %xmm30 + +// CHECK: vpsrld $123, 291(%rax,%r14,8), %xmm30 +// CHECK: encoding: [0x62,0xb1,0x0d,0x00,0x72,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpsrld $123, 291(%rax,%r14,8), %xmm30 + +// CHECK: vpsrld $123, (%rcx){1to4}, %xmm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x10,0x72,0x11,0x7b] + vpsrld $123, (%rcx){1to4}, %xmm30 + +// CHECK: vpsrld $123, 2032(%rdx), %xmm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x72,0x52,0x7f,0x7b] + vpsrld $123, 2032(%rdx), %xmm30 + +// CHECK: vpsrld $123, 2048(%rdx), %xmm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x72,0x92,0x00,0x08,0x00,0x00,0x7b] + vpsrld $123, 2048(%rdx), %xmm30 + +// CHECK: vpsrld $123, -2048(%rdx), %xmm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x72,0x52,0x80,0x7b] + vpsrld $123, -2048(%rdx), %xmm30 + +// CHECK: vpsrld $123, -2064(%rdx), %xmm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x00,0x72,0x92,0xf0,0xf7,0xff,0xff,0x7b] + vpsrld $123, -2064(%rdx), %xmm30 + +// CHECK: vpsrld $123, 508(%rdx){1to4}, %xmm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x10,0x72,0x52,0x7f,0x7b] + vpsrld $123, 508(%rdx){1to4}, %xmm30 + +// CHECK: vpsrld $123, 512(%rdx){1to4}, %xmm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x10,0x72,0x92,0x00,0x02,0x00,0x00,0x7b] + vpsrld $123, 512(%rdx){1to4}, %xmm30 + +// CHECK: vpsrld $123, -512(%rdx){1to4}, %xmm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x10,0x72,0x52,0x80,0x7b] + vpsrld $123, -512(%rdx){1to4}, %xmm30 + +// CHECK: vpsrld $123, -516(%rdx){1to4}, %xmm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x10,0x72,0x92,0xfc,0xfd,0xff,0xff,0x7b] + vpsrld $123, -516(%rdx){1to4}, %xmm30 + +// CHECK: vpsrld $171, %ymm24, %ymm22 +// CHECK: encoding: [0x62,0x91,0x4d,0x20,0x72,0xd0,0xab] + vpsrld $171, %ymm24, %ymm22 + +// CHECK: vpsrld $171, %ymm24, %ymm22 {%k2} +// CHECK: encoding: [0x62,0x91,0x4d,0x22,0x72,0xd0,0xab] + vpsrld $171, %ymm24, %ymm22 {%k2} + +// CHECK: vpsrld $171, %ymm24, %ymm22 {%k2} {z} +// CHECK: encoding: [0x62,0x91,0x4d,0xa2,0x72,0xd0,0xab] + vpsrld $171, %ymm24, %ymm22 {%k2} {z} + +// CHECK: vpsrld $123, %ymm24, %ymm22 +// CHECK: encoding: [0x62,0x91,0x4d,0x20,0x72,0xd0,0x7b] + vpsrld $123, %ymm24, %ymm22 + +// CHECK: vpsrld $123, (%rcx), %ymm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x20,0x72,0x11,0x7b] + vpsrld $123, (%rcx), %ymm22 + +// CHECK: vpsrld $123, 291(%rax,%r14,8), %ymm22 +// CHECK: encoding: [0x62,0xb1,0x4d,0x20,0x72,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpsrld $123, 291(%rax,%r14,8), %ymm22 + +// CHECK: vpsrld $123, (%rcx){1to8}, %ymm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x30,0x72,0x11,0x7b] + vpsrld $123, (%rcx){1to8}, %ymm22 + +// CHECK: vpsrld $123, 4064(%rdx), %ymm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x20,0x72,0x52,0x7f,0x7b] + vpsrld $123, 4064(%rdx), %ymm22 + +// CHECK: vpsrld $123, 4096(%rdx), %ymm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x20,0x72,0x92,0x00,0x10,0x00,0x00,0x7b] + vpsrld $123, 4096(%rdx), %ymm22 + +// CHECK: vpsrld $123, -4096(%rdx), %ymm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x20,0x72,0x52,0x80,0x7b] + vpsrld $123, -4096(%rdx), %ymm22 + +// CHECK: vpsrld $123, -4128(%rdx), %ymm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x20,0x72,0x92,0xe0,0xef,0xff,0xff,0x7b] + vpsrld $123, -4128(%rdx), %ymm22 + +// CHECK: vpsrld $123, 508(%rdx){1to8}, %ymm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x30,0x72,0x52,0x7f,0x7b] + vpsrld $123, 508(%rdx){1to8}, %ymm22 + +// CHECK: vpsrld $123, 512(%rdx){1to8}, %ymm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x30,0x72,0x92,0x00,0x02,0x00,0x00,0x7b] + vpsrld $123, 512(%rdx){1to8}, %ymm22 + +// CHECK: vpsrld $123, -512(%rdx){1to8}, %ymm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x30,0x72,0x52,0x80,0x7b] + vpsrld $123, -512(%rdx){1to8}, %ymm22 + +// CHECK: vpsrld $123, -516(%rdx){1to8}, %ymm22 +// CHECK: encoding: [0x62,0xf1,0x4d,0x30,0x72,0x92,0xfc,0xfd,0xff,0xff,0x7b] + vpsrld $123, -516(%rdx){1to8}, %ymm22 + +// CHECK: vpsrlq $171, %xmm24, %xmm17 +// CHECK: encoding: [0x62,0x91,0xf5,0x00,0x73,0xd0,0xab] + vpsrlq $171, %xmm24, %xmm17 + +// CHECK: vpsrlq $171, %xmm24, %xmm17 {%k6} +// CHECK: encoding: [0x62,0x91,0xf5,0x06,0x73,0xd0,0xab] + vpsrlq $171, %xmm24, %xmm17 {%k6} + +// CHECK: vpsrlq $171, %xmm24, %xmm17 {%k6} {z} +// CHECK: encoding: [0x62,0x91,0xf5,0x86,0x73,0xd0,0xab] + vpsrlq $171, %xmm24, %xmm17 {%k6} {z} + +// CHECK: vpsrlq $123, %xmm24, %xmm17 +// CHECK: encoding: [0x62,0x91,0xf5,0x00,0x73,0xd0,0x7b] + vpsrlq $123, %xmm24, %xmm17 + +// CHECK: vpsrlq $123, (%rcx), %xmm17 +// CHECK: encoding: [0x62,0xf1,0xf5,0x00,0x73,0x11,0x7b] + vpsrlq $123, (%rcx), %xmm17 + +// CHECK: vpsrlq $123, 291(%rax,%r14,8), %xmm17 +// CHECK: encoding: [0x62,0xb1,0xf5,0x00,0x73,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpsrlq $123, 291(%rax,%r14,8), %xmm17 + +// CHECK: vpsrlq $123, (%rcx){1to2}, %xmm17 +// CHECK: encoding: [0x62,0xf1,0xf5,0x10,0x73,0x11,0x7b] + vpsrlq $123, (%rcx){1to2}, %xmm17 + +// CHECK: vpsrlq $123, 2032(%rdx), %xmm17 +// CHECK: encoding: [0x62,0xf1,0xf5,0x00,0x73,0x52,0x7f,0x7b] + vpsrlq $123, 2032(%rdx), %xmm17 + +// CHECK: vpsrlq $123, 2048(%rdx), %xmm17 +// CHECK: encoding: [0x62,0xf1,0xf5,0x00,0x73,0x92,0x00,0x08,0x00,0x00,0x7b] + vpsrlq $123, 2048(%rdx), %xmm17 + +// CHECK: vpsrlq $123, -2048(%rdx), %xmm17 +// CHECK: encoding: [0x62,0xf1,0xf5,0x00,0x73,0x52,0x80,0x7b] + vpsrlq $123, -2048(%rdx), %xmm17 + +// CHECK: vpsrlq $123, -2064(%rdx), %xmm17 +// CHECK: encoding: [0x62,0xf1,0xf5,0x00,0x73,0x92,0xf0,0xf7,0xff,0xff,0x7b] + vpsrlq $123, -2064(%rdx), %xmm17 + +// CHECK: vpsrlq $123, 1016(%rdx){1to2}, %xmm17 +// CHECK: encoding: [0x62,0xf1,0xf5,0x10,0x73,0x52,0x7f,0x7b] + vpsrlq $123, 1016(%rdx){1to2}, %xmm17 + +// CHECK: vpsrlq $123, 1024(%rdx){1to2}, %xmm17 +// CHECK: encoding: [0x62,0xf1,0xf5,0x10,0x73,0x92,0x00,0x04,0x00,0x00,0x7b] + vpsrlq $123, 1024(%rdx){1to2}, %xmm17 + +// CHECK: vpsrlq $123, -1024(%rdx){1to2}, %xmm17 +// CHECK: encoding: [0x62,0xf1,0xf5,0x10,0x73,0x52,0x80,0x7b] + vpsrlq $123, -1024(%rdx){1to2}, %xmm17 + +// CHECK: vpsrlq $123, -1032(%rdx){1to2}, %xmm17 +// CHECK: encoding: [0x62,0xf1,0xf5,0x10,0x73,0x92,0xf8,0xfb,0xff,0xff,0x7b] + vpsrlq $123, -1032(%rdx){1to2}, %xmm17 + +// CHECK: vpsrlq $171, %ymm27, %ymm29 +// CHECK: encoding: [0x62,0x91,0x95,0x20,0x73,0xd3,0xab] + vpsrlq $171, %ymm27, %ymm29 + +// CHECK: vpsrlq $171, %ymm27, %ymm29 {%k3} +// CHECK: encoding: [0x62,0x91,0x95,0x23,0x73,0xd3,0xab] + vpsrlq $171, %ymm27, %ymm29 {%k3} + +// CHECK: vpsrlq $171, %ymm27, %ymm29 {%k3} {z} +// CHECK: encoding: [0x62,0x91,0x95,0xa3,0x73,0xd3,0xab] + vpsrlq $171, %ymm27, %ymm29 {%k3} {z} + +// CHECK: vpsrlq $123, %ymm27, %ymm29 +// CHECK: encoding: [0x62,0x91,0x95,0x20,0x73,0xd3,0x7b] + vpsrlq $123, %ymm27, %ymm29 + +// CHECK: vpsrlq $123, (%rcx), %ymm29 +// CHECK: encoding: [0x62,0xf1,0x95,0x20,0x73,0x11,0x7b] + vpsrlq $123, (%rcx), %ymm29 + +// CHECK: vpsrlq $123, 291(%rax,%r14,8), %ymm29 +// CHECK: encoding: [0x62,0xb1,0x95,0x20,0x73,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b] + vpsrlq $123, 291(%rax,%r14,8), %ymm29 + +// CHECK: vpsrlq $123, (%rcx){1to4}, %ymm29 +// CHECK: encoding: [0x62,0xf1,0x95,0x30,0x73,0x11,0x7b] + vpsrlq $123, (%rcx){1to4}, %ymm29 + +// CHECK: vpsrlq $123, 4064(%rdx), %ymm29 +// CHECK: encoding: [0x62,0xf1,0x95,0x20,0x73,0x52,0x7f,0x7b] + vpsrlq $123, 4064(%rdx), %ymm29 + +// CHECK: vpsrlq $123, 4096(%rdx), %ymm29 +// CHECK: encoding: [0x62,0xf1,0x95,0x20,0x73,0x92,0x00,0x10,0x00,0x00,0x7b] + vpsrlq $123, 4096(%rdx), %ymm29 + +// CHECK: vpsrlq $123, -4096(%rdx), %ymm29 +// CHECK: encoding: [0x62,0xf1,0x95,0x20,0x73,0x52,0x80,0x7b] + vpsrlq $123, -4096(%rdx), %ymm29 + +// CHECK: vpsrlq $123, -4128(%rdx), %ymm29 +// CHECK: encoding: [0x62,0xf1,0x95,0x20,0x73,0x92,0xe0,0xef,0xff,0xff,0x7b] + vpsrlq $123, -4128(%rdx), %ymm29 + +// CHECK: vpsrlq $123, 1016(%rdx){1to4}, %ymm29 +// CHECK: encoding: [0x62,0xf1,0x95,0x30,0x73,0x52,0x7f,0x7b] + vpsrlq $123, 1016(%rdx){1to4}, %ymm29 + +// CHECK: vpsrlq $123, 1024(%rdx){1to4}, %ymm29 +// CHECK: encoding: [0x62,0xf1,0x95,0x30,0x73,0x92,0x00,0x04,0x00,0x00,0x7b] + vpsrlq $123, 1024(%rdx){1to4}, %ymm29 + +// CHECK: vpsrlq $123, -1024(%rdx){1to4}, %ymm29 +// CHECK: encoding: [0x62,0xf1,0x95,0x30,0x73,0x52,0x80,0x7b] + vpsrlq $123, -1024(%rdx){1to4}, %ymm29 + +// CHECK: vpsrlq $123, -1032(%rdx){1to4}, %ymm29 +// CHECK: encoding: [0x62,0xf1,0x95,0x30,0x73,0x92,0xf8,0xfb,0xff,0xff,0x7b] + vpsrlq $123, -1032(%rdx){1to4}, %ymm29 + +// CHECK: vprolvd %xmm20, %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x22,0x5d,0x00,0x15,0xf4] + vprolvd %xmm20, %xmm20, %xmm30 + +// CHECK: vprolvd %xmm20, %xmm20, %xmm30 {%k2} +// CHECK: encoding: [0x62,0x22,0x5d,0x02,0x15,0xf4] + vprolvd %xmm20, %xmm20, %xmm30 {%k2} + +// CHECK: vprolvd %xmm20, %xmm20, %xmm30 {%k2} {z} +// CHECK: encoding: [0x62,0x22,0x5d,0x82,0x15,0xf4] + vprolvd %xmm20, %xmm20, %xmm30 {%k2} {z} + +// CHECK: vprolvd (%rcx), %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x62,0x5d,0x00,0x15,0x31] + vprolvd (%rcx), %xmm20, %xmm30 + +// CHECK: vprolvd 291(%rax,%r14,8), %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x22,0x5d,0x00,0x15,0xb4,0xf0,0x23,0x01,0x00,0x00] + vprolvd 291(%rax,%r14,8), %xmm20, %xmm30 + +// CHECK: vprolvd (%rcx){1to4}, %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x62,0x5d,0x10,0x15,0x31] + vprolvd (%rcx){1to4}, %xmm20, %xmm30 + +// CHECK: vprolvd 2032(%rdx), %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x62,0x5d,0x00,0x15,0x72,0x7f] + vprolvd 2032(%rdx), %xmm20, %xmm30 + +// CHECK: vprolvd 2048(%rdx), %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x62,0x5d,0x00,0x15,0xb2,0x00,0x08,0x00,0x00] + vprolvd 2048(%rdx), %xmm20, %xmm30 + +// CHECK: vprolvd -2048(%rdx), %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x62,0x5d,0x00,0x15,0x72,0x80] + vprolvd -2048(%rdx), %xmm20, %xmm30 + +// CHECK: vprolvd -2064(%rdx), %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x62,0x5d,0x00,0x15,0xb2,0xf0,0xf7,0xff,0xff] + vprolvd -2064(%rdx), %xmm20, %xmm30 + +// CHECK: vprolvd 508(%rdx){1to4}, %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x62,0x5d,0x10,0x15,0x72,0x7f] + vprolvd 508(%rdx){1to4}, %xmm20, %xmm30 + +// CHECK: vprolvd 512(%rdx){1to4}, %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x62,0x5d,0x10,0x15,0xb2,0x00,0x02,0x00,0x00] + vprolvd 512(%rdx){1to4}, %xmm20, %xmm30 + +// CHECK: vprolvd -512(%rdx){1to4}, %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x62,0x5d,0x10,0x15,0x72,0x80] + vprolvd -512(%rdx){1to4}, %xmm20, %xmm30 + +// CHECK: vprolvd -516(%rdx){1to4}, %xmm20, %xmm30 +// CHECK: encoding: [0x62,0x62,0x5d,0x10,0x15,0xb2,0xfc,0xfd,0xff,0xff] + vprolvd -516(%rdx){1to4}, %xmm20, %xmm30 + +// CHECK: vprolvd %ymm19, %ymm23, %ymm26 +// CHECK: encoding: [0x62,0x22,0x45,0x20,0x15,0xd3] + vprolvd %ymm19, %ymm23, %ymm26 + +// CHECK: vprolvd %ymm19, %ymm23, %ymm26 {%k1} +// CHECK: encoding: [0x62,0x22,0x45,0x21,0x15,0xd3] + vprolvd %ymm19, %ymm23, %ymm26 {%k1} + +// CHECK: vprolvd %ymm19, %ymm23, %ymm26 {%k1} {z} +// CHECK: encoding: [0x62,0x22,0x45,0xa1,0x15,0xd3] + vprolvd %ymm19, %ymm23, %ymm26 {%k1} {z} + +// CHECK: vprolvd (%rcx), %ymm23, %ymm26 +// CHECK: encoding: [0x62,0x62,0x45,0x20,0x15,0x11] + vprolvd (%rcx), %ymm23, %ymm26 + +// CHECK: vprolvd 291(%rax,%r14,8), %ymm23, %ymm26 +// CHECK: encoding: [0x62,0x22,0x45,0x20,0x15,0x94,0xf0,0x23,0x01,0x00,0x00] + vprolvd 291(%rax,%r14,8), %ymm23, %ymm26 + +// CHECK: vprolvd (%rcx){1to8}, %ymm23, %ymm26 +// CHECK: encoding: [0x62,0x62,0x45,0x30,0x15,0x11] + vprolvd (%rcx){1to8}, %ymm23, %ymm26 + +// CHECK: vprolvd 4064(%rdx), %ymm23, %ymm26 +// CHECK: encoding: [0x62,0x62,0x45,0x20,0x15,0x52,0x7f] + vprolvd 4064(%rdx), %ymm23, %ymm26 + +// CHECK: vprolvd 4096(%rdx), %ymm23, %ymm26 +// CHECK: encoding: [0x62,0x62,0x45,0x20,0x15,0x92,0x00,0x10,0x00,0x00] + vprolvd 4096(%rdx), %ymm23, %ymm26 + +// CHECK: vprolvd -4096(%rdx), %ymm23, %ymm26 +// CHECK: encoding: [0x62,0x62,0x45,0x20,0x15,0x52,0x80] + vprolvd -4096(%rdx), %ymm23, %ymm26 + +// CHECK: vprolvd -4128(%rdx), %ymm23, %ymm26 +// CHECK: encoding: [0x62,0x62,0x45,0x20,0x15,0x92,0xe0,0xef,0xff,0xff] + vprolvd -4128(%rdx), %ymm23, %ymm26 + +// CHECK: vprolvd 508(%rdx){1to8}, %ymm23, %ymm26 +// CHECK: encoding: [0x62,0x62,0x45,0x30,0x15,0x52,0x7f] + vprolvd 508(%rdx){1to8}, %ymm23, %ymm26 + +// CHECK: vprolvd 512(%rdx){1to8}, %ymm23, %ymm26 +// CHECK: encoding: [0x62,0x62,0x45,0x30,0x15,0x92,0x00,0x02,0x00,0x00] + vprolvd 512(%rdx){1to8}, %ymm23, %ymm26 + +// CHECK: vprolvd -512(%rdx){1to8}, %ymm23, %ymm26 +// CHECK: encoding: [0x62,0x62,0x45,0x30,0x15,0x52,0x80] + vprolvd -512(%rdx){1to8}, %ymm23, %ymm26 + +// CHECK: vprolvd -516(%rdx){1to8}, %ymm23, %ymm26 +// CHECK: encoding: [0x62,0x62,0x45,0x30,0x15,0x92,0xfc,0xfd,0xff,0xff] + vprolvd -516(%rdx){1to8}, %ymm23, %ymm26 + +// CHECK: vprold $171, %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xb1,0x6d,0x00,0x72,0xcf,0xab] + vprold $171, %xmm23, %xmm18 + +// CHECK: vprold $171, %xmm23, %xmm18 {%k3} +// CHECK: encoding: [0x62,0xb1,0x6d,0x03,0x72,0xcf,0xab] + vprold $171, %xmm23, %xmm18 {%k3} + +// CHECK: vprold $171, %xmm23, %xmm18 {%k3} {z} +// CHECK: encoding: [0x62,0xb1,0x6d,0x83,0x72,0xcf,0xab] + vprold $171, %xmm23, %xmm18 {%k3} {z} + +// CHECK: vprold $123, %xmm23, %xmm18 +// CHECK: encoding: [0x62,0xb1,0x6d,0x00,0x72,0xcf,0x7b] + vprold $123, %xmm23, %xmm18 + +// CHECK: vprold $123, (%rcx), %xmm18 +// CHECK: encoding: [0x62,0xf1,0x6d,0x00,0x72,0x09,0x7b] + vprold $123, (%rcx), %xmm18 + +// CHECK: vprold $123, 291(%rax,%r14,8), %xmm18 +// CHECK: encoding: [0x62,0xb1,0x6d,0x00,0x72,0x8c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vprold $123, 291(%rax,%r14,8), %xmm18 + +// CHECK: vprold $123, (%rcx){1to4}, %xmm18 +// CHECK: encoding: [0x62,0xf1,0x6d,0x10,0x72,0x09,0x7b] + vprold $123, (%rcx){1to4}, %xmm18 + +// CHECK: vprold $123, 2032(%rdx), %xmm18 +// CHECK: encoding: [0x62,0xf1,0x6d,0x00,0x72,0x4a,0x7f,0x7b] + vprold $123, 2032(%rdx), %xmm18 + +// CHECK: vprold $123, 2048(%rdx), %xmm18 +// CHECK: encoding: [0x62,0xf1,0x6d,0x00,0x72,0x8a,0x00,0x08,0x00,0x00,0x7b] + vprold $123, 2048(%rdx), %xmm18 + +// CHECK: vprold $123, -2048(%rdx), %xmm18 +// CHECK: encoding: [0x62,0xf1,0x6d,0x00,0x72,0x4a,0x80,0x7b] + vprold $123, -2048(%rdx), %xmm18 + +// CHECK: vprold $123, -2064(%rdx), %xmm18 +// CHECK: encoding: [0x62,0xf1,0x6d,0x00,0x72,0x8a,0xf0,0xf7,0xff,0xff,0x7b] + vprold $123, -2064(%rdx), %xmm18 + +// CHECK: vprold $123, 508(%rdx){1to4}, %xmm18 +// CHECK: encoding: [0x62,0xf1,0x6d,0x10,0x72,0x4a,0x7f,0x7b] + vprold $123, 508(%rdx){1to4}, %xmm18 + +// CHECK: vprold $123, 512(%rdx){1to4}, %xmm18 +// CHECK: encoding: [0x62,0xf1,0x6d,0x10,0x72,0x8a,0x00,0x02,0x00,0x00,0x7b] + vprold $123, 512(%rdx){1to4}, %xmm18 + +// CHECK: vprold $123, -512(%rdx){1to4}, %xmm18 +// CHECK: encoding: [0x62,0xf1,0x6d,0x10,0x72,0x4a,0x80,0x7b] + vprold $123, -512(%rdx){1to4}, %xmm18 + +// CHECK: vprold $123, -516(%rdx){1to4}, %xmm18 +// CHECK: encoding: [0x62,0xf1,0x6d,0x10,0x72,0x8a,0xfc,0xfd,0xff,0xff,0x7b] + vprold $123, -516(%rdx){1to4}, %xmm18 + +// CHECK: vprold $171, %ymm19, %ymm29 +// CHECK: encoding: [0x62,0xb1,0x15,0x20,0x72,0xcb,0xab] + vprold $171, %ymm19, %ymm29 + +// CHECK: vprold $171, %ymm19, %ymm29 {%k1} +// CHECK: encoding: [0x62,0xb1,0x15,0x21,0x72,0xcb,0xab] + vprold $171, %ymm19, %ymm29 {%k1} + +// CHECK: vprold $171, %ymm19, %ymm29 {%k1} {z} +// CHECK: encoding: [0x62,0xb1,0x15,0xa1,0x72,0xcb,0xab] + vprold $171, %ymm19, %ymm29 {%k1} {z} + +// CHECK: vprold $123, %ymm19, %ymm29 +// CHECK: encoding: [0x62,0xb1,0x15,0x20,0x72,0xcb,0x7b] + vprold $123, %ymm19, %ymm29 + +// CHECK: vprold $123, (%rcx), %ymm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x20,0x72,0x09,0x7b] + vprold $123, (%rcx), %ymm29 + +// CHECK: vprold $123, 291(%rax,%r14,8), %ymm29 +// CHECK: encoding: [0x62,0xb1,0x15,0x20,0x72,0x8c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vprold $123, 291(%rax,%r14,8), %ymm29 + +// CHECK: vprold $123, (%rcx){1to8}, %ymm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x30,0x72,0x09,0x7b] + vprold $123, (%rcx){1to8}, %ymm29 + +// CHECK: vprold $123, 4064(%rdx), %ymm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x20,0x72,0x4a,0x7f,0x7b] + vprold $123, 4064(%rdx), %ymm29 + +// CHECK: vprold $123, 4096(%rdx), %ymm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x20,0x72,0x8a,0x00,0x10,0x00,0x00,0x7b] + vprold $123, 4096(%rdx), %ymm29 + +// CHECK: vprold $123, -4096(%rdx), %ymm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x20,0x72,0x4a,0x80,0x7b] + vprold $123, -4096(%rdx), %ymm29 + +// CHECK: vprold $123, -4128(%rdx), %ymm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x20,0x72,0x8a,0xe0,0xef,0xff,0xff,0x7b] + vprold $123, -4128(%rdx), %ymm29 + +// CHECK: vprold $123, 508(%rdx){1to8}, %ymm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x30,0x72,0x4a,0x7f,0x7b] + vprold $123, 508(%rdx){1to8}, %ymm29 + +// CHECK: vprold $123, 512(%rdx){1to8}, %ymm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x30,0x72,0x8a,0x00,0x02,0x00,0x00,0x7b] + vprold $123, 512(%rdx){1to8}, %ymm29 + +// CHECK: vprold $123, -512(%rdx){1to8}, %ymm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x30,0x72,0x4a,0x80,0x7b] + vprold $123, -512(%rdx){1to8}, %ymm29 + +// CHECK: vprold $123, -516(%rdx){1to8}, %ymm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x30,0x72,0x8a,0xfc,0xfd,0xff,0xff,0x7b] + vprold $123, -516(%rdx){1to8}, %ymm29 + +// CHECK: vprolvq %xmm17, %xmm22, %xmm25 +// CHECK: encoding: [0x62,0x22,0xcd,0x00,0x15,0xc9] + vprolvq %xmm17, %xmm22, %xmm25 + +// CHECK: vprolvq %xmm17, %xmm22, %xmm25 {%k5} +// CHECK: encoding: [0x62,0x22,0xcd,0x05,0x15,0xc9] + vprolvq %xmm17, %xmm22, %xmm25 {%k5} + +// CHECK: vprolvq %xmm17, %xmm22, %xmm25 {%k5} {z} +// CHECK: encoding: [0x62,0x22,0xcd,0x85,0x15,0xc9] + vprolvq %xmm17, %xmm22, %xmm25 {%k5} {z} + +// CHECK: vprolvq (%rcx), %xmm22, %xmm25 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x15,0x09] + vprolvq (%rcx), %xmm22, %xmm25 + +// CHECK: vprolvq 291(%rax,%r14,8), %xmm22, %xmm25 +// CHECK: encoding: [0x62,0x22,0xcd,0x00,0x15,0x8c,0xf0,0x23,0x01,0x00,0x00] + vprolvq 291(%rax,%r14,8), %xmm22, %xmm25 + +// CHECK: vprolvq (%rcx){1to2}, %xmm22, %xmm25 +// CHECK: encoding: [0x62,0x62,0xcd,0x10,0x15,0x09] + vprolvq (%rcx){1to2}, %xmm22, %xmm25 + +// CHECK: vprolvq 2032(%rdx), %xmm22, %xmm25 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x15,0x4a,0x7f] + vprolvq 2032(%rdx), %xmm22, %xmm25 + +// CHECK: vprolvq 2048(%rdx), %xmm22, %xmm25 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x15,0x8a,0x00,0x08,0x00,0x00] + vprolvq 2048(%rdx), %xmm22, %xmm25 + +// CHECK: vprolvq -2048(%rdx), %xmm22, %xmm25 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x15,0x4a,0x80] + vprolvq -2048(%rdx), %xmm22, %xmm25 + +// CHECK: vprolvq -2064(%rdx), %xmm22, %xmm25 +// CHECK: encoding: [0x62,0x62,0xcd,0x00,0x15,0x8a,0xf0,0xf7,0xff,0xff] + vprolvq -2064(%rdx), %xmm22, %xmm25 + +// CHECK: vprolvq 1016(%rdx){1to2}, %xmm22, %xmm25 +// CHECK: encoding: [0x62,0x62,0xcd,0x10,0x15,0x4a,0x7f] + vprolvq 1016(%rdx){1to2}, %xmm22, %xmm25 + +// CHECK: vprolvq 1024(%rdx){1to2}, %xmm22, %xmm25 +// CHECK: encoding: [0x62,0x62,0xcd,0x10,0x15,0x8a,0x00,0x04,0x00,0x00] + vprolvq 1024(%rdx){1to2}, %xmm22, %xmm25 + +// CHECK: vprolvq -1024(%rdx){1to2}, %xmm22, %xmm25 +// CHECK: encoding: [0x62,0x62,0xcd,0x10,0x15,0x4a,0x80] + vprolvq -1024(%rdx){1to2}, %xmm22, %xmm25 + +// CHECK: vprolvq -1032(%rdx){1to2}, %xmm22, %xmm25 +// CHECK: encoding: [0x62,0x62,0xcd,0x10,0x15,0x8a,0xf8,0xfb,0xff,0xff] + vprolvq -1032(%rdx){1to2}, %xmm22, %xmm25 + +// CHECK: vprolvq %ymm28, %ymm17, %ymm17 +// CHECK: encoding: [0x62,0x82,0xf5,0x20,0x15,0xcc] + vprolvq %ymm28, %ymm17, %ymm17 + +// CHECK: vprolvq %ymm28, %ymm17, %ymm17 {%k3} +// CHECK: encoding: [0x62,0x82,0xf5,0x23,0x15,0xcc] + vprolvq %ymm28, %ymm17, %ymm17 {%k3} + +// CHECK: vprolvq %ymm28, %ymm17, %ymm17 {%k3} {z} +// CHECK: encoding: [0x62,0x82,0xf5,0xa3,0x15,0xcc] + vprolvq %ymm28, %ymm17, %ymm17 {%k3} {z} + +// CHECK: vprolvq (%rcx), %ymm17, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xf5,0x20,0x15,0x09] + vprolvq (%rcx), %ymm17, %ymm17 + +// CHECK: vprolvq 291(%rax,%r14,8), %ymm17, %ymm17 +// CHECK: encoding: [0x62,0xa2,0xf5,0x20,0x15,0x8c,0xf0,0x23,0x01,0x00,0x00] + vprolvq 291(%rax,%r14,8), %ymm17, %ymm17 + +// CHECK: vprolvq (%rcx){1to4}, %ymm17, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xf5,0x30,0x15,0x09] + vprolvq (%rcx){1to4}, %ymm17, %ymm17 + +// CHECK: vprolvq 4064(%rdx), %ymm17, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xf5,0x20,0x15,0x4a,0x7f] + vprolvq 4064(%rdx), %ymm17, %ymm17 + +// CHECK: vprolvq 4096(%rdx), %ymm17, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xf5,0x20,0x15,0x8a,0x00,0x10,0x00,0x00] + vprolvq 4096(%rdx), %ymm17, %ymm17 + +// CHECK: vprolvq -4096(%rdx), %ymm17, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xf5,0x20,0x15,0x4a,0x80] + vprolvq -4096(%rdx), %ymm17, %ymm17 + +// CHECK: vprolvq -4128(%rdx), %ymm17, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xf5,0x20,0x15,0x8a,0xe0,0xef,0xff,0xff] + vprolvq -4128(%rdx), %ymm17, %ymm17 + +// CHECK: vprolvq 1016(%rdx){1to4}, %ymm17, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xf5,0x30,0x15,0x4a,0x7f] + vprolvq 1016(%rdx){1to4}, %ymm17, %ymm17 + +// CHECK: vprolvq 1024(%rdx){1to4}, %ymm17, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xf5,0x30,0x15,0x8a,0x00,0x04,0x00,0x00] + vprolvq 1024(%rdx){1to4}, %ymm17, %ymm17 + +// CHECK: vprolvq -1024(%rdx){1to4}, %ymm17, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xf5,0x30,0x15,0x4a,0x80] + vprolvq -1024(%rdx){1to4}, %ymm17, %ymm17 + +// CHECK: vprolvq -1032(%rdx){1to4}, %ymm17, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xf5,0x30,0x15,0x8a,0xf8,0xfb,0xff,0xff] + vprolvq -1032(%rdx){1to4}, %ymm17, %ymm17 + +// CHECK: vprolq $171, %xmm19, %xmm28 +// CHECK: encoding: [0x62,0xb1,0x9d,0x00,0x72,0xcb,0xab] + vprolq $171, %xmm19, %xmm28 + +// CHECK: vprolq $171, %xmm19, %xmm28 {%k2} +// CHECK: encoding: [0x62,0xb1,0x9d,0x02,0x72,0xcb,0xab] + vprolq $171, %xmm19, %xmm28 {%k2} + +// CHECK: vprolq $171, %xmm19, %xmm28 {%k2} {z} +// CHECK: encoding: [0x62,0xb1,0x9d,0x82,0x72,0xcb,0xab] + vprolq $171, %xmm19, %xmm28 {%k2} {z} + +// CHECK: vprolq $123, %xmm19, %xmm28 +// CHECK: encoding: [0x62,0xb1,0x9d,0x00,0x72,0xcb,0x7b] + vprolq $123, %xmm19, %xmm28 + +// CHECK: vprolq $123, (%rcx), %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x00,0x72,0x09,0x7b] + vprolq $123, (%rcx), %xmm28 + +// CHECK: vprolq $123, 291(%rax,%r14,8), %xmm28 +// CHECK: encoding: [0x62,0xb1,0x9d,0x00,0x72,0x8c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vprolq $123, 291(%rax,%r14,8), %xmm28 + +// CHECK: vprolq $123, (%rcx){1to2}, %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x10,0x72,0x09,0x7b] + vprolq $123, (%rcx){1to2}, %xmm28 + +// CHECK: vprolq $123, 2032(%rdx), %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x00,0x72,0x4a,0x7f,0x7b] + vprolq $123, 2032(%rdx), %xmm28 + +// CHECK: vprolq $123, 2048(%rdx), %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x00,0x72,0x8a,0x00,0x08,0x00,0x00,0x7b] + vprolq $123, 2048(%rdx), %xmm28 + +// CHECK: vprolq $123, -2048(%rdx), %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x00,0x72,0x4a,0x80,0x7b] + vprolq $123, -2048(%rdx), %xmm28 + +// CHECK: vprolq $123, -2064(%rdx), %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x00,0x72,0x8a,0xf0,0xf7,0xff,0xff,0x7b] + vprolq $123, -2064(%rdx), %xmm28 + +// CHECK: vprolq $123, 1016(%rdx){1to2}, %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x10,0x72,0x4a,0x7f,0x7b] + vprolq $123, 1016(%rdx){1to2}, %xmm28 + +// CHECK: vprolq $123, 1024(%rdx){1to2}, %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x10,0x72,0x8a,0x00,0x04,0x00,0x00,0x7b] + vprolq $123, 1024(%rdx){1to2}, %xmm28 + +// CHECK: vprolq $123, -1024(%rdx){1to2}, %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x10,0x72,0x4a,0x80,0x7b] + vprolq $123, -1024(%rdx){1to2}, %xmm28 + +// CHECK: vprolq $123, -1032(%rdx){1to2}, %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x10,0x72,0x8a,0xf8,0xfb,0xff,0xff,0x7b] + vprolq $123, -1032(%rdx){1to2}, %xmm28 + +// CHECK: vprolq $171, %ymm24, %ymm25 +// CHECK: encoding: [0x62,0x91,0xb5,0x20,0x72,0xc8,0xab] + vprolq $171, %ymm24, %ymm25 + +// CHECK: vprolq $171, %ymm24, %ymm25 {%k5} +// CHECK: encoding: [0x62,0x91,0xb5,0x25,0x72,0xc8,0xab] + vprolq $171, %ymm24, %ymm25 {%k5} + +// CHECK: vprolq $171, %ymm24, %ymm25 {%k5} {z} +// CHECK: encoding: [0x62,0x91,0xb5,0xa5,0x72,0xc8,0xab] + vprolq $171, %ymm24, %ymm25 {%k5} {z} + +// CHECK: vprolq $123, %ymm24, %ymm25 +// CHECK: encoding: [0x62,0x91,0xb5,0x20,0x72,0xc8,0x7b] + vprolq $123, %ymm24, %ymm25 + +// CHECK: vprolq $123, (%rcx), %ymm25 +// CHECK: encoding: [0x62,0xf1,0xb5,0x20,0x72,0x09,0x7b] + vprolq $123, (%rcx), %ymm25 + +// CHECK: vprolq $123, 291(%rax,%r14,8), %ymm25 +// CHECK: encoding: [0x62,0xb1,0xb5,0x20,0x72,0x8c,0xf0,0x23,0x01,0x00,0x00,0x7b] + vprolq $123, 291(%rax,%r14,8), %ymm25 + +// CHECK: vprolq $123, (%rcx){1to4}, %ymm25 +// CHECK: encoding: [0x62,0xf1,0xb5,0x30,0x72,0x09,0x7b] + vprolq $123, (%rcx){1to4}, %ymm25 + +// CHECK: vprolq $123, 4064(%rdx), %ymm25 +// CHECK: encoding: [0x62,0xf1,0xb5,0x20,0x72,0x4a,0x7f,0x7b] + vprolq $123, 4064(%rdx), %ymm25 + +// CHECK: vprolq $123, 4096(%rdx), %ymm25 +// CHECK: encoding: [0x62,0xf1,0xb5,0x20,0x72,0x8a,0x00,0x10,0x00,0x00,0x7b] + vprolq $123, 4096(%rdx), %ymm25 + +// CHECK: vprolq $123, -4096(%rdx), %ymm25 +// CHECK: encoding: [0x62,0xf1,0xb5,0x20,0x72,0x4a,0x80,0x7b] + vprolq $123, -4096(%rdx), %ymm25 + +// CHECK: vprolq $123, -4128(%rdx), %ymm25 +// CHECK: encoding: [0x62,0xf1,0xb5,0x20,0x72,0x8a,0xe0,0xef,0xff,0xff,0x7b] + vprolq $123, -4128(%rdx), %ymm25 + +// CHECK: vprolq $123, 1016(%rdx){1to4}, %ymm25 +// CHECK: encoding: [0x62,0xf1,0xb5,0x30,0x72,0x4a,0x7f,0x7b] + vprolq $123, 1016(%rdx){1to4}, %ymm25 + +// CHECK: vprolq $123, 1024(%rdx){1to4}, %ymm25 +// CHECK: encoding: [0x62,0xf1,0xb5,0x30,0x72,0x8a,0x00,0x04,0x00,0x00,0x7b] + vprolq $123, 1024(%rdx){1to4}, %ymm25 + +// CHECK: vprolq $123, -1024(%rdx){1to4}, %ymm25 +// CHECK: encoding: [0x62,0xf1,0xb5,0x30,0x72,0x4a,0x80,0x7b] + vprolq $123, -1024(%rdx){1to4}, %ymm25 + +// CHECK: vprolq $123, -1032(%rdx){1to4}, %ymm25 +// CHECK: encoding: [0x62,0xf1,0xb5,0x30,0x72,0x8a,0xf8,0xfb,0xff,0xff,0x7b] + vprolq $123, -1032(%rdx){1to4}, %ymm25 + +// CHECK: vprorvd %xmm22, %xmm26, %xmm25 +// CHECK: encoding: [0x62,0x22,0x2d,0x00,0x14,0xce] + vprorvd %xmm22, %xmm26, %xmm25 + +// CHECK: vprorvd %xmm22, %xmm26, %xmm25 {%k4} +// CHECK: encoding: [0x62,0x22,0x2d,0x04,0x14,0xce] + vprorvd %xmm22, %xmm26, %xmm25 {%k4} + +// CHECK: vprorvd %xmm22, %xmm26, %xmm25 {%k4} {z} +// CHECK: encoding: [0x62,0x22,0x2d,0x84,0x14,0xce] + vprorvd %xmm22, %xmm26, %xmm25 {%k4} {z} + +// CHECK: vprorvd (%rcx), %xmm26, %xmm25 +// CHECK: encoding: [0x62,0x62,0x2d,0x00,0x14,0x09] + vprorvd (%rcx), %xmm26, %xmm25 + +// CHECK: vprorvd 291(%rax,%r14,8), %xmm26, %xmm25 +// CHECK: encoding: [0x62,0x22,0x2d,0x00,0x14,0x8c,0xf0,0x23,0x01,0x00,0x00] + vprorvd 291(%rax,%r14,8), %xmm26, %xmm25 + +// CHECK: vprorvd (%rcx){1to4}, %xmm26, %xmm25 +// CHECK: encoding: [0x62,0x62,0x2d,0x10,0x14,0x09] + vprorvd (%rcx){1to4}, %xmm26, %xmm25 + +// CHECK: vprorvd 2032(%rdx), %xmm26, %xmm25 +// CHECK: encoding: [0x62,0x62,0x2d,0x00,0x14,0x4a,0x7f] + vprorvd 2032(%rdx), %xmm26, %xmm25 + +// CHECK: vprorvd 2048(%rdx), %xmm26, %xmm25 +// CHECK: encoding: [0x62,0x62,0x2d,0x00,0x14,0x8a,0x00,0x08,0x00,0x00] + vprorvd 2048(%rdx), %xmm26, %xmm25 + +// CHECK: vprorvd -2048(%rdx), %xmm26, %xmm25 +// CHECK: encoding: [0x62,0x62,0x2d,0x00,0x14,0x4a,0x80] + vprorvd -2048(%rdx), %xmm26, %xmm25 + +// CHECK: vprorvd -2064(%rdx), %xmm26, %xmm25 +// CHECK: encoding: [0x62,0x62,0x2d,0x00,0x14,0x8a,0xf0,0xf7,0xff,0xff] + vprorvd -2064(%rdx), %xmm26, %xmm25 + +// CHECK: vprorvd 508(%rdx){1to4}, %xmm26, %xmm25 +// CHECK: encoding: [0x62,0x62,0x2d,0x10,0x14,0x4a,0x7f] + vprorvd 508(%rdx){1to4}, %xmm26, %xmm25 + +// CHECK: vprorvd 512(%rdx){1to4}, %xmm26, %xmm25 +// CHECK: encoding: [0x62,0x62,0x2d,0x10,0x14,0x8a,0x00,0x02,0x00,0x00] + vprorvd 512(%rdx){1to4}, %xmm26, %xmm25 + +// CHECK: vprorvd -512(%rdx){1to4}, %xmm26, %xmm25 +// CHECK: encoding: [0x62,0x62,0x2d,0x10,0x14,0x4a,0x80] + vprorvd -512(%rdx){1to4}, %xmm26, %xmm25 + +// CHECK: vprorvd -516(%rdx){1to4}, %xmm26, %xmm25 +// CHECK: encoding: [0x62,0x62,0x2d,0x10,0x14,0x8a,0xfc,0xfd,0xff,0xff] + vprorvd -516(%rdx){1to4}, %xmm26, %xmm25 + +// CHECK: vprorvd %ymm25, %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x02,0x1d,0x20,0x14,0xc1] + vprorvd %ymm25, %ymm28, %ymm24 + +// CHECK: vprorvd %ymm25, %ymm28, %ymm24 {%k4} +// CHECK: encoding: [0x62,0x02,0x1d,0x24,0x14,0xc1] + vprorvd %ymm25, %ymm28, %ymm24 {%k4} + +// CHECK: vprorvd %ymm25, %ymm28, %ymm24 {%k4} {z} +// CHECK: encoding: [0x62,0x02,0x1d,0xa4,0x14,0xc1] + vprorvd %ymm25, %ymm28, %ymm24 {%k4} {z} + +// CHECK: vprorvd (%rcx), %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x62,0x1d,0x20,0x14,0x01] + vprorvd (%rcx), %ymm28, %ymm24 + +// CHECK: vprorvd 291(%rax,%r14,8), %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x22,0x1d,0x20,0x14,0x84,0xf0,0x23,0x01,0x00,0x00] + vprorvd 291(%rax,%r14,8), %ymm28, %ymm24 + +// CHECK: vprorvd (%rcx){1to8}, %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x62,0x1d,0x30,0x14,0x01] + vprorvd (%rcx){1to8}, %ymm28, %ymm24 + +// CHECK: vprorvd 4064(%rdx), %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x62,0x1d,0x20,0x14,0x42,0x7f] + vprorvd 4064(%rdx), %ymm28, %ymm24 + +// CHECK: vprorvd 4096(%rdx), %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x62,0x1d,0x20,0x14,0x82,0x00,0x10,0x00,0x00] + vprorvd 4096(%rdx), %ymm28, %ymm24 + +// CHECK: vprorvd -4096(%rdx), %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x62,0x1d,0x20,0x14,0x42,0x80] + vprorvd -4096(%rdx), %ymm28, %ymm24 + +// CHECK: vprorvd -4128(%rdx), %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x62,0x1d,0x20,0x14,0x82,0xe0,0xef,0xff,0xff] + vprorvd -4128(%rdx), %ymm28, %ymm24 + +// CHECK: vprorvd 508(%rdx){1to8}, %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x62,0x1d,0x30,0x14,0x42,0x7f] + vprorvd 508(%rdx){1to8}, %ymm28, %ymm24 + +// CHECK: vprorvd 512(%rdx){1to8}, %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x62,0x1d,0x30,0x14,0x82,0x00,0x02,0x00,0x00] + vprorvd 512(%rdx){1to8}, %ymm28, %ymm24 + +// CHECK: vprorvd -512(%rdx){1to8}, %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x62,0x1d,0x30,0x14,0x42,0x80] + vprorvd -512(%rdx){1to8}, %ymm28, %ymm24 + +// CHECK: vprorvd -516(%rdx){1to8}, %ymm28, %ymm24 +// CHECK: encoding: [0x62,0x62,0x1d,0x30,0x14,0x82,0xfc,0xfd,0xff,0xff] + vprorvd -516(%rdx){1to8}, %ymm28, %ymm24 + +// CHECK: vprord $171, %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x91,0x15,0x00,0x72,0xc1,0xab] + vprord $171, %xmm25, %xmm29 + +// CHECK: vprord $171, %xmm25, %xmm29 {%k3} +// CHECK: encoding: [0x62,0x91,0x15,0x03,0x72,0xc1,0xab] + vprord $171, %xmm25, %xmm29 {%k3} + +// CHECK: vprord $171, %xmm25, %xmm29 {%k3} {z} +// CHECK: encoding: [0x62,0x91,0x15,0x83,0x72,0xc1,0xab] + vprord $171, %xmm25, %xmm29 {%k3} {z} + +// CHECK: vprord $123, %xmm25, %xmm29 +// CHECK: encoding: [0x62,0x91,0x15,0x00,0x72,0xc1,0x7b] + vprord $123, %xmm25, %xmm29 + +// CHECK: vprord $123, (%rcx), %xmm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x72,0x01,0x7b] + vprord $123, (%rcx), %xmm29 + +// CHECK: vprord $123, 291(%rax,%r14,8), %xmm29 +// CHECK: encoding: [0x62,0xb1,0x15,0x00,0x72,0x84,0xf0,0x23,0x01,0x00,0x00,0x7b] + vprord $123, 291(%rax,%r14,8), %xmm29 + +// CHECK: vprord $123, (%rcx){1to4}, %xmm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x72,0x01,0x7b] + vprord $123, (%rcx){1to4}, %xmm29 + +// CHECK: vprord $123, 2032(%rdx), %xmm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x72,0x42,0x7f,0x7b] + vprord $123, 2032(%rdx), %xmm29 + +// CHECK: vprord $123, 2048(%rdx), %xmm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x72,0x82,0x00,0x08,0x00,0x00,0x7b] + vprord $123, 2048(%rdx), %xmm29 + +// CHECK: vprord $123, -2048(%rdx), %xmm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x72,0x42,0x80,0x7b] + vprord $123, -2048(%rdx), %xmm29 + +// CHECK: vprord $123, -2064(%rdx), %xmm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x00,0x72,0x82,0xf0,0xf7,0xff,0xff,0x7b] + vprord $123, -2064(%rdx), %xmm29 + +// CHECK: vprord $123, 508(%rdx){1to4}, %xmm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x72,0x42,0x7f,0x7b] + vprord $123, 508(%rdx){1to4}, %xmm29 + +// CHECK: vprord $123, 512(%rdx){1to4}, %xmm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x72,0x82,0x00,0x02,0x00,0x00,0x7b] + vprord $123, 512(%rdx){1to4}, %xmm29 + +// CHECK: vprord $123, -512(%rdx){1to4}, %xmm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x72,0x42,0x80,0x7b] + vprord $123, -512(%rdx){1to4}, %xmm29 + +// CHECK: vprord $123, -516(%rdx){1to4}, %xmm29 +// CHECK: encoding: [0x62,0xf1,0x15,0x10,0x72,0x82,0xfc,0xfd,0xff,0xff,0x7b] + vprord $123, -516(%rdx){1to4}, %xmm29 + +// CHECK: vprord $171, %ymm29, %ymm30 +// CHECK: encoding: [0x62,0x91,0x0d,0x20,0x72,0xc5,0xab] + vprord $171, %ymm29, %ymm30 + +// CHECK: vprord $171, %ymm29, %ymm30 {%k6} +// CHECK: encoding: [0x62,0x91,0x0d,0x26,0x72,0xc5,0xab] + vprord $171, %ymm29, %ymm30 {%k6} + +// CHECK: vprord $171, %ymm29, %ymm30 {%k6} {z} +// CHECK: encoding: [0x62,0x91,0x0d,0xa6,0x72,0xc5,0xab] + vprord $171, %ymm29, %ymm30 {%k6} {z} + +// CHECK: vprord $123, %ymm29, %ymm30 +// CHECK: encoding: [0x62,0x91,0x0d,0x20,0x72,0xc5,0x7b] + vprord $123, %ymm29, %ymm30 + +// CHECK: vprord $123, (%rcx), %ymm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x20,0x72,0x01,0x7b] + vprord $123, (%rcx), %ymm30 + +// CHECK: vprord $123, 291(%rax,%r14,8), %ymm30 +// CHECK: encoding: [0x62,0xb1,0x0d,0x20,0x72,0x84,0xf0,0x23,0x01,0x00,0x00,0x7b] + vprord $123, 291(%rax,%r14,8), %ymm30 + +// CHECK: vprord $123, (%rcx){1to8}, %ymm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x30,0x72,0x01,0x7b] + vprord $123, (%rcx){1to8}, %ymm30 + +// CHECK: vprord $123, 4064(%rdx), %ymm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x20,0x72,0x42,0x7f,0x7b] + vprord $123, 4064(%rdx), %ymm30 + +// CHECK: vprord $123, 4096(%rdx), %ymm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x20,0x72,0x82,0x00,0x10,0x00,0x00,0x7b] + vprord $123, 4096(%rdx), %ymm30 + +// CHECK: vprord $123, -4096(%rdx), %ymm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x20,0x72,0x42,0x80,0x7b] + vprord $123, -4096(%rdx), %ymm30 + +// CHECK: vprord $123, -4128(%rdx), %ymm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x20,0x72,0x82,0xe0,0xef,0xff,0xff,0x7b] + vprord $123, -4128(%rdx), %ymm30 + +// CHECK: vprord $123, 508(%rdx){1to8}, %ymm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x30,0x72,0x42,0x7f,0x7b] + vprord $123, 508(%rdx){1to8}, %ymm30 + +// CHECK: vprord $123, 512(%rdx){1to8}, %ymm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x30,0x72,0x82,0x00,0x02,0x00,0x00,0x7b] + vprord $123, 512(%rdx){1to8}, %ymm30 + +// CHECK: vprord $123, -512(%rdx){1to8}, %ymm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x30,0x72,0x42,0x80,0x7b] + vprord $123, -512(%rdx){1to8}, %ymm30 + +// CHECK: vprord $123, -516(%rdx){1to8}, %ymm30 +// CHECK: encoding: [0x62,0xf1,0x0d,0x30,0x72,0x82,0xfc,0xfd,0xff,0xff,0x7b] + vprord $123, -516(%rdx){1to8}, %ymm30 + +// CHECK: vprorvq %xmm24, %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x02,0xd5,0x00,0x14,0xd0] + vprorvq %xmm24, %xmm21, %xmm26 + +// CHECK: vprorvq %xmm24, %xmm21, %xmm26 {%k4} +// CHECK: encoding: [0x62,0x02,0xd5,0x04,0x14,0xd0] + vprorvq %xmm24, %xmm21, %xmm26 {%k4} + +// CHECK: vprorvq %xmm24, %xmm21, %xmm26 {%k4} {z} +// CHECK: encoding: [0x62,0x02,0xd5,0x84,0x14,0xd0] + vprorvq %xmm24, %xmm21, %xmm26 {%k4} {z} + +// CHECK: vprorvq (%rcx), %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x00,0x14,0x11] + vprorvq (%rcx), %xmm21, %xmm26 + +// CHECK: vprorvq 291(%rax,%r14,8), %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x22,0xd5,0x00,0x14,0x94,0xf0,0x23,0x01,0x00,0x00] + vprorvq 291(%rax,%r14,8), %xmm21, %xmm26 + +// CHECK: vprorvq (%rcx){1to2}, %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x10,0x14,0x11] + vprorvq (%rcx){1to2}, %xmm21, %xmm26 + +// CHECK: vprorvq 2032(%rdx), %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x00,0x14,0x52,0x7f] + vprorvq 2032(%rdx), %xmm21, %xmm26 + +// CHECK: vprorvq 2048(%rdx), %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x00,0x14,0x92,0x00,0x08,0x00,0x00] + vprorvq 2048(%rdx), %xmm21, %xmm26 + +// CHECK: vprorvq -2048(%rdx), %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x00,0x14,0x52,0x80] + vprorvq -2048(%rdx), %xmm21, %xmm26 + +// CHECK: vprorvq -2064(%rdx), %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x00,0x14,0x92,0xf0,0xf7,0xff,0xff] + vprorvq -2064(%rdx), %xmm21, %xmm26 + +// CHECK: vprorvq 1016(%rdx){1to2}, %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x10,0x14,0x52,0x7f] + vprorvq 1016(%rdx){1to2}, %xmm21, %xmm26 + +// CHECK: vprorvq 1024(%rdx){1to2}, %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x10,0x14,0x92,0x00,0x04,0x00,0x00] + vprorvq 1024(%rdx){1to2}, %xmm21, %xmm26 + +// CHECK: vprorvq -1024(%rdx){1to2}, %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x10,0x14,0x52,0x80] + vprorvq -1024(%rdx){1to2}, %xmm21, %xmm26 + +// CHECK: vprorvq -1032(%rdx){1to2}, %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x10,0x14,0x92,0xf8,0xfb,0xff,0xff] + vprorvq -1032(%rdx){1to2}, %xmm21, %xmm26 + +// CHECK: vprorvq %ymm28, %ymm24, %ymm20 +// CHECK: encoding: [0x62,0x82,0xbd,0x20,0x14,0xe4] + vprorvq %ymm28, %ymm24, %ymm20 + +// CHECK: vprorvq %ymm28, %ymm24, %ymm20 {%k7} +// CHECK: encoding: [0x62,0x82,0xbd,0x27,0x14,0xe4] + vprorvq %ymm28, %ymm24, %ymm20 {%k7} + +// CHECK: vprorvq %ymm28, %ymm24, %ymm20 {%k7} {z} +// CHECK: encoding: [0x62,0x82,0xbd,0xa7,0x14,0xe4] + vprorvq %ymm28, %ymm24, %ymm20 {%k7} {z} + +// CHECK: vprorvq (%rcx), %ymm24, %ymm20 +// CHECK: encoding: [0x62,0xe2,0xbd,0x20,0x14,0x21] + vprorvq (%rcx), %ymm24, %ymm20 + +// CHECK: vprorvq 291(%rax,%r14,8), %ymm24, %ymm20 +// CHECK: encoding: [0x62,0xa2,0xbd,0x20,0x14,0xa4,0xf0,0x23,0x01,0x00,0x00] + vprorvq 291(%rax,%r14,8), %ymm24, %ymm20 + +// CHECK: vprorvq (%rcx){1to4}, %ymm24, %ymm20 +// CHECK: encoding: [0x62,0xe2,0xbd,0x30,0x14,0x21] + vprorvq (%rcx){1to4}, %ymm24, %ymm20 + +// CHECK: vprorvq 4064(%rdx), %ymm24, %ymm20 +// CHECK: encoding: [0x62,0xe2,0xbd,0x20,0x14,0x62,0x7f] + vprorvq 4064(%rdx), %ymm24, %ymm20 + +// CHECK: vprorvq 4096(%rdx), %ymm24, %ymm20 +// CHECK: encoding: [0x62,0xe2,0xbd,0x20,0x14,0xa2,0x00,0x10,0x00,0x00] + vprorvq 4096(%rdx), %ymm24, %ymm20 + +// CHECK: vprorvq -4096(%rdx), %ymm24, %ymm20 +// CHECK: encoding: [0x62,0xe2,0xbd,0x20,0x14,0x62,0x80] + vprorvq -4096(%rdx), %ymm24, %ymm20 + +// CHECK: vprorvq -4128(%rdx), %ymm24, %ymm20 +// CHECK: encoding: [0x62,0xe2,0xbd,0x20,0x14,0xa2,0xe0,0xef,0xff,0xff] + vprorvq -4128(%rdx), %ymm24, %ymm20 + +// CHECK: vprorvq 1016(%rdx){1to4}, %ymm24, %ymm20 +// CHECK: encoding: [0x62,0xe2,0xbd,0x30,0x14,0x62,0x7f] + vprorvq 1016(%rdx){1to4}, %ymm24, %ymm20 + +// CHECK: vprorvq 1024(%rdx){1to4}, %ymm24, %ymm20 +// CHECK: encoding: [0x62,0xe2,0xbd,0x30,0x14,0xa2,0x00,0x04,0x00,0x00] + vprorvq 1024(%rdx){1to4}, %ymm24, %ymm20 + +// CHECK: vprorvq -1024(%rdx){1to4}, %ymm24, %ymm20 +// CHECK: encoding: [0x62,0xe2,0xbd,0x30,0x14,0x62,0x80] + vprorvq -1024(%rdx){1to4}, %ymm24, %ymm20 + +// CHECK: vprorvq -1032(%rdx){1to4}, %ymm24, %ymm20 +// CHECK: encoding: [0x62,0xe2,0xbd,0x30,0x14,0xa2,0xf8,0xfb,0xff,0xff] + vprorvq -1032(%rdx){1to4}, %ymm24, %ymm20 + +// CHECK: vprorq $171, %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x91,0x9d,0x00,0x72,0xc4,0xab] + vprorq $171, %xmm28, %xmm28 + +// CHECK: vprorq $171, %xmm28, %xmm28 {%k1} +// CHECK: encoding: [0x62,0x91,0x9d,0x01,0x72,0xc4,0xab] + vprorq $171, %xmm28, %xmm28 {%k1} + +// CHECK: vprorq $171, %xmm28, %xmm28 {%k1} {z} +// CHECK: encoding: [0x62,0x91,0x9d,0x81,0x72,0xc4,0xab] + vprorq $171, %xmm28, %xmm28 {%k1} {z} + +// CHECK: vprorq $123, %xmm28, %xmm28 +// CHECK: encoding: [0x62,0x91,0x9d,0x00,0x72,0xc4,0x7b] + vprorq $123, %xmm28, %xmm28 + +// CHECK: vprorq $123, (%rcx), %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x00,0x72,0x01,0x7b] + vprorq $123, (%rcx), %xmm28 + +// CHECK: vprorq $123, 291(%rax,%r14,8), %xmm28 +// CHECK: encoding: [0x62,0xb1,0x9d,0x00,0x72,0x84,0xf0,0x23,0x01,0x00,0x00,0x7b] + vprorq $123, 291(%rax,%r14,8), %xmm28 + +// CHECK: vprorq $123, (%rcx){1to2}, %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x10,0x72,0x01,0x7b] + vprorq $123, (%rcx){1to2}, %xmm28 + +// CHECK: vprorq $123, 2032(%rdx), %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x00,0x72,0x42,0x7f,0x7b] + vprorq $123, 2032(%rdx), %xmm28 + +// CHECK: vprorq $123, 2048(%rdx), %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x00,0x72,0x82,0x00,0x08,0x00,0x00,0x7b] + vprorq $123, 2048(%rdx), %xmm28 + +// CHECK: vprorq $123, -2048(%rdx), %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x00,0x72,0x42,0x80,0x7b] + vprorq $123, -2048(%rdx), %xmm28 + +// CHECK: vprorq $123, -2064(%rdx), %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x00,0x72,0x82,0xf0,0xf7,0xff,0xff,0x7b] + vprorq $123, -2064(%rdx), %xmm28 + +// CHECK: vprorq $123, 1016(%rdx){1to2}, %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x10,0x72,0x42,0x7f,0x7b] + vprorq $123, 1016(%rdx){1to2}, %xmm28 + +// CHECK: vprorq $123, 1024(%rdx){1to2}, %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x10,0x72,0x82,0x00,0x04,0x00,0x00,0x7b] + vprorq $123, 1024(%rdx){1to2}, %xmm28 + +// CHECK: vprorq $123, -1024(%rdx){1to2}, %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x10,0x72,0x42,0x80,0x7b] + vprorq $123, -1024(%rdx){1to2}, %xmm28 + +// CHECK: vprorq $123, -1032(%rdx){1to2}, %xmm28 +// CHECK: encoding: [0x62,0xf1,0x9d,0x10,0x72,0x82,0xf8,0xfb,0xff,0xff,0x7b] + vprorq $123, -1032(%rdx){1to2}, %xmm28 + +// CHECK: vprorq $171, %ymm17, %ymm21 +// CHECK: encoding: [0x62,0xb1,0xd5,0x20,0x72,0xc1,0xab] + vprorq $171, %ymm17, %ymm21 + +// CHECK: vprorq $171, %ymm17, %ymm21 {%k1} +// CHECK: encoding: [0x62,0xb1,0xd5,0x21,0x72,0xc1,0xab] + vprorq $171, %ymm17, %ymm21 {%k1} + +// CHECK: vprorq $171, %ymm17, %ymm21 {%k1} {z} +// CHECK: encoding: [0x62,0xb1,0xd5,0xa1,0x72,0xc1,0xab] + vprorq $171, %ymm17, %ymm21 {%k1} {z} + +// CHECK: vprorq $123, %ymm17, %ymm21 +// CHECK: encoding: [0x62,0xb1,0xd5,0x20,0x72,0xc1,0x7b] + vprorq $123, %ymm17, %ymm21 + +// CHECK: vprorq $123, (%rcx), %ymm21 +// CHECK: encoding: [0x62,0xf1,0xd5,0x20,0x72,0x01,0x7b] + vprorq $123, (%rcx), %ymm21 + +// CHECK: vprorq $123, 291(%rax,%r14,8), %ymm21 +// CHECK: encoding: [0x62,0xb1,0xd5,0x20,0x72,0x84,0xf0,0x23,0x01,0x00,0x00,0x7b] + vprorq $123, 291(%rax,%r14,8), %ymm21 + +// CHECK: vprorq $123, (%rcx){1to4}, %ymm21 +// CHECK: encoding: [0x62,0xf1,0xd5,0x30,0x72,0x01,0x7b] + vprorq $123, (%rcx){1to4}, %ymm21 + +// CHECK: vprorq $123, 4064(%rdx), %ymm21 +// CHECK: encoding: [0x62,0xf1,0xd5,0x20,0x72,0x42,0x7f,0x7b] + vprorq $123, 4064(%rdx), %ymm21 + +// CHECK: vprorq $123, 4096(%rdx), %ymm21 +// CHECK: encoding: [0x62,0xf1,0xd5,0x20,0x72,0x82,0x00,0x10,0x00,0x00,0x7b] + vprorq $123, 4096(%rdx), %ymm21 + +// CHECK: vprorq $123, -4096(%rdx), %ymm21 +// CHECK: encoding: [0x62,0xf1,0xd5,0x20,0x72,0x42,0x80,0x7b] + vprorq $123, -4096(%rdx), %ymm21 + +// CHECK: vprorq $123, -4128(%rdx), %ymm21 +// CHECK: encoding: [0x62,0xf1,0xd5,0x20,0x72,0x82,0xe0,0xef,0xff,0xff,0x7b] + vprorq $123, -4128(%rdx), %ymm21 + +// CHECK: vprorq $123, 1016(%rdx){1to4}, %ymm21 +// CHECK: encoding: [0x62,0xf1,0xd5,0x30,0x72,0x42,0x7f,0x7b] + vprorq $123, 1016(%rdx){1to4}, %ymm21 + +// CHECK: vprorq $123, 1024(%rdx){1to4}, %ymm21 +// CHECK: encoding: [0x62,0xf1,0xd5,0x30,0x72,0x82,0x00,0x04,0x00,0x00,0x7b] + vprorq $123, 1024(%rdx){1to4}, %ymm21 + +// CHECK: vprorq $123, -1024(%rdx){1to4}, %ymm21 +// CHECK: encoding: [0x62,0xf1,0xd5,0x30,0x72,0x42,0x80,0x7b] + vprorq $123, -1024(%rdx){1to4}, %ymm21 + +// CHECK: vprorq $123, -1032(%rdx){1to4}, %ymm21 +// CHECK: encoding: [0x62,0xf1,0xd5,0x30,0x72,0x82,0xf8,0xfb,0xff,0xff,0x7b] + vprorq $123, -1032(%rdx){1to4}, %ymm21 diff --git a/test/MC/X86/x86_64-avx-encoding.s b/test/MC/X86/x86_64-avx-encoding.s index 9da08df..1440d08 100644 --- a/test/MC/X86/x86_64-avx-encoding.s +++ b/test/MC/X86/x86_64-avx-encoding.s @@ -3724,6 +3724,10 @@ vdivpd -4(%rcx,%rbx,8), %xmm10, %xmm11 // CHECK: encoding: [0xc4,0x63,0x2d,0x40,0x18,0x03] vdpps $3, (%rax), %ymm10, %ymm11 +// CHECK: vbroadcasti128 (%rax), %ymm12 +// CHECK: encoding: [0xc4,0x62,0x7d,0x5a,0x20] + vbroadcasti128 (%rax), %ymm12 + // CHECK: vbroadcastf128 (%rax), %ymm12 // CHECK: encoding: [0xc4,0x62,0x7d,0x1a,0x20] vbroadcastf128 (%rax), %ymm12 -- cgit v1.1