From 4cbbbf49b69646ff990203ef3feae6a2726b8753 Mon Sep 17 00:00:00 2001
From: Joey Gouly <joey.gouly@arm.com>
Date: Thu, 20 Jun 2013 17:42:36 +0000
Subject: This reverts r155000. The cdp2 instruction should have the same
 restrictions as cdp on the co-processor registers.

VFP instructions on v8/AArch32 share the same encoding space as cdp2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184445 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/MC/ARM/basic-arm-instructions.s          | 2 ++
 test/MC/Disassembler/ARM/arm-tests.txt        | 4 ----
 test/MC/Disassembler/ARM/invalid-CDP2-arm.txt | 4 ++++
 3 files changed, 6 insertions(+), 4 deletions(-)
 create mode 100644 test/MC/Disassembler/ARM/invalid-CDP2-arm.txt

(limited to 'test/MC')

diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s
index 8335797..3061c0f 100644
--- a/test/MC/ARM/basic-arm-instructions.s
+++ b/test/MC/ARM/basic-arm-instructions.s
@@ -459,9 +459,11 @@ Lforward:
 @------------------------------------------------------------------------------
         cdp  p7, #1, c1, c1, c1, #4
         cdp2  p7, #1, c1, c1, c1, #4
+        cdp2   p10, #0, c6, c12, c0, #7
 
 @ CHECK: cdp  p7, #1, c1, c1, c1, #4     @ encoding: [0x81,0x17,0x11,0xee]
 @ CHECK: cdp2  p7, #1, c1, c1, c1, #4    @ encoding: [0x81,0x17,0x11,0xfe]
+@ CHECK: cdp2  p10, #0, c6, c12, c0, #7   @ encoding: [0xe0,0x6a,0x0c,0xfe]
 
 
 @------------------------------------------------------------------------------
diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt
index 98daaa7..acc2d9f 100644
--- a/test/MC/Disassembler/ARM/arm-tests.txt
+++ b/test/MC/Disassembler/ARM/arm-tests.txt
@@ -362,7 +362,3 @@
 
 # CHECK: ldmgt	sp!, {r9}
 0x00 0x02 0xbd 0xc8
-
-# CHECK: cdp2	p10, #0, c6, c12, c0, #7
-0xe0 0x6a 0x0c 0xfe
-
diff --git a/test/MC/Disassembler/ARM/invalid-CDP2-arm.txt b/test/MC/Disassembler/ARM/invalid-CDP2-arm.txt
new file mode 100644
index 0000000..c92bfaa
--- /dev/null
+++ b/test/MC/Disassembler/ARM/invalid-CDP2-arm.txt
@@ -0,0 +1,4 @@
+# RUN: llvm-mc --disassemble %s -triple=arm 2>&1 | FileCheck %s
+
+# CHECK: invalid instruction encoding
+0xe0 0x6a 0x0c 0xfe
-- 
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