From a68c64fbb2f1bee7f9313f3ee19c35677563f974 Mon Sep 17 00:00:00 2001 From: Richard Osborne Date: Sun, 20 Jan 2013 17:22:43 +0000 Subject: Add instruction encodings / disassembler support for 2rus instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172985 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/MC/Disassembler/XCore/xcore.txt | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'test/MC') diff --git a/test/MC/Disassembler/XCore/xcore.txt b/test/MC/Disassembler/XCore/xcore.txt index b022f50..5b7b375 100644 --- a/test/MC/Disassembler/XCore/xcore.txt +++ b/test/MC/Disassembler/XCore/xcore.txt @@ -234,3 +234,26 @@ # CHECK: sub r4, r2, r5 0x89 0x1a + +# 2rus instructions + +# CHECK: add r10, r2, 5 +0xe9 0x92 + +# CHECK: eq r2, r1, 0 +0x24 0xb0 + +# CHECK: ldw r5, r6[1] +0x19 0x09 + +# CHECK: shl r6, r5, 24 +0xa6 0xa5 + +# CHECK: shr r3, r8, 5 +0xf1 0xab + +# CHECK: stw r3, r2[0] +0x38 0x00 + +# CHECK: sub r2, r4, 11 +0x63 0x9d -- cgit v1.1