From 065f259ff5e9e3dcd0da4db3ccd29775c789669d Mon Sep 17 00:00:00 2001
From: David Greene <greened@obbligato.org>
Date: Tue, 5 May 2009 16:28:25 +0000
Subject: Allow multiclass def names to contain "#NAME"" where TableGen
 replaces #NAME# with the name of the defm instantiating the multiclass.  This
 is useful for AVX instruction naming where a "V" prefix is standard
 throughout the ISA.  For example:

multiclass SSE_AVX_Inst<...> {
   def SS : Instr<...>;
   def SD : Instr<...>;
   def PS : Instr<...>;
   def PD : Instr<...>;

   def V#NAME#SS : Instr<...>;
   def V#NAME#SD : Instr<...>;
   def V#NAME#PS : Instr<...>;
   def V#NAME#PD : Instr<...>;
}

defm ADD : SSE_AVX_Inst<...>;

Results in

ADDSS
ADDSD
ADDPS
ADDPD

VADDSS
VADDSD
VADDPS
VADDPD


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70979 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/TableGen/MultiClassDefName.td | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 test/TableGen/MultiClassDefName.td

(limited to 'test/TableGen')

diff --git a/test/TableGen/MultiClassDefName.td b/test/TableGen/MultiClassDefName.td
new file mode 100644
index 0000000..2e71f7d
--- /dev/null
+++ b/test/TableGen/MultiClassDefName.td
@@ -0,0 +1,12 @@
+// RUN: tblgen %s | grep WorldHelloCC | count 1
+
+class C<string n> {
+  string name = n;
+}
+
+multiclass Names<string n, string m> {
+   def CC : C<n>;
+   def World#NAME#CC : C<m>;
+}
+
+defm Hello : Names<"hello", "world">;
-- 
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