From 2c38321556ce9b0ec69d7c228fe6cb7b07b6fd1e Mon Sep 17 00:00:00 2001 From: David Greene Date: Thu, 14 May 2009 22:23:47 +0000 Subject: Implement a !foreach operator analogous to GNU make's $(foreach). Use it on dags and lists like this: class decls { string name; } def Decls : decls; class B names> : A; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71803 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/TableGen/TargetInstrSpec.td | 97 ++++++++++++++++++++++++++++++++++++++++ test/TableGen/foreach.td | 31 +++++++++++++ 2 files changed, 128 insertions(+) create mode 100644 test/TableGen/TargetInstrSpec.td create mode 100644 test/TableGen/foreach.td (limited to 'test/TableGen') diff --git a/test/TableGen/TargetInstrSpec.td b/test/TableGen/TargetInstrSpec.td new file mode 100644 index 0000000..852551d --- /dev/null +++ b/test/TableGen/TargetInstrSpec.td @@ -0,0 +1,97 @@ +// RUN: tblgen %s | grep {[(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))]} | count 1 +// RUN: tblgen %s | grep {[(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))]} | count 2 + +class ValueType { + int Size = size; + int Value = value; +} + +def v2i64 : ValueType<128, 22>; // 2 x i64 vector value +def v2f64 : ValueType<128, 28>; // 2 x f64 vector value + +class Intrinsic { + string Name = name; +} + +class Inst opcode, dag oopnds, dag iopnds, string asmstr, + list pattern> { + bits<8> Opcode = opcode; + dag OutOperands = oopnds; + dag InOperands = iopnds; + string AssemblyString = asmstr; + list Pattern = pattern; +} + +def ops; +def outs; +def ins; + +def set; + +// Define registers +class Register { + string Name = n; +} + +class RegisterClass regTypes, list regList> { + list RegTypes = regTypes; + list MemberList = regList; +} + +def XMM0: Register<"xmm0">; +def XMM1: Register<"xmm1">; +def XMM2: Register<"xmm2">; +def XMM3: Register<"xmm3">; +def XMM4: Register<"xmm4">; +def XMM5: Register<"xmm5">; +def XMM6: Register<"xmm6">; +def XMM7: Register<"xmm7">; +def XMM8: Register<"xmm8">; +def XMM9: Register<"xmm9">; +def XMM10: Register<"xmm10">; +def XMM11: Register<"xmm11">; +def XMM12: Register<"xmm12">; +def XMM13: Register<"xmm13">; +def XMM14: Register<"xmm14">; +def XMM15: Register<"xmm15">; + +def VR128 : RegisterClass<[v2i64, v2f64], + [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, + XMM8, XMM9, XMM10, XMM11, + XMM12, XMM13, XMM14, XMM15]>; + +// Dummy for subst +def REGCLASS : RegisterClass<[], []>; + +class decls { + // Dummy for foreach + dag pattern; + int operand; +} + +def Decls : decls; + +// Define intrinsics +def int_x86_sse2_add_ps : Intrinsic<"addps">; +def int_x86_sse2_add_pd : Intrinsic<"addpd">; +def INTRINSIC : Intrinsic<"Dummy">; + +multiclass arith opcode, string asmstr, string intr, list patterns> { + def PS : Inst(!subst("SUFFIX", "_ps", intr)), + !subst(REGCLASS, VR128, Decls.operand))))>; + + def PD : Inst(!subst("SUFFIX", "_pd", intr)), + !subst(REGCLASS, VR128, Decls.operand))))>; +} + +defm ADD : arith<0x58, "add", "int_x86_sse2_addSUFFIX", + [(set REGCLASS:$dst, (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))]>; + diff --git a/test/TableGen/foreach.td b/test/TableGen/foreach.td new file mode 100644 index 0000000..589520a --- /dev/null +++ b/test/TableGen/foreach.td @@ -0,0 +1,31 @@ +// RUN: tblgen %s | grep {Jr} | count 2 +// RUN: tblgen %s | grep {Sr} | count 2 +// RUN: tblgen %s | not grep {NAME} + +// Variables for foreach +class decls { + string name; +} + +def Decls : decls; + +class A names> { + list Names = names; +} + +class B names> : A; + +class C names> : A; + +class D names> : A; + +class Names { + list values = ["Ken Griffey", "Seymour Cray"]; +} + +def People : Names; + +def Seniors : B; +def Juniors : C; +def Smiths : D<["NAME", "Jane Smith"]>; +def Unprocessed : D; -- cgit v1.1