From 5e6940788fb2f8cf3ce4219d3ac0f78317f54696 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Sat, 29 Jan 2011 01:29:26 +0000 Subject: Re-commit r124462 with fixes. Tail recursion elim will now dup ret into unconditional predecessor to enable TCE on demand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124518 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/Transforms/JumpThreading/and-and-cond.ll | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'test/Transforms/JumpThreading/and-and-cond.ll') diff --git a/test/Transforms/JumpThreading/and-and-cond.ll b/test/Transforms/JumpThreading/and-and-cond.ll index e6db9ee..765d940 100644 --- a/test/Transforms/JumpThreading/and-and-cond.ll +++ b/test/Transforms/JumpThreading/and-and-cond.ll @@ -1,14 +1,14 @@ -; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | grep {ret i32 %v1} -; There should be no uncond branches left. -; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | not grep {br label} +; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | FileCheck %s declare i32 @f1() declare i32 @f2() declare void @f3() define i32 @test(i1 %cond, i1 %cond2, i1 %cond3) { +; CHECK: test br i1 %cond, label %T1, label %F1 +; CHECK-NOT: T1: T1: %v1 = call i32 @f1() br label %Merge @@ -18,6 +18,10 @@ F1: br label %Merge Merge: +; CHECK: Merge: +; CHECK: %v1 = call i32 @f1() +; CHECK-NEXT: %D = and i1 %cond2, %cond3 +; CHECK-NEXT: br i1 %D %A = phi i1 [true, %T1], [false, %F1] %B = phi i32 [%v1, %T1], [%v2, %F1] %C = and i1 %A, %cond2 -- cgit v1.1