From 40f64cb0de40802ddd2f928b62e9564e1e721ff3 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 28 Jan 2011 02:19:21 +0000 Subject: - Stop simplifycfg from duplicating "ret" instructions into unconditional branches. PR8575, rdar://5134905, rdar://8911460. - Allow codegen tail duplication to dup small return blocks after register allocation is done. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124462 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/Transforms/SimplifyCFG/switch_create.ll | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) (limited to 'test/Transforms/SimplifyCFG/switch_create.ll') diff --git a/test/Transforms/SimplifyCFG/switch_create.ll b/test/Transforms/SimplifyCFG/switch_create.ll index da7f65a..4e199bc 100644 --- a/test/Transforms/SimplifyCFG/switch_create.ll +++ b/test/Transforms/SimplifyCFG/switch_create.ll @@ -147,7 +147,7 @@ UnifiedReturnBlock: ; preds = %shortcirc_done.4, %shortcirc_next.4 ; CHECK: i32 16, label %UnifiedReturnBlock ; CHECK: i32 17, label %UnifiedReturnBlock ; CHECK: i32 18, label %UnifiedReturnBlock -; CHECK: i32 19, label %switch.edge +; CHECK: i32 19, label %UnifiedReturnBlock ; CHECK: ] } @@ -441,3 +441,29 @@ if.end: ; CHECK-NOT: switch ; CHECK: ret void } + +; PR8675 +; rdar://5134905 +define zeroext i1 @test16(i32 %x) nounwind { +entry: +; CHECK: @test16 +; CHECK: switch i32 %x, label %lor.rhs [ +; CHECK: i32 1, label %lor.end +; CHECK: i32 2, label %lor.end +; CHECK: i32 3, label %lor.end +; CHECK: ] + %cmp.i = icmp eq i32 %x, 1 + br i1 %cmp.i, label %lor.end, label %lor.lhs.false + +lor.lhs.false: + %cmp.i2 = icmp eq i32 %x, 2 + br i1 %cmp.i2, label %lor.end, label %lor.rhs + +lor.rhs: + %cmp.i1 = icmp eq i32 %x, 3 + br label %lor.end + +lor.end: + %0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp.i1, %lor.rhs ] + ret i1 %0 +} -- cgit v1.1