From 6073b30b053da2c2ac6150dd67cecb304bc614f1 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Wed, 11 Apr 2012 16:53:25 +0000 Subject: ARM 'vzip.32 Dd, Dm' is a pseudo-instruction. While there is an encoding for it in VZIP, the result of that is undefined, so we should avoid it. Define the instruction as a pseudo for VTRN.32 instead, as the ARM ARM indicates. rdar://11221911 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154505 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/MC/ARM/neon-shuffle-encoding.s | 2 ++ 1 file changed, 2 insertions(+) (limited to 'test') diff --git a/test/MC/ARM/neon-shuffle-encoding.s b/test/MC/ARM/neon-shuffle-encoding.s index 26734c1..e4d6077 100644 --- a/test/MC/ARM/neon-shuffle-encoding.s +++ b/test/MC/ARM/neon-shuffle-encoding.s @@ -59,6 +59,7 @@ vzip.8 q9, q8 vzip.16 q9, q8 vzip.32 q9, q8 + vzip.32 d2, d3 @ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xf3] @ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xf3] @@ -70,6 +71,7 @@ @ CHECK: vzip.8 q9, q8 @ encoding: [0xe0,0x21,0xf2,0xf3] @ CHECK: vzip.16 q9, q8 @ encoding: [0xe0,0x21,0xf6,0xf3] @ CHECK: vzip.32 q9, q8 @ encoding: [0xe0,0x21,0xfa,0xf3] +@ CHECK: vtrn.32 d2, d3 @ encoding: [0x83,0x20,0xba,0xf3] @ VTRN alternate size suffices -- cgit v1.1