From 87689d3b7049ecfa41de24a310bac7365c2dbcde Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Thu, 22 Oct 2009 06:48:32 +0000 Subject: Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84843 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/ARM/ifcvt5.ll | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'test') diff --git a/test/CodeGen/ARM/ifcvt5.ll b/test/CodeGen/ARM/ifcvt5.ll index e9145ac..92bbe75 100644 --- a/test/CodeGen/ARM/ifcvt5.ll +++ b/test/CodeGen/ARM/ifcvt5.ll @@ -11,7 +11,8 @@ entry: define void @t1(i32 %a, i32 %b) { ; CHECK: t1: -; CHECK: ldmltfd sp!, {r7, pc} +; CHECK: movge +; CHECK: blge _foo entry: %tmp1 = icmp sgt i32 %a, 10 ; [#uses=1] br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock -- cgit v1.1