From 9e23336d0c99fc5cae04037ead6d8f2b677e8764 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 12 Mar 2008 22:19:41 +0000 Subject: Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0: Live Ins: %EAX %EDX %ECX %reg1031 = MOVPC32r 0 %reg1032 = ADD32ri %reg1031, , %EFLAGS %reg1028 = MOV32rr %EAX %reg1029 = MOV32rr %EDX %reg1030 = MOV32rr %ECX %reg1027 = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0] %reg1025 = MOV32rr %reg1029 %reg1026 = MOV32rr %reg1030 %reg1024 = MOV32rr %reg1028 The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled. With -schedule-livein-copies: entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0: Live Ins: %EAX %EDX %ECX %reg1031 = MOVPC32r 0 %reg1032 = ADD32ri %reg1031, , %EFLAGS %reg1024 = MOV32rr %EAX %reg1025 = MOV32rr %EDX %reg1026 = MOV32rr %ECX %reg1027 = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0] Much better! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll | 1 + 1 file changed, 1 insertion(+) (limited to 'test') diff --git a/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll b/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll index b858592..1098988 100644 --- a/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll +++ b/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll @@ -1,4 +1,5 @@ ; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -relocation-model=pic -disable-fp-elim +; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -relocation-model=pic -disable-fp-elim -schedule-livein-copies | not grep {Number of register spills} ; PR2134 declare fastcc i8* @w_addchar(i8*, i32*, i32*, i8 signext ) nounwind -- cgit v1.1