From fff1ff91915a613c0c23a5bbf7acb4694654d694 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Fri, 22 Nov 2013 17:37:28 +0000 Subject: Merging r195473: ------------------------------------------------------------------------ r195473 | rsandifo | 2013-11-22 17:28:28 +0000 (Fri, 22 Nov 2013) | 10 lines [SystemZ] Fix TMHH and TMHL usage for z10 with -O0 I've no idea why I decided to handle TMxx differently from all the other high/low logic operations, but it was a stupid thing to do. The high registers aren't available as separate 32-bit registers on z10, so subreg_h32 can't be used on a GR64 there. I've normally been testing with z196 and with -O3 and so hadn't noticed this until now. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195474 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/SystemZ/int-cmp-47.ll | 1 + 1 file changed, 1 insertion(+) (limited to 'test') diff --git a/test/CodeGen/SystemZ/int-cmp-47.ll b/test/CodeGen/SystemZ/int-cmp-47.ll index c770ccd..9ebcbfe 100644 --- a/test/CodeGen/SystemZ/int-cmp-47.ll +++ b/test/CodeGen/SystemZ/int-cmp-47.ll @@ -1,5 +1,6 @@ ; Test the use of TEST UNDER MASK for 64-bit operations. ; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s @g = global i32 0 -- cgit v1.1