From 65303d6bd777b76735ef179870678a1d14671c54 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Sat, 19 Nov 2005 07:05:57 +0000
Subject: Teach tblgen about instruction operands that have multiple
 MachineInstr operands, digging into them to find register values (used on
 X86).  Patch by Evan Cheng!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24424 91177308-0d34-0410-b5e6-96231b3b80d8
---
 utils/TableGen/CodeGenTarget.cpp | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

(limited to 'utils/TableGen/CodeGenTarget.cpp')

diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index e85170d..f0786e5 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -267,12 +267,14 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
     MVT::ValueType Ty;
     std::string PrintMethod = "printOperand";
     unsigned NumOps = 1;
+    DagInit *MIOpInfo;
     if (Rec->isSubClassOf("RegisterClass")) {
       Ty = getValueType(Rec->getValueAsDef("RegType"));
     } else if (Rec->isSubClassOf("Operand")) {
       Ty = getValueType(Rec->getValueAsDef("Type"));
       PrintMethod = Rec->getValueAsString("PrintMethod");
       NumOps = Rec->getValueAsInt("NumMIOperands");
+      MIOpInfo = Rec->getValueAsDag("MIOperandInfo");
     } else if (Rec->getName() == "variable_ops") {
       hasVariableNumberOfOperands = true;
       continue;
@@ -289,7 +291,8 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
         " has the same name as a previous operand!";
     
     OperandList.push_back(OperandInfo(Rec, Ty, DI->getArgName(i),
-                                      PrintMethod, MIOperandNo, NumOps));
+                                      PrintMethod, MIOperandNo, NumOps,
+                                      MIOpInfo));
     MIOperandNo += NumOps;
   }
 }
-- 
cgit v1.1