//===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // //===----------------------------------------------------------------------===// #include "XCoreTargetMachine.h" #include "XCoreTargetObjectFile.h" #include "XCore.h" #include "llvm/CodeGen/Passes.h" #include "llvm/IR/Module.h" #include "llvm/PassManager.h" #include "llvm/Support/TargetRegistry.h" using namespace llvm; /// XCoreTargetMachine ctor - Create an ILP32 architecture model /// XCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), TLOF(make_unique()), Subtarget(TT, CPU, FS, *this) { initAsmInfo(); } XCoreTargetMachine::~XCoreTargetMachine() {} namespace { /// XCore Code Generator Pass Configuration Options. class XCorePassConfig : public TargetPassConfig { public: XCorePassConfig(XCoreTargetMachine *TM, PassManagerBase &PM) : TargetPassConfig(TM, PM) {} XCoreTargetMachine &getXCoreTargetMachine() const { return getTM(); } void addIRPasses() override; bool addPreISel() override; bool addInstSelector() override; bool addPreEmitPass() override; }; } // namespace TargetPassConfig *XCoreTargetMachine::createPassConfig(PassManagerBase &PM) { return new XCorePassConfig(this, PM); } void XCorePassConfig::addIRPasses() { addPass(createAtomicExpandPass(&getXCoreTargetMachine())); TargetPassConfig::addIRPasses(); } bool XCorePassConfig::addPreISel() { addPass(createXCoreLowerThreadLocalPass()); return false; } bool XCorePassConfig::addInstSelector() { addPass(createXCoreISelDag(getXCoreTargetMachine(), getOptLevel())); return false; } bool XCorePassConfig::addPreEmitPass() { addPass(createXCoreFrameToArgsOffsetEliminationPass()); return false; } // Force static initialization. extern "C" void LLVMInitializeXCoreTarget() { RegisterTargetMachine X(TheXCoreTarget); } void XCoreTargetMachine::addAnalysisPasses(PassManagerBase &PM) { // Add first the target-independent BasicTTI pass, then our XCore pass. This // allows the XCore pass to delegate to the target independent layer when // appropriate. PM.add(createBasicTargetTransformInfoPass(this)); PM.add(createXCoreTargetTransformInfoPass(this)); }