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| author | Chris Forbes <chrisf@ijw.co.nz> | 2013-07-24 07:21:22 +1200 |
|---|---|---|
| committer | Chris Forbes <chrisf@ijw.co.nz> | 2013-07-27 06:34:29 +1200 |
| commit | 124f567f1d575eaea98a6ae1d0a4687b8fb5bba2 (patch) | |
| tree | 3aefea5238d53081d9b2fcfd834720177f7bb643 /src/glsl | |
| parent | 81a156d099b5c224d4a528b66a80e25626ed65bc (diff) | |
| download | external_mesa3d-124f567f1d575eaea98a6ae1d0a4687b8fb5bba2.zip external_mesa3d-124f567f1d575eaea98a6ae1d0a4687b8fb5bba2.tar.gz external_mesa3d-124f567f1d575eaea98a6ae1d0a4687b8fb5bba2.tar.bz2 | |
i965/vs: Fix flaky texture swizzling
If any component used the ZERO or ONE swizzle, its corresponding member
in the `swizzle` array would never be initialized. We *mostly* got away
with this, except when that memory happened to contain a value that
clobbered another channel when combined using BRW_SWIZZLE4().
NOTE: This is a candidate for stable branches.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/glsl')
0 files changed, 0 insertions, 0 deletions