Remove wrongly repeated words in comments

Clean up misrepetitions ('if if', 'the the' etc) found throughout the
comments. This has been done manually, after grepping
case-insensitively for duplicate if, is, the, then, do, for, an,
plus a few other typos corrected in fly-by

v2:
    * proper commit message and non-joke title;
    * replace two 'as is' followed by 'is' to 'as-is'.
v3:
    * 'a integer' => 'an integer' and similar (originally spotted by
      Jason Ekstrand, I fixed a few other similar ones while at it)

Signed-off-by: Giuseppe Bilotta <giuseppe.bilotta@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

5 files changed, 5 insertions, 5 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_device_info.h b/src/mesa/drivers/dri/i965/brw_device_info.h
index 4e7f313..0869063 100644
--- a/src/mesa/drivers/dri/i965/brw_device_info.h
+++ b/src/mesa/drivers/dri/i965/brw_device_info.h
@@ -73,7 +73,7 @@ struct brw_device_info
     * In general, you can find shader thread maximums by looking at the "Maximum
     * Number of Threads" field in the Intel PRM description of the 3DSTATE_VS,
     * 3DSTATE_GS, 3DSTATE_HS, 3DSTATE_DS, and 3DSTATE_PS commands. URB entry
-    * limits come from the "Number of URB Entries" field in the the
+    * limits come from the "Number of URB Entries" field in the
     * 3DSTATE_URB_VS command and friends.
     *
     * These fields are used to calculate the scratch space to allocate.  The
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 17673f8..51f1634 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1180,7 +1180,7 @@ fs_visitor::emit_general_interpolation(fs_reg *attr, const char *name,
 
          /* Data starts at suboffet 3 in 32-bit units (12 bytes), so it is not
           * 64-bit aligned and the current implementation fails to read the
-          * data properly. Instead, when there is is a double input varying,
+          * data properly. Instead, when there is a double input varying,
           * read it as vector of floats with twice the number of components.
           */
          if (attr->type == BRW_REGISTER_TYPE_DF) {
diff --git a/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c b/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c
index 86fcdd4..14a9a0f 100644
--- a/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c
+++ b/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c
@@ -113,7 +113,7 @@ get_mul_for_src(nir_alu_src *src, int num_components,
       break;
 
    case nir_op_fmul:
-      /* Only absorb a fmul into a ffma if the fmul is is only used in fadd
+      /* Only absorb a fmul into a ffma if the fmul is only used in fadd
        * operations.  This prevents us from being too aggressive with our
        * fusing which can actually lead to more instructions.
        */
diff --git a/src/mesa/drivers/dri/i965/brw_performance_monitor.c b/src/mesa/drivers/dri/i965/brw_performance_monitor.c
index a91c6e2..cb1ab4c 100644
--- a/src/mesa/drivers/dri/i965/brw_performance_monitor.c
+++ b/src/mesa/drivers/dri/i965/brw_performance_monitor.c
@@ -1016,7 +1016,7 @@ wrap_bookend_bo(struct brw_context *brw)
 }
 
 /* This is fairly arbitrary; the trade off is memory usage vs. extra overhead
- * from wrapping.  On Gen7, 32768 should be enough for for 128 snapshots before
+ * from wrapping.  On Gen7, 32768 should be enough for 128 snapshots before
  * wrapping (since each is 256 bytes).
  */
 #define BOOKEND_BO_SIZE_BYTES 32768
diff --git a/src/mesa/drivers/x11/xm_buffer.c b/src/mesa/drivers/x11/xm_buffer.c
index f6e1427..4d52169 100644
--- a/src/mesa/drivers/x11/xm_buffer.c
+++ b/src/mesa/drivers/x11/xm_buffer.c
@@ -451,7 +451,7 @@ xmesa_MapRenderbuffer(struct gl_context *ctx,
 
          assert(xrb->pixmap);
 
-         /* Install error handler for XGetImage() in case the the window
+         /* Install error handler for XGetImage() in case the window
           * isn't mapped.  If we fail we'll create a temporary XImage.
           */
          mesaXErrorFlag = 0;