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* nir/info: Add a few bits of info for fragment shadersJason Ekstrand2015-10-193-0/+29
* nir/info: Add compute shader local size to nir_shader_infoJason Ekstrand2015-10-192-0/+12
* nir/info: Move the GS info into a stage-specific info unionJason Ekstrand2015-10-192-8/+18
* mesa: Move gl_frag_depth_layout from mtypes.h to shader_enums.hJason Ekstrand2015-10-192-18/+17
* nir: Add a label to nir_shader_infoJason Ekstrand2015-10-193-0/+7
* i965/asm: Explicitly use a nir_instr for IR annotationsJason Ekstrand2015-10-194-19/+5
* scons: Build nir/glsl_types.cpp once.Jose Fonseca2015-10-198-29/+8
* svga: fix incorrect round-down arithmeticBrian Paul2015-10-191-1/+1
* glsl: fix segfault when indirect indexing a buffer variable which is an arraySamuel Iglesias Gonsalvez2015-10-191-1/+2
* st/va: Added support for NV12 to IYUV conversion in vlVaGetImageIndrajit Das2015-10-191-3/+5
* st/va: Used correct parameter to derive the value of the "h" variable in vlVa...Indrajit Das2015-10-191-1/+1
* glsl_to_tgsi: Use {Num}UniformBlocks instead of {Num}BufferInterfaceBlocksIago Toral Quiroga2015-10-191-2/+2
* st/mesa: Use {Num}UniformBlocks instead of {Num}BufferInterfaceBlocksIago Toral Quiroga2015-10-191-2/+2
* i965: Do not use NumBufferInterfaceBlocksIago Toral Quiroga2015-10-191-1/+1
* main: GL_ACTIVE_UNIFORM_BLOCK_MAX_NAME_LENGTH is about UBOS, not SSBOsIago Toral Quiroga2015-10-191-2/+2
* main: Use NumUniformBlocks to count UBOsIago Toral Quiroga2015-10-191-5/+1
* ilo: set VME for 3DSTATE_PSChia-I Wu2015-10-181-1/+6
* ilo: ignore prefer_linear_threshold when zeroChia-I Wu2015-10-182-3/+3
* ilo: remove some unused kernel paramsChia-I Wu2015-10-182-22/+0
* ilo: remove unused ilo_shader_get_type()Chia-I Wu2015-10-182-12/+0
* ilo: remove u_debug.h inclusion from ilo_core.hChia-I Wu2015-10-182-1/+2
* ilo: remove u_memory.h inclusion from ilo_core.hChia-I Wu2015-10-183-1/+3
* nvc0: do not bind input params at compute state init on FermiSamuel Pitoiset2015-10-181-8/+0
* i965/vs: Drop hack that created NIR for fixed function vertex programs.Kenneth Graunke2015-10-171-12/+0
* i965/nir: Switch on shader stage in nir_lower_outputs().Kenneth Graunke2015-10-171-5/+21
* radeonsi: don't use the AMDGPU intrinsic for CMPMarek Olšák2015-10-171-9/+22
* radeonsi: use LRP from gallivmMarek Olšák2015-10-171-2/+0
* radeonsi: don't emit AMDGPU intrinsics for integer abs, min, maxMarek Olšák2015-10-171-10/+50
* radeonsi: don't emit AMDGPU intrinsics for EX2, ROUND, TRUNCMarek Olšák2015-10-171-3/+3
* radeonsi: initialize output, temp, and address registers to "undef"Marek Olšák2015-10-171-4/+15
* gallivm: implement the correct version of LRPMarek Olšák2015-10-171-6/+13
* gallivm: set correct opcode info from unary/binary/ternary emitsMarek Olšák2015-10-171-3/+6
* radeonsi: implement vertex color clampingMarek Olšák2015-10-175-4/+52
* radeonsi: implement fragment color clampingMarek Olšák2015-10-176-2/+18
* radeonsi: clean up other scratch buffer functionsMarek Olšák2015-10-171-15/+8
* radeonsi: clean up copy-pasted scratch buffer updatesMarek Olšák2015-10-171-26/+13
* radeonsi: unify shader create functionsMarek Olšák2015-10-171-40/+9
* radeonsi: unify shader delete functionsMarek Olšák2015-10-171-67/+17
* radeonsi: fix a GS copy shader leakMarek Olšák2015-10-171-1/+3
* radeonsi: remove an unused ctx parameter in si_shader_destroyMarek Olšák2015-10-174-6/+6
* radeonsi: print export_prim_id from the shader keyMarek Olšák2015-10-171-0/+2
* radeonsi: disable NaNs for LS and HSMarek Olšák2015-10-171-2/+4
* radeonsi: clean up si_llvm_init_export_argsMarek Olšák2015-10-171-42/+35
* tgsi: move pipe_shader_from_tgsi_processor function to utilMarek Olšák2015-10-172-24/+24
* mesa: remove FLUSH_VERTICES() in _mesa_MatrixMode()Brian Paul2015-10-171-1/+0
* st/mesa: fix clip state dependenciesMarek Olšák2015-10-171-1/+4
* gallium/hud: fix possible NULL pointer dereferenceMarek Olšák2015-10-171-0/+3
* scons: fix MSVC, MinGW buildBrian Paul2015-10-174-2/+21
* build: fix make-check after a6a6a71Rob Clark2015-10-171-0/+5
* build: fix out-of-tree build after b9b40efRob Clark2015-10-171-0/+1
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