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* r300g/compiler: Add missing license headersTom Stellard2013-02-2113-1/+339
| | | | | | | | | | These are all files that I authored, but forgot to add the license headers. NOTE: This is a candidate for the stable branches. Signed-off-by: Tom Stellard <thomas.stellard@amd.com> Reviewed-by: Marek Olšák <maraeo@gmail.com>
* i965: Avoid segfault in gen6_upload_stateCarl Worth2013-02-211-1/+1
| | | | | | | | | | | | | | | This fixes a bug introduced in commit 258453716f001eab1288d99765213 and triggered whenever "rb" is NULL. Fixes at least one cause bug #59445: [SNB/IVB/HSW Bisected]Oglc draw-buffers2(advanced.blending.none) segfault https://bugs.freedesktop.org/show_bug.cgi?id=59445 (Though segfaults are still possible in that test case, but they have been present since before commit 258453716f which is what's being fixed here.) Reviewed-by: Eric Anholt <eric@anholt.net>
* r600g: don't enable ReZ mode on evergreenAlex Deucher2013-02-211-1/+4
| | | | | | | | | | | | | | | Can cause lockups in certain cases when zfunc/zenable/zwrite change without a flush in between. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=60969 and lockups on Civ4 with wine. This is a candidate for the 9.1 branch. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Marek Olšák <maraeo@gmail.com>
* docs: import release notes for 9.0.3, add news itemAndreas Boll2013-02-213-0/+256
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* radeonsi: Don't match TGSI_SEMANTIC_POSITION fs inputs to vs outputsMichel Dänzer2013-02-211-2/+5
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* radeonsi: Fix w component of TGSI_SEMANTIC_POSITION fragment shader inputs.Michel Dänzer2013-02-211-0/+8
| | | | | | | | It's the reciprocal of the register value. Fixes piglit fragcoord_w and glsl-fs-fragcoord-zw-perspective. NOTE: This is a candidate for the 9.1 branch.
* radeonsi: Fix up and enable flat shading.Michel Dänzer2013-02-214-22/+5
| | | | | | | | | | | Requires corresponding LLVM R600 backend fix to work correctly, but even without that it doesn't hang anymore. 13 more little piglits. Depends on LLVM: r175193, r175733 NOTE: This is a candidate for the 9.1 branch.
* radeonsi: Fix memory leak in si_shader_select.Vinson Lee2013-02-201-0/+1
| | | | | | | Fixes resource leak defect reported by Coverity. Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* i965: Consign COORD_REPLACE VS hacks to Pre-Gen6.Paul Berry2013-02-203-11/+34
| | | | | | | | | | | | | | | | | | | | | | | | | Pre-Gen6, the SF thread requires exact matching between VS output slots (aka VUE slots) and FS input slots, even when the corresponding VS output slot is unused due to being overwritten by point coordinate replacement (glTexEnvi(GL_POINT_SPRITE, GL_COORD_REPLACE, GL_TRUE)). As a result, we have a special hack in the VS to ensure when any texture coordinate is subject to point coordinate replacement, it is always allocated space in the VUE, even if it isn't written to by the VS. This hack isn't needed from Gen6 onwards, since SF (Gen7: SBE) swizzling has the ability to insert the point coordinate into gl_TexCoord[] without needing a corresponding unused VUE slot. Note that no modification of SF setup code is required for this patch--get_attr_override() already does the right thing. However, we make a slight comment change to clarify why this works. In addition to eliminating unnecessary VS recompiles and saving precious URB space on Gen6+, this will save us the trouble of having to adjust this hack when we implement geometry shaders. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* mesa: Don't install glEvalMesh in the beginend dispatch tableIan Romanick2013-02-203-9/+16
| | | | | | | | NOTE: This is a candidate for the 9.1 branch. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59740 Reviewed-by: Eric Anholt <eric@anholt.net>
* gallivm: fix indirect src register fetches requiring bitcastRoland Scheidegger2013-02-201-21/+16
| | | | | | | | | | | For constant and temporary register fetches, the bitcasts weren't done correctly for the indirect case, leading to crashes due to type mismatches. Simply do the bitcasts after fetching (much simpler than fixing up the load pointer for the various cases). This fixes https://bugs.freedesktop.org/show_bug.cgi?id=61036 Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* llvmpipe: lp_resource_copy cleanupRoland Scheidegger2013-02-205-49/+47
| | | | | | | | We don't need to flush resources for each layer, and since we don't actually care about layer at all in the flush function just drop the parameter. Also we can use util_copy_box instead of repeated util_copy_rect. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* llvmpipe: fix lp_resource_copy using more than one 3d sliceRoland Scheidegger2013-02-201-84/+86
| | | | | | | | | | | | These used to be illegal a very long time ago, then for some more time nothing really emitted these so this code path wasn't hit. Just trivially iterate over box->depth. (Might be worth refactoring at some point since nowadays all the code doesn't really do much except for depth textures.) This fixes https://bugs.freedesktop.org/show_bug.cgi?id=61093 Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* gles2: a stub implementation for GL_EXT_discard_framebufferTapani Pälli2013-02-207-1/+77
| | | | | | | | | | | This patch implements a stub for GL_EXT_discard_framebuffer with required checks listed by the extension specification. This extension is required by GLBenchmark 2.5 when compiled with OpenGL ES 2.0 as the rendering backend. Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-and-tested-by: Chad Versace <chad.versace@linux.intel.com>
* r600g/Cayman: Fix blending using destination alpha factor but non-alpha destMichel Dänzer2013-02-201-4/+9
| | | | | | | | Only compile tested, but should fix at least some piglit fbo-blending tests. NOTE: This is a candidate for the stable branches. Reviewed-by: Marek Olšák <maraeo@gmail.com>
* radeonsi: Fix blending using destination alpha factor but non-alpha destinationMichel Dänzer2013-02-201-3/+5
| | | | | | | | 11 more little piglits. NOTE: This is a candidate for the 9.1 branch. Reviewed-by: Marek Olšák <maraeo@gmail.com>
* radeonsi: implement 3D transfersMarek Olšák2013-02-201-20/+29
| | | | | | | | | | | | | That means we can map and read multiple slices with one transfer_map call. [ Cherry-picked from r600g commit 1aebb6911e9aa1bd8900868b58d1750ca83a20c7 ] 11 more little piglits on master, 1 more on the 9.1 branch (Marek's glTex(Sub)Image improvements on master broke the other 10). NOTE: This is a candidate for the 9.1 branch. Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* radeonsi: add assertions to prevent creation of invalid surfacesMarek Olšák2013-02-203-15/+18
| | | | | | | | [ Cherry-picked from r600g commit ef11ed61a0414d0405c3faf7f48fa3f1d083f82e ] NOTE: This is a candidate for the 9.1 branch. Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* radeonsi: use u_box_origin_2d helper functionMarek Olšák2013-02-201-5/+2
| | | | | | | | [ Cherry-picked from r600g commit b278aba42310e8fa30f2408b9dcd58dbb4901724 ] NOTE: This is a candidate for the 9.1 branch. Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* configure.ac: Do not check for clock_gettime on MinGW.Vinson Lee2013-02-191-1/+1
| | | | | | | MinGW does not have clock_gettime. Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Matt Turner <mattst88@gmail.com>
* DRI2: Don't disable GLX_INTEL_swap_event unconditionallyZack Rusin2013-02-191-3/+12
| | | | | | | | | | | | | | | | | | | | GLX_INTEL_swap_event is broken on the server side, where it's currently unconditionally enabled. This completely breaks systems running on drivers which don't support that extension. There's no way to test for its presence on this side, so instead of disabling it uncondtionally, just disable it for drivers which are known to not support it. It makes sense because most drivers do support it right now. We'll be able to remove this once Xserver properly advertises GLX_INTEL_swap_event. Note: This is a candidate for stable branch branches. Signed-off-by: Zack Rusin <zackr@vmware.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60052 Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Brian Paul <brianp@vmware.com> Tested-by: Ian Romanick <ian.d.romanick@intel.com>
* i965/fs: Enable CSE on uniform pull constant loads.Eric Anholt2013-02-191-0/+3
| | | | | | | | Improves on a major performance regression for the dolphin wii emulator from its move to using UBOs. Performance in the UBO codepath (as replayed through apitrace) is up 21.1% +/- 2.3% (n=26/29). Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965/fs: Only do CSE when the dst types match.Eric Anholt2013-02-191-1/+2
| | | | | | | | | | We could potentially do some CSE even when the dst types aren't the same on gen6 where there is no implicit dst type conversion iirc, or in the case of uniform pull constant loads where the dst type doesn't impact what's stored. But it's not worth worrying about. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> NOTE: This is a candidate for the 9.1 branch.
* i965/fs: Delay setup of uniform loads until after pre-regalloc scheduling.Eric Anholt2013-02-193-27/+66
| | | | | | | | This should fix the register allocation explosion on the GLES 3.0 test on gen6. It also gives us an instruction that will fit our CSE handling. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> NOTE: This is a candidate for the 9.1 branch.
* i965/fs: Fix copy propagation with smearing.Eric Anholt2013-02-191-1/+2
| | | | | | | | | | We were correctly relaying the smear from MOV's src, but if the MOV didn't do a smear, we don't want to smash the smear value from the instruction being propagated into. Prevents a regression in the upcoming UBO change. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> NOTE: This is a candidate for the 9.1 branch.
* i965/fs: Add a bit more instruction dumping useful for upcoming work.Eric Anholt2013-02-191-1/+30
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* radeon/llvm: Fix build with LLVM 3.3Tom Stellard2013-02-192-1/+12
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* r600g: Add $(DEFINES) to AM_CXXFLAGSTom Stellard2013-02-191-1/+2
| | | | This way llvm_wrapper.cpp is compiled with -DHAVE_LLVM=0x....
* i965: Remove unused userclip flags.Paul Berry2013-02-193-5/+0
| | | | | | | | | | brw_vs_prog_data::userclip hasn't been used since commit f0cecd4 (i965: Move VUE map computation to once at VS compile time). brw_gs_prog_key::userclip_active hasn't been used since commit 9f3d321 (i965: Make the userclip flag for the VUE map come from VS prog data). Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* llvmpipe: fix handling of 0 x 0 framebuffer sizeBrian Paul2013-02-191-2/+2
| | | | | | | Bump up the size to 1 x 1. This fixes a number of potential failure points in the code. See also http://bugs.freedesktop.org/show_bug.cgi?id=61012
* st/xlib: initialize the drawable size in create_xmesa_buffer()Brian Paul2013-02-191-2/+1
| | | | | | | | | Otherwise, the PBuffer's size was never set. This also initializes the buffer size for windows, pixmaps, etc. Fixes http://bugs.freedesktop.org/show_bug.cgi?id=61012 Note: This is a candidate for the stable branches.
* glx: fix glGetTexLevelParameteriv for indirect renderingStefan Brüns2013-02-191-1/+3
| | | | | | | | | | | | | | | | A single element in a GLX reply is contained in the header itself. The number of elements is denoted in the "n" field of the reply. If "n" is 1, the length of additional data is 0. The XXX_data_length() function of xcb does not return the length of the (optional, n>1) data but the number of elements. Fixes http://bugs.freedesktop.org/show_bug.cgi?id=59876 Note: This is a candidate for the stable branches. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Signed-off-by: Brian Paul <brianp@vmware.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* st/mesa: implement glBitmap unpacking from a PBO, for the cache pathBrian Paul2013-02-191-2/+11
| | | | | | | | | We weren't mapping the PBO when using the bitmap cache (but we had the PBO code for the non-cache path.) Fixes http://bugs.freedesktop.org/show_bug.cgi?id=61026 Note: This is a candidate for the stable branches.
* draw: fix non-perspective interpolation in interp()Brian Paul2013-02-191-3/+8
| | | | | | | | | | | This fixes a regression from ab74fee5e1a3fc3323b7238278637b232c2d0d95. When we use the clip coordinate to compute the screen-space interpolation factor, we need to first apply the divide-by-W step to the clip coordinate. Fixes http://bugs.freedesktop.org/show_bug.cgi?id=60938 Note: This is a candidate for the 9.1 branch.
* st/mesa: remove what is left from u_blitMarek Olšák2013-02-186-29/+0
| | | | Reviewed-by: Brian Paul <brianp@vmware.com>
* st/mesa: simplify and improve CopyTexSubImageMarek Olšák2013-02-183-260/+99
| | | | | | | | | | | | | | | | | | | | It has become a bit messy. Changes: - finally correct checking for transfer ops depending on the base format - making sure the base internal format and the texture format match (we were ignoring it, but it's important for correctness) - the way-too-strict rule that both src and dst base formats must be the same was dropped; ensuring the simpler and more permissive rule mentioned above is enough - stop using util_blit_pixels; pipe->blit is flexible enough, and now that we have RGBX and red-alpha formats, pipe->blit can be used for more cases Reviewed-by: Brian Paul <brianp@vmware.com>
* st/mesa: don't do sRGB conversion in CopyTexSubImageMarek Olšák2013-02-181-2/+2
| | | | | | | | Assuming I understand EXT_texture_sRGB correctly. NOTE: This is a candidate for the stable branches. Reviewed-by: Brian Paul <brianp@vmware.com>
* st/mesa: implement blit-based TexImage and TexSubImageMarek Olšák2013-02-183-4/+239
| | | | | | | | | | | | | | | | | | | A temporary texture is created such that it matches the format and type combination and pixels are copied to it using memcpy. Then the blit is used to copy the temporary texture to the texture image being modified by TexImage or TexSubImage. The blit takes care of the format and type conversion and swizzling. The result is a very fast texture upload involving as little CPU as possible. This improves performance in apps which upload textures during rendering. An example is the Wine OpenGL backend for DirectDraw, which I used to test the game StarCraft. Profiling had shown that TexSubImage was taking 50% of CPU time without this patch, which was the main motivation for this work, and now TexSubImage only takes 14% of CPU time. I had to underclock my CPU to see any difference in the game and this patch does make the game a lot faster if the CPU is slow (or using the powersave cpufreq profile). Reviewed-by: Brian Paul <brianp@vmware.com>
* st/mesa: fix blit-based GetTexImage for 1D array texturesMarek Olšák2013-02-181-19/+52
| | | | | | | | | | | | | This is not easy to hit, because we have 3 code paths now (tried in this order): - memcpy-based (skips the blit) -> _mesa_tex_getimage - blit-based - slow pixel packing -> _mesa_tex_getimage The main difference later in the code is the parameters of _mesa_image_address3d. Reviewed-by: Brian Paul <brianp@vmware.com>
* st/mesa: fix blit-based GetTexImage for depth/stencil formatsMarek Olšák2013-02-181-1/+1
| | | | | | BTW, we have 0 tests for glGetTexImage(format=GL_DEPTH*). Reviewed-by: Brian Paul <brianp@vmware.com>
* st/mesa: factor out code for determining blit.mask from CopyTexSubImageMarek Olšák2013-02-181-42/+66
| | | | | | I'll need this later. Reviewed-by: Brian Paul <brianp@vmware.com>
* radeonsi: Fix PIPE_FORMAT_X32_S8X24_UINT sampler hardware formatMichel Dänzer2013-02-181-1/+1
| | | | | | 4 more little piglits. NOTE: This is a candidate for the 9.1 branch.
* radeonsi: Use stencil surface level information for stencil texturingMichel Dänzer2013-02-182-7/+10
| | | | | | 7 more little dwarves^W piglits. NOTE: This is a candidate for the 9.1 branch.
* radeonsi: properly implement S8Z24 depth-stencil formatMichel Dänzer2013-02-181-29/+66
| | | | | | | | Based on r600g commit 2b9659c9e627ad03160899b8be04f96307d098eb . Fixes crashes with 4 piglit tests which are now hitting these formats. NOTE: This is a candidate for the 9.1 branch.
* r600g/llvm: Support for TBOVincent Lejeune2013-02-181-0/+28
| | | | Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
* r600g/llvm: Set Inputs/Outputs count to 32 (api reported value)Vincent Lejeune2013-02-181-2/+2
| | | | Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
* r600g/llvm: Fix alpha_to_one piglit testsVincent Lejeune2013-02-183-0/+4
| | | | Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
* r600g/llvm: Add support for UBOVincent Lejeune2013-02-182-1/+22
| | | | | | NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
* i965: Fix leak in blorp CopyTexSubImage2DChristopher James Halse Rogers2013-02-161-2/+2
| | | | | | | | | | | | | | | _mesa_delete_renderbuffer does not call the driver-specific renderbuffer delete function, so the blorp code was leaking the Intel-specific bits, including some GEM objects. Call the renderbuffer's ->Delete() method instead, which does the right thing. Fixes Unity rapidly sending the machine into the arms of the OOM-killer Note: This is a candidate for the 9.1 branch. Reviewed-by: Eric Anholt <eric@anholt.net>
* gallivm/tgsi: fix issues with sample opcodesRoland Scheidegger2013-02-167-95/+247
| | | | | | | | We need to encode them as Texture instructions since the NumOffsets field is encoded there. However, we don't encode the actual target in there, this is derived from the sampler view src later. Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
generated by cgit v1.1 at 2025-03-23 21:58:00 +0000