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path: root/src/compiler/glsl/lower_instructions.cpp
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* glsl: Don't emit ir_binop_carry during ir_binop_imul_high loweringIan Romanick2016-10-041-5/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | st_glsl_to_tgsi only calls lower_instructions once (instead of in a loop), so the ir_binop_carry generated would not get lowered. Fixes assertion failure state_tracker/st_glsl_to_tgsi.cpp:2265: void glsl_to_tgsi_visitor::visit_expression(ir_expression*, st_src_reg*): Assertion `!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()"' failed. on softpipe in 16 piglit tests: mesa_shader_integer_functions/execution/built-in-functions/fs-imulExtended-nonuniform.shader_test mesa_shader_integer_functions/execution/built-in-functions/fs-imulExtended-only-msb-nonuniform.shader_test mesa_shader_integer_functions/execution/built-in-functions/fs-imulExtended-only-msb.shader_test mesa_shader_integer_functions/execution/built-in-functions/fs-imulExtended.shader_test mesa_shader_integer_functions/execution/built-in-functions/fs-umulExtended-nonuniform.shader_test mesa_shader_integer_functions/execution/built-in-functions/fs-umulExtended-only-msb-nonuniform.shader_test mesa_shader_integer_functions/execution/built-in-functions/fs-umulExtended-only-msb.shader_test mesa_shader_integer_functions/execution/built-in-functions/fs-umulExtended.shader_test mesa_shader_integer_functions/execution/built-in-functions/vs-imulExtended-nonuniform.shader_test mesa_shader_integer_functions/execution/built-in-functions/vs-imulExtended-only-msb-nonuniform.shader_test mesa_shader_integer_functions/execution/built-in-functions/vs-imulExtended-only-msb.shader_test mesa_shader_integer_functions/execution/built-in-functions/vs-imulExtended.shader_test mesa_shader_integer_functions/execution/built-in-functions/vs-umulExtended-nonuniform.shader_test mesa_shader_integer_functions/execution/built-in-functions/vs-umulExtended-only-msb-nonuniform.shader_test mesa_shader_integer_functions/execution/built-in-functions/vs-umulExtended-only-msb.shader_test mesa_shader_integer_functions/execution/built-in-functions/vs-umulExtended.shader_test Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* glsl: Add lowering pass for ir_bin_imul_highIan Romanick2016-07-191-0/+149
| | | | | | | | | | This isn't the lowering pass you want. Most GPUs that can support GLSL 1.30 have a multiply unit that can do something more interesting than 32x32->32. Many have 32x16->48. Any GPU that does, should do the lowering in the backend. This is just the thing that will always work. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
* glsl: Add lowering pass for ir_unop_find_msbIan Romanick2016-07-191-0/+106
| | | | | Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
* glsl: Add lowering pass for ir_unop_find_lsbIan Romanick2016-07-191-0/+86
| | | | | Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
* glsl: Add lowering pass for ir_unop_bitfield_reverseIan Romanick2016-07-191-0/+91
| | | | | Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
* glsl: Add lowering pass for ir_quadop_bitfield_insertIan Romanick2016-07-191-0/+73
| | | | | Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
* glsl: Add lowering pass for ir_triop_bitfield_extractIan Romanick2016-07-191-0/+80
| | | | | Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
* glsl: Add lowering pass for ir_unop_bit_countIan Romanick2016-07-191-0/+53
| | | | | Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
* glsl: Properly handle ldexp(0.0f, non-zero-exp).Matt Turner2016-04-181-4/+6
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* glsl: move to compiler/Emil Velikov2016-01-261-0/+1061
Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Matt Turner <mattst88@gmail.com> Acked-by: Jose Fonseca <jfonseca@vmware.com>