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* ttn: fix warning after 7bf76563eRob Clark2016-09-161-0/+2
| | | | Signed-off-by: Rob Clark <robdclark@gmail.com>
* gallium/ttn: Remove duplicated TGSI_OPCODE_DP2A initializationRhys Kidd2016-08-241-1/+0
| | | | | | | | | Duplicate line is currently on 1535. Identified by Clang, when run through Eric Anholt's Travis harness. Signed-off-by: Rhys Kidd <rhyskidd@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* ttn: Use nir_load_front_face instead of the TGSI-style input.Eric Anholt2016-08-191-3/+27
| | | | | | | This reduces the diff between GLSL-to-NIR and TGSI-to-NIR, and gives NIR more optimization to work on. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* ttn: Make FRAG_RESULT_DEPTH be a float variable to match gtn and ptn.Eric Anholt2016-08-191-3/+16
| | | | | | | This lets TTN-using drivers handle FRAG_RESULT_DEPTH the same between all their source paths. Reviewed-by: Rob Clark <robdclark@gmail.com>
* ttn: Update shader->info as we generate code.Eric Anholt2016-07-261-0/+13
| | | | | | | We could use the nir_shader_gather_info() pass to update it after the fact, but this is what glsl_to_nir and prog_to_nir do. Reviewed-by: Rob Clark <robclark@freedesktop.org>
* compiler: Rename INTERP_QUALIFIER_* to INTERP_MODE_*.Kenneth Graunke2016-07-171-3/+3
| | | | | | | | | | | | | | | | | Likewise, rename the enum type to glsl_interp_mode. Beyond the GLSL front-end, talking about "interpolation modes" seems more natural than "interpolation qualifiers" - in the IR, we're removed from how exactly the source language specifies how to interpolate an input. Also, SPIR-V calls these "decorations" rather than "qualifiers". Generated by: $ find . -regextype egrep -regex '.*\.(c|cpp|h)' -type f -exec sed -i \ -e 's/INTERP_QUALIFIER_/INTERP_MODE_/g' \ -e 's/glsl_interp_qualifier/glsl_interp_mode/g' {} \; Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Dave Airlie <airlied@redhat.com>
* gallium: use PIPE_SHADER_* everywhere, remove TGSI_PROCESSOR_*Marek Olšák2016-04-221-8/+8
| | | | Acked-by: Jose Fonseca <jfonseca@vmware.com>
* nir: add bit_size info to nir_load_const_instr_create()Samuel Iglesias Gonsálvez2016-04-111-1/+1
| | | | Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* ttn: remove stray global from headerRob Clark2016-03-241-2/+0
| | | | Signed-off-by: Rob Clark <robclark@freedesktop.org>
* nir: add a bit_size parameter to nir_ssa_dest_initConnor Abbott2016-03-171-7/+7
| | | | | | | | | | | | | | | | | | | | | | v2: Squash multiple commits addressing the new parameter in different files so we don't break the build (Iago) v3: Fix tgsi (Samuel) v4: Fix nir_clone.c (Samuel) v5: Fix vc4 and freedreno (Iago) v6 (Sam) - Fix build errors in nir_lower_indirect_derefs - Use helper to get type size from nir_alu_type. Signed-off-by: Iago Toral Quiroga <itoral@igalia.com> Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com> Tested-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
* nir: rename nir_const_value fields to include bitsize informationIago Toral Quiroga2016-03-171-1/+1
| | | | | Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
* nir: Separate texture from sampler in nir_tex_instrJason Ekstrand2016-02-091-0/+1
| | | | | | | | | | | | | This commit adds the capability to NIR to support separate textures and samplers. As it currently stands, glsl_to_nir only sets the texture deref and leaves the sampler deref alone as it did before and nir_lower_samplers assumes this. Backends can still assume that they are combined and only look at only at the texture index. Or, if they wish, they can assume that they are separate because nir_lower_samplers, tgsi_to_nir, and prog_to_nir all set both texture and sampler index whenever a sampler is required (the two indices are the same in this case). Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* nir/tex_instr: Rename sampler to textureJason Ekstrand2016-02-091-4/+4
| | | | | | | | | We're about to separate the two concepts. When we do, the sampler will become optional. Doing a rename first makes the separation a bit more safe because drivers that depend on GLSL or TGSI behaviour will be fine to just use the texture index all the time. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* ttn: use const_index helpersRob Clark2016-02-091-5/+5
| | | | | Signed-off-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* ttn: small logic cleanupRob Clark2016-02-091-1/+1
| | | | | | | The only case where dim!=NULL is where op==load_ubo. But using op==load_ubo is less confusing. Signed-off-by: Rob Clark <robclark@freedesktop.org>
* glsl: move to compiler/Emil Velikov2016-01-261-1/+1
| | | | | | Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Matt Turner <mattst88@gmail.com> Acked-by: Jose Fonseca <jfonseca@vmware.com>
* nir: move to compiler/Emil Velikov2016-01-262-5/+5
| | | | | | Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Matt Turner <mattst88@gmail.com> Acked-by: Jose Fonseca <jfonseca@vmware.com>
* nir: move shader_enums.[ch] to compilerEmil Velikov2016-01-261-1/+1
| | | | | | | | | This way one can reuse it in glsl, nir or other infrastructure without pulling nir as dependency. Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Matt Turner <mattst88@gmail.com> Acked-by: Jose Fonseca <jfonseca@vmware.com>
* ttn: use writemask for store_varRob Clark2016-01-161-26/+2
| | | | | | | Only user is freedreno, and after array-rework it can cope. Avoids generating loads for a store. Signed-off-by: Rob Clark <robclark@freedesktop.org>
* ttn: add missing writemask on store_outputRob Clark2016-01-161-0/+1
| | | | | Signed-off-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* gallium: Remove unnecessary semicolonsEdward O'Callaghan2016-01-061-1/+1
| | | | | | | | | Fix silly issue with MSVC case fall-though support to need a extra 'break;' Found-by: Coccinelle Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Brian Paul <brianp@vmware.com>
* nir/builder: Add an init function that creates a simple shader for youJason Ekstrand2015-12-291-8/+4
| | | | | | | | | | | A hugely common case when using nir_builder is to have a shader with a single function called main. This adds a helper that gives you just that. This commit also makes us use it in the NIR control-flow unit tests as well as tgsi_to_nir and prog_to_nir. Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org>
* nir: Get rid of function overloadsJason Ekstrand2015-12-281-2/+1
| | | | | | | | | | | | | | | | | When Connor originally drafted NIR, he copied the same function+overload system that GLSL IR had with a few names changed. However, this double-indirection is not really needed and has only served to confuse people. Instead, let's just have functions which may not have unique names and may or may not have an implementation. If someone wants to do overload resolving, they can hav a hash table based function+overload system in the overload resolving pass. There's no good reason to keep it in core NIR. Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org> ir3 bits are Reviewed-by: Rob Clark <robclark@gmail.com>
* gallium/auxiliary: don't build NIR sources with MSVC2008 flagsConnor Abbott2015-12-231-4/+0
| | | | | | | | | | | | | NIR has never been built with MSVC2008, so we shouldn't add MSVC2008_COMPAT_CFLAGS to anything that uses it. This allows us to get rid of the pragma in tgsi_to_nir.c. Build tested with freedreno. v2: Use MSVC2013_COMPAT_CLFAGS instead. Reviewed-by: Jose Fonseca <jfonseca@vmware.com> Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
* nir: Add a writemask to store intrinsics.Kenneth Graunke2015-12-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tessellation control shaders need to be careful when writing outputs. Because multiple threads can concurrently write the same output variables, we need to only write the exact components we were told. Traditionally, for sub-vector writes, we've read the whole vector, updated the temporary, and written the whole vector back. This breaks down with concurrent access. This patch prepares the way for a solution by adding a writemask field to store_var intrinsics, as well as the other store intrinsics. It then updates all produces to emit a writemask of "all channels enabled". It updates nir_lower_io to copy the writemask to output store intrinsics. Finally, it updates nir_lower_vars_to_ssa to handle partial writemasks by doing a read-modify-write cycle (which is safe, because local variables are specific to a single thread). This should have no functional change, since no one actually emits partial writemasks yet. v2: Make nir_validate momentarily assert that writemasks cover the complete value - we shouldn't have partial writemasks yet (requested by Jason Ekstrand). v3: Fix accidental SSBO change that arose from merge conflicts. v4: Don't try to handle writemasks in ir3_compiler_nir - my code for indirects was likely wrong, and TTN doesn't generate partial writemasks today anyway. Change them to asserts as requested by Rob Clark. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> [v3]
* nir: Delete bany, ball, fany, fall.Matt Turner2015-12-181-1/+3
| | | | | | | | | | | As in the previous patches, these can be implemented as any(v) -> any_nequal(v, false) all(v) -> all_equal(v, true) and their removal simplifies the code in the next patch. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* nir: Get rid of *_indirect variants of input/output load/store intrinsicsJason Ekstrand2015-12-101-24/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is some special-casing needed in a competent back-end. However, they can do their special-casing easily enough based on whether or not the offset is a constant. In the mean time, having the *_indirect variants adds special cases a number of places where they don't need to be and, in general, only complicates things. To complicate matters, NIR had no way to convdert an indirect load/store to a direct one in the case that the indirect was a constant so we would still not really get what the back-ends wanted. The best solution seems to be to get rid of the *_indirect variants entirely. This commit is a bunch of different changes squashed together: - nir: Get rid of *_indirect variants of input/output load/store intrinsics - nir/glsl: Stop handling UBO/SSBO load/stores differently depending on indirect - nir/lower_io: Get rid of load/store_foo_indirect - i965/fs: Get rid of load/store_foo_indirect - i965/vec4: Get rid of load/store_foo_indirect - tgsi_to_nir: Get rid of load/store_foo_indirect - ir3/nir: Use the new unified io intrinsics - vc4: Do all uniform loads with byte offsets - vc4/nir: Use the new unified io intrinsics - vc4: Fix load_user_clip_plane crash - vc4: add missing src for store outputs - vc4: Fix state uniforms - nir/lower_clip: Update to the new load/store intrinsics - nir/lower_two_sided_color: Update to the new load intrinsic NIR and i965 changes are Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> NIR indirect declarations and vc4 changes are Reviewed-by: Eric Anholt <eric@anholt.net> ir3 changes are Reviewed-by: Rob Clark <robdclark@gmail.com> NIR changes are Acked-by: Rob Clark <robdclark@gmail.com>
* ttn: Whitelist from -Werror=declaration-after-statement.Jose Fonseca2015-12-031-0/+4
| | | | | | | | | nir is the exception among gallium/auxiliary -- we don't need to compile it with MSVC2008 yet. And this enables us to use -Werror=declaration-after-statement in the next commit as we should, without complicated fixes to tgsi_to_nir module. Trvial. Tested with GCC and Clang.
* ttn: fix UMSB conversionIlia Mirkin2015-11-231-1/+1
| | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* ttn: add LODQ supportIlia Mirkin2015-11-231-2/+9
| | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nir: s/nir_type_unsigned/nir_type_uintJason Ekstrand2015-11-231-1/+1
| | | | | | | | | | | v2: do the same in tgsi_to_nir (Samuel) v3: added missing cases after rebase (Iago) v4: Add a blank space after '#' in one of the comments (Matt) Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
* ttn: add TEX2 supportIlia Mirkin2015-11-201-3/+11
| | | | | | | | | This fixes CubeArrayShadow tests (where the shadow comes in via a second arg to the TEX2 instruction). Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Rob Clark <robdclark@gmail.com> Cc: mesa-stable@lists.freedesktop.org
* glsl: move shader_enums into nirRob Clark2015-10-091-1/+1
| | | | | | | | | | | | | | | | | | | | First step towards inverting the dependency between glsl and nir (so nir can be used without glsl). Also solves this issue with 'make distclean' Making distclean in mesa make[2]: Entering directory '/mnt/sdb1/Src64/Mesa-git/mesa/src/mesa' Makefile:2486: ../glsl/.deps/shader_enums.Plo: No such file or directory make[2]: *** No rule to make target '../glsl/.deps/shader_enums.Plo'. Stop. make[2]: Leaving directory '/mnt/sdb1/Src64/Mesa-git/mesa/src/mesa' Makefile:684: recipe for target 'distclean-recursive' failed make[1]: *** [distclean-recursive] Error 1 make[1]: Leaving directory '/mnt/sdb1/Src64/Mesa-git/mesa/src' Makefile:615: recipe for target 'distclean-recursive' failed make: *** [distclean-recursive] Error 1 Reported-by: Andy Furniss <adf.lists@gmail.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Signed-off-by: Rob Clark <robclark@freedesktop.org>
* gallium/ttn: Convert to using VARYING_SLOT_* / FRAG_RESULT_*.Eric Anholt2015-09-162-14/+173
| | | | | | | | | | | | | | | This avoids exceeding the size of the .index bitfield since it got truncated, and should make our NIR look more like the NIR that the rest of the NIR developers are working on. v2: split out vc4 updates, first patch uses varying_slot_to_tgsi_semantic() helper, and second patch does the actual conversion. v3: add frag_result_to_tgsi_semantic() helper and don't try to map frag_results to semantic name/index as if they were varying_slot's v4: use VERT_ATTRIB_ for VS inputs v5: Fix vc4 build. Signed-off-by: Rob Clark <robclark@freedesktop.org>
* gallium/ttn: fix cursor handling vs builderRob Clark2015-09-091-8/+6
| | | | | | | | | | | After inserting instructions the cursor.option becomes _after_instr (even if it started life as an _after_block). So we cannot simply stash the current cursor on the if/loop_stack. Otherwise we end up inserting instructions after the endif/endloop in the block preceeding the if/ loop. Signed-off-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* nir: Convert the builder to use the new NIR cursor API.Kenneth Graunke2015-08-271-17/+17
| | | | | | | | | | | | | | | | | | The NIR cursor API is exactly what we want for the builder's insertion point. This simplifies the API, the implementation, and is actually more flexible as well. This required a bit of reworking of TGSI->NIR's if/loop stack handling; we now store cursors instead of cf_node_lists, for better or worse. v2: Actually move the cursor in the after_instr case. v3: Take advantage of nir_instr_insert (suggested by Connor). v4: vc4 build fixes (thanks to Eric). Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net> [v1] Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> [v4] Acked-by: Connor Abbott <cwabbott0@gmail.com> [v4]
* gallium/ttn: Use nir_builder_insert() rather than poking at cf_list.Kenneth Graunke2015-08-251-16/+16
| | | | | | | | | I intend to remove nir_builder::cf_node_list, so I can't have this code poking at it directly. The proper way is to set the insertion point and then simply insert things there. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
* nir: Store gl_shader_stage in nir_shader.Kenneth Graunke2015-08-251-4/+21
| | | | | | | | | | | | This makes it easy for NIR passes to inspect what kind of shader they're operating on. Thanks to Michel Dänzer for helping me figure out where TGSI stores the shader stage information. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* nir: move control flow modification to its own fileConnor Abbott2015-08-241-0/+1
| | | | | | | | | | | | | | | | We want to start reworking and expanding this code, but it'll be a lot easier to do once we disentangle it from the rest of the stuff in nir.c. Unfortunately, there are a few unavoidable dependencies in nir.c on methods we'd rather not expose publicly, since if not used in very specific situations they can cause Bad Things (tm) to happen. Namely, we need to do some magical control flow munging when adding/removing jumps. In the future, we may disallow adding/removing jumps in nir_instr_insert_*() and nir_instr_remove(), and use separate functions that are part of the control flow modification code, but for now we expose them and put them in a separate, private header. Signed-off-by: Connor Abbott <connor.w.abbott@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* ttn: add buffer texture typeRob Clark2015-08-121-0/+3
| | | | | Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Rob Clark <robclark@freedesktop.org>
* gallium/ttn: mark location specially in nir for color0-writes-allIlia Mirkin2015-07-031-1/+6
| | | | | | | | | | We need to distinguish a shader that has separate writes to each MRT from one which is supposed to write the data from MRT 0 to all the MRTs. In TGSI this is done with a property. NIR doesn't have that, so encode it as a funny location and decode on the other end. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Eric Anholt <eric@anholt.net>
* gallium/ttn: IN/OUT are only array if ArrayID != 0Rob Clark2015-07-031-62/+81
| | | | | | | | Fixes issue with gallium HUD. See this thread for details: http://lists.freedesktop.org/archives/mesa-dev/2015-June/087140.html Signed-off-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Eric Anholt <eric@anholt.net>
* gallium/ttn: don't upset nir_validate w/ BRK'sRob Clark2015-06-301-1/+1
| | | | | | | | | | | | | | Previously we were unconditionally doing ttn_get_src() even for instructions with no src's. Which created a lot of unnecessary load_const instructions. These were mostly harmless since NIR opt passes would strip them back out. But for an ENDIF following a BRK, it would result in load_const instructions created after the NIR break instruction. Which nir_validate dislikes. But we can actually just dtrt by using NumSrcRegs instead. Signed-off-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Eric Anholt <eric@anholt.net>
* gallium/ttn: add TXB2Rob Clark2015-06-301-0/+11
| | | | | Signed-off-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Eric Anholt <eric@anholt.net>
* gallium/ttn: partial fix for output arraysRob Clark2015-06-301-2/+4
| | | | | | | | | | It isn't quite yet practical to enable TGSI_ANY_INOUT_DECL_RANGE shader cap yet, at least not in drivers that need lower_to_scalar pass (which right now is all of the ttn users), since the register arrays do not get converted to SSA, which angers nir_lower_alu_to_scalar. Signed-off-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Eric Anholt <eric@anholt.net>
* tgsi_to_nir: Fix translation of TXF on MSAA targets.Eric Anholt2015-06-231-2/+10
| | | | | | Noticed while trying to add GL_ARB_texture_multisample support to vc4. Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium/ttn: add missing SNERob Clark2015-06-211-0/+1
| | | | | Signed-off-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* gallium/ttn: add texture-type supportRob Clark2015-06-211-1/+43
| | | | | | | | v2: rebased on using SVIEW to hold type information Signed-off-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* nir: Get rid of the array elements parameter on load/store intrinsicsJason Ekstrand2015-05-201-2/+0
| | | | | | | | | | | | | Previously, we used intrinsic->const_index[1] to represent "the number of array elements to load" for load/store intrinsics. However, this set to 1 by every pass that ever creates a load/store intrinsic. Also, while it might make some sense for registers, it makes no sense whatsoever in SSA. On top of that, the i965 backend was the only backend to ever support it; freedreno and vc4 just assert that it's always 1. Let's just delete it. Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Connor Abbott <cwabbott0@gmail.com> Reviewed-by: Rob Clark <robclark@freedesktop.org>
* gallium: remove TGSI_SAT_MINUS_PLUS_ONEMarek Olšák2015-05-201-1/+0
| | | | | | | | It's a remnant of some old NV extension. Unused. I also have a patch that removes predicates if anyone is interested. Reviewed-by: Roland Scheidegger <sroland@vmware.com>
generated by cgit v1.1 at 2024-06-07 07:50:05 +0000