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* nv50,nvc0: replace resInfoCBSlot by auxCBSlotSamuel Pitoiset2016-03-191-1/+0
| | | | | | | | | Having two different variables for the driver constant buffer slot is confusing and really useless. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu> Acked-by: Pierre Moreau <pierre.morrow@free.fr>
* nv50: Mark compute states as dirty on context switchPierre Moreau2016-03-191-0/+1
| | | | | | Signed-off-by: Pierre Moreau <pierre.morrow@free.fr> [ Samuel Pitoiset: Trivial rebase conflict ] Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
* nv50: add a new validation path for computeSamuel Pitoiset2016-03-191-12/+13
| | | | | | | | | This makes use of the new state validation interface to be consistent with 3d. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Pierre Moreau <pierre.morrow@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr>
* nv50: rework nv50_compute_validate_program()Samuel Pitoiset2016-03-193-31/+17
| | | | | | | | | | | Reduce the amount of duplicated code by re-using nv50_program_validate(). While we are at it, change the prototype to return void. We don't check anymore if the translation fails but improving the state validation is a long process. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Pierre Moreau <pierre.morrow@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr>
* nv50: rework the validation path for 3DSamuel Pitoiset2016-03-194-16/+36
| | | | | | | | | This exposes an interface for state validation that will be also used to rework the compute validation path. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Pierre Moreau <pierre.morrow@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr>
* nv50: rename 3d binding points to NV50_BIND_3D_XXXSamuel Pitoiset2016-03-198-46/+46
| | | | | | Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Pierre Moreau <pierre.morrow@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr>
* nv50: rename 3d dirty flags to NV50_NEW_3D_XXXSamuel Pitoiset2016-03-198-112/+112
| | | | | | Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Pierre Moreau <pierre.morrow@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr>
* nv50: rename NV50_COMPUTE to NV50_CPSamuel Pitoiset2016-03-193-52/+52
| | | | | | Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Pierre Moreau <pierre.morrow@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr>
* nv50: rename nv50_context::dirty to nv50_context::dirty_3dSamuel Pitoiset2016-03-198-57/+57
| | | | | | Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Pierre Moreau <pierre.morrow@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr>
* nv50,nvc0: Set only NEW_CP_GLOBALS upon bindingPierre Moreau2016-03-131-1/+1
| | | | | Signed-off-by: Pierre Moreau <pierre.morrow@free.fr> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
* nv50,nvc0: handle SQRT lowering inside the driverIlia Mirkin2016-03-131-1/+1
| | | | | | | | | | | | | | | | | | | | | First off, st/mesa lowers DSQRT incorrectly (it uses CMP to attempt to find out whether the input is less than 0). Secondly the current approach (x * rsq(x)) behaves poorly for x = inf - a NaN is produced instead of inf. Instead we switch to the less accurate rcp(rsq(x)) method - this behaves nicely for all valid inputs. We still don't do this for DSQRT since the RSQ/RCP ops are *really* inaccurate, and don't even have Newton-Raphson steps right now. Eventually we should have a separate library function for DSQRT that does it more precisely (and perhaps move this lowering to the post-opt phase). This fixes a number of dEQP precision tests that were expecting better behavior for infinite inputs. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
* gallium: add CAPs returning PCI device locationMarek Olšák2016-03-091-0/+4
| | | | Reviewed-by: Brian Paul <brianp@vmware.com>
* gallium: add external usage flags to resource_from(get)_handle (v2)Marek Olšák2016-03-091-1/+2
| | | | | | | | | This will allow drivers to make better decisions about texture sharing for DRI2, DRI3, Wayland, and OpenCL. v2: add read/write flags, take advantage of __DRI_IMAGE_USE_BACKBUFFER Reviewed-by: Axel Davy <axel.davy@ens.fr>
* nv50,nvc0: make sure to destroy the mutex used for blitsSamuel Pitoiset2016-03-081-0/+1
| | | | | | | | | This mutex is initialized when the blitter is created, but it is never destroyed. This doesn't hurt anything but it makes sense to destroy it at blitter deletion. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50,nvc0: bump minimum texture buffer offset alignmentIlia Mirkin2016-02-271-1/+1
| | | | | | | | It appears that it actually needs to be aligned to the datum size, so it was 1 when testing with R8, but it can be as high as 16 with RGBA32. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
* nv50: do not advertise about compute shadersSamuel Pitoiset2016-02-201-1/+1
| | | | | | | | | Compute shaders are totally unsupported. This avoids Clover to report that OpenCL is supported on Tesla because it's a lie. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Pierre Moreau <pierre.morrow@free.fr> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50,nvc0: enable/disable seamless cubemap texturing as requestedIlia Mirkin2016-02-167-1/+14
| | | | | | | | | | In a situation where the seamless setting isn't available on a per-texture basis (G200+ Teslas, and all Fermis), assume that all samplers will have it identically set, and enable accordingly. This fixes arb_seamless_cubemap piglit test on Fermi and Tesla. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50-: split tic format specificationBen Skeggs2016-02-163-34/+42
| | | | | | | | | | | We previously stored texture format information as it would appear in the TIC. We're about to support the new TIC layout that appeared with Maxwell, so it makes more sense to store the data in a split-out format. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50-: remove nv50_texture.xml.hBen Skeggs2016-02-161-306/+0
| | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50: switch nv50_tex.c to updated g80_texture.xml.hBen Skeggs2016-02-161-33/+33
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50: switch nv50_surface.c to updated g80_texture.xml.hBen Skeggs2016-02-161-7/+11
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50: switch nv50_state.c to updated g80_texture.xml.hBen Skeggs2016-02-161-24/+29
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50-: switch nv50_formats.c to updated g80_texture.xml.hBen Skeggs2016-02-161-206/+207
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50: import updated g80_texture.xml.h from rnndbBen Skeggs2016-02-161-0/+451
| | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50-: remove nv50_defs.xml.hBen Skeggs2016-02-161-263/+0
| | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50-: switch nv50_formats.c to updated g80_defs.xml.hBen Skeggs2016-02-161-8/+8
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50-: improved macros to handle format specificationBen Skeggs2016-02-161-470/+359
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50-: separate vertex formats from surface format descriptionsBen Skeggs2016-02-164-64/+197
| | | | | | | | | | | | We've previously had identical naming between vertex and texture formats, so it mostly made sense to define these together. However, upcoming patches are going to transition the driver over to using updated texture header definitions using NVIDIA's naming, and this will no longer be the case. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50: remove unnecessary includeBen Skeggs2016-02-161-1/+0
| | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50: switch nv50_transfer.c to g80_defs.xml.hBen Skeggs2016-02-161-3/+3
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50: switch nv50_tex.c to updated g80_defs.xml.hBen Skeggs2016-02-161-3/+3
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50: switch nv50_surface.c to updated g80_defs.xml.hBen Skeggs2016-02-161-8/+8
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50: import updated g80_defs.xml.h from rnndbBen Skeggs2016-02-161-0/+279
| | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: add PIPE_SHADER_CAP_MAX_SHADER_IMAGESIlia Mirkin2016-02-151-0/+1
| | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Dave Airlie <airlied@redhat.com>
* nv50,nvc0: Remove duplicate logic from nvc0_set_framebuffer_state()Edward O'Callaghan2016-02-141-12/+2
| | | | | | | | | | | | We already have this logic in the gallium/util functions so lets reduce some entropy while here. V.2: Apply change to nv50 also as suggested by Samuel Pitoiset. Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
* nv50: add missing PIPE_SHADER_CAP_SUPPORTED_IRSSamuel Pitoiset2016-02-141-0/+1
| | | | | Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: add a new interface for pipe_context::launch_grid()Samuel Pitoiset2016-02-133-13/+18
| | | | | | | | | | | | | This introduces pipe_grid_info which contains all information to describe a launch_grid call. This will be used to implement indirect compute in the same fashion as indirect draw. Changes from v2: - correctly initialize pipe_grid_info for nv50/nvc0 Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50,nvc0: remove unused parameter in nvXX_state_validate()Samuel Pitoiset2016-02-114-7/+5
| | | | | | | | This 'words' parameter is there since 2011 but it has never been used. While we are at it, get rid of the extern declaration. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nv50: add PIPE_QUERY_OCCLUSION_PREDICATE supportIlia Mirkin2016-02-091-0/+6
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
* gallium: add interface for querying memory usage and sizes (v2)Marek Olšák2016-02-051-0/+1
| | | | | | | | | | If you're worried about the duplication of some CAPs, we can remove them later. v2: add fields for memory eviction stats Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* gallium: add PIPE_CAP_QUERY_BUFFER_OBJECTIlia Mirkin2016-02-041-0/+1
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* nv50: avoid freeing the symbols if they're about to be storedIlia Mirkin2016-02-031-2/+7
| | | | | | | Spotted by Coverity Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
* gallium: Add PIPE_CAP_SURFACE_REINTERPRET_BLOCKSNicolai Hähnle2016-02-031-0/+1
| | | | | | | | | | This cap indicates whether pipe->create_surface can reinterpret a texture as a surface with a format of different block width/height (but equal block size). v2: fix whitespace Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
* gallium: Add PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLYNicolai Hähnle2016-02-031-0/+1
| | | | | | | | | This cap indicates that the driver only supports R, RG, RGB and RGBA formats for PIPE_BUFFER sampler views. v2: move into "unsupported features" section for nouveau (Ilia Mirkin) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
* nv50,nvc0: fix buffer clearing to respect engine alignment requirementsIlia Mirkin2016-01-301-18/+102
| | | | | | | | | | | | | | | It appears that the nvidia render engine is quite picky when it comes to linear surfaces. It doesn't like non-256-byte aligned offsets, and apparently doesn't even do non-256-byte strides. This makes arb_clear_buffer_object-unaligned pass on both nv50 and nvc0. As a side-effect this also allows RGB32 clears to work via GPU data upload instead of synchronizing the buffer to the CPU (nvc0 only). Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> # tested on GF108, GT215 Tested-by: Nick Sarnie <commendsarnex@gmail.com> # GK208 Cc: mesa-stable@lists.freedesktop.org
* gallium: add GREMEDY_string_markerRob Clark2016-01-211-0/+1
| | | | | | | | | | Since the GREMEDY extensions are normally only exposed by the gremedy debugger (and could possibly trigger debug paths in the app), we don't expose the extension by default, but instead only with ST_DEBUG=gremedy. Signed-off-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium/st: add pipe_context::generate_mipmap()Charmaine Lee2016-01-141-0/+1
| | | | | | | | | | | | | | | | This patch adds a new interface to support hardware mipmap generation. PIPE_CAP_GENERATE_MIPMAP is added to allow a driver to specify if this new interface is supported; if not supported, the state tracker will fallback to mipmap generation by rendering/texturing. v2: add PIPE_CAP_GENERATE_MIPMAP to the disabled section for all drivers v3: add format to the generate_mipmap interface to allow mipmap generation using a format other than the resource format v4: fix return type of trace_context_generate_mipmap() Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
* gallium: add PIPE_CAP_INVALIDATE_BUFFERNicolai Hähnle2016-01-141-0/+1
| | | | | | | | | It makes sense to re-use pipe->invalidate_resource for the purpose of glInvalidateBufferData, but this function is already implemented in vc4 where it doesn't have the expected behavior. So add a capability flag to indicate that the driver supports the expected behavior. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* nv50,nvc0: use a face sysval to avoid the useless back-and-forth conversionIlia Mirkin2016-01-082-5/+1
| | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gallium: add PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENTIlia Mirkin2016-01-081-0/+1
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
generated by cgit v1.1 at 2025-08-22 05:51:05 +0000