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* Merge remote-tracking branch 'mesa/13.0' into nougat-x86Chih-Wei Huang2017-01-0910-86/+213
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| * radeonsi: fix an off-by-one error in the bounds check for max_verticesNicolai Hähnle2016-12-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The spec actually says that calling EmitStreamVertex is undefined when you exceed max_vertices. But we do need to avoid trampling over memory outside the GSVS ring. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 88509518b01d7c1d7436a790bf9be5cf3c41a528)
| * radeonsi: do not kill GS with memory writesNicolai Hähnle2016-12-151-8/+22
| | | | | | | | | | | | | | | | | | | | | | | | Vertex emits beyond the specified maximum number of vertices are supposed to have no effect, which is why we used to always kill GS that reached the limit. However, if the GS also writes to memory (SSBO, atomics, shader images), then we must keep going and only skip the vertex emit itself. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 7655bccce80c9690ecb850304d15238ef1e0d622)
| * radeonsi: update all GSVS ring descriptors for new buffer allocationsNicolai Hähnle2016-12-151-1/+6
| | | | | | | | | | | | | | | | | | Fixes GL45-CTS.gtf40.GL3Tests.transform_feedback3.transform_feedback3_geometry_instanced. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 7b5b3d63c5f33bbd49f4b11c282603baa9371c10)
| * radeonsi: disable the constant engine (CE) on Carrizo and StoneyMarek Olšák2016-12-141-1/+4
| | | | | | | | | | | | | | | | | | It must be disabled until the kernel bug is fixed, and then we'll enable CE based on the DRM version. Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 31f988a9d6d05f4aaea4d0455e509a5f6b667d9c)
| * radeonsi: wait for outstanding LDS instructions in memory barriers if neededMarek Olšák2016-12-141-1/+17
| | | | | | | | | | | | Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 13c34cf8ca43d0f9c1e1a663e6a3783b0938dfd9)
| * radeonsi: wait for outstanding memory instructions in TCS barriersMarek Olšák2016-12-141-1/+5
| | | | | | | | | | | | Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 16f49c16c79a67f174b92672d546f909425f7fc3)
| * radeonsi: allow specifying simm16 of emit_waitcnt at call sitesMarek Olšák2016-12-141-5/+7
| | | | | | | | | | | | | | | | The next commit will use this. Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 15e96c70b0b668a2626326d3572a247e41885c18)
| * radeonsi: fix incorrect FMASK checking in bind_sampler_statesMarek Olšák2016-12-141-4/+4
| | | | | | | | | | | | Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 38d4859b9465146189c234cd372de9d3eee86a92)
| * radeonsi: always restore sampler states when unbinding sampler viewsMarek Olšák2016-12-141-3/+8
| | | | | | | | | | | | Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit b3a2aa9cba46bd6c8de22390b3b1ce9ac6c27988)
| * radeonsi: fix isolines tess factor writes to control ringNicolai Hähnle2016-12-141-4/+12
| | | | | | | | | | | | | | | | | | Fixes piglit arb_tessellation_shader/execution/isoline{_no_tcs}.shader_test. Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit d3931a355fd5d309d5bcfe2655249f029e84d355) [Emil Velikov: there is no si_shader_key::part in branch] Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
| * vc4: In a loop break/continue, jump if everyone has taken the path.Eric Anholt2016-12-141-10/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This should be a win for most loops, which tend to have uniform control flow. More importantly, it exposes important information to live variables: that the break/continue here means that our jump target may have access to values that were live on our input. Previously, we were just setting the exec mask and letting control flow fall through, so an intervening def between the break and the end of the loop would appear to live variables as if it screened off the variable, when it didn't actually. Fixes a regression in glsl-vs-loop-redundant-condition.shader_test when a perturbing of register allocation caused a live variable to get stomped. Cc: 13.0 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 8e5ec33f1151dd82402bdfdaa4fff7c284e49a1c)
| * radeonsi: apply the double EVENT_WRITE_EOP workaround to VI as wellMarek Olšák2016-12-141-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Internal docs don't mention it, but they also don't mention that the bug has been fixed (like other CI bugs fixed in VI). Vulkan does this too. v2: also update r600_gfx_write_fence_dwords Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1) (cherry picked from commit bacf9b4e735cc9d96acd2d507dfb2fc8831966a3)
| * radeonsi: add a tess+GS hang workaround for VI dGPUsMarek Olšák2016-12-141-2/+10
| | | | | | | | | | | | | | | | ported from Vulkan Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit a816c7fe07bf16325c11bc692486ffb6d1e8b670)
| * radeonsi: apply a tessellation bug workaround for SIMarek Olšák2016-12-141-0/+6
| | | | | | | | | | | | | | | | | | | | | | Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 78c4528ae7709fbe94d917d034cfd60535b5dcf3) [Emil Velikov: resolve trivial conflict] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/gallium/drivers/radeonsi/si_state_draw.c
| * radeonsi: apply a TC L1 write corruption workaround for SIMarek Olšák2016-12-141-11/+23
| | | | | | | | | | | | Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 72e46c98896d0cb13fc7d70b7a4193a84d72a5fc)
| * radeonsi: apply a multi-wave workgroup SPI bug workaround to affected CIK chipsMarek Olšák2016-12-144-4/+29
| | | | | | | | | | | | | | | | All codepaths are handled except for clover. Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 72d48fcd8eb5862c72d27e5462c289c5de65396e)
| * radeonsi: consolidate max-work-group-size computationMarek Olšák2016-12-141-24/+19
| | | | | | | | | | | | | | | | The next commit will need this. Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit ec36c63b4f417973a6d50d79281f4834682c4555)
| * radeonsi: disable RB+ blend optimizations for dual source blendingMarek Olšák2016-12-141-0/+11
| | | | | | | | | | | | | | | | | | This fixes dual source blending on Stoney. The fix was copied from Vulkan. The problem was discovered during internal testing. Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 5e5573b1bf8565f38e9b770b5357d069e80ff00d)
| * radeonsi: set CB_BLEND1_CONTROL.ENABLE for dual source blendingMarek Olšák2016-12-141-0/+4
| | | | | | | | | | | | | | | | copied from Vulkan Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit ff50c44a5fb4411715da828af5b8706c8a456d26)
| * radeonsi: always set all blend registersMarek Olšák2016-12-141-5/+5
| | | | | | | | | | | | | | | | better safe than sorry Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 87b208a54e67b6b01845efa2ec20a96963399920)
* | Merge remote-tracking branch 'mesa/13.0' into nougat-x86Chih-Wei Huang2016-11-257-14/+50
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| * radeonsi: store group_size_variable in struct si_computeNicolai Hähnle2016-11-241-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For compute shaders, we free the selector after the shader has been compiled, so we need to save this bit somewhere else. Also, make sure that this type of bug cannot re-appear, by NULL-ing the selector pointer after we're done with it. This bug has been there since the feature was added, but was only exposed in piglit arb_compute_variable_group_size-local-size by commit 9bfee7047b70cb0aa026ca9536465762f96cb2b1 (which is totally unrelated). Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 42d5e91a2ae235c007c5d17935be9bb1c4ff388e)
| * vc4: Fix register class handling of DDX/DDY arguments.Eric Anholt2016-11-241-1/+1
| | | | | | | | | | | | | | | | I had this exactly backwards, but apparently the piglit tests were all landing in r0-r3 anyway. Cc: "13.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 977d8b526b983c8d19df00af224033389f8ab7c8)
| * vc4: Clamp the shadow comparison value.Eric Anholt2016-11-231-0/+9
| | | | | | | | | | | | | | Fixes piglit glsl-fs-shadow2D-clamp-z. Cc: <mesa-stable@lists.freedesktop.org> (cherry picked from commit 08d51487e3b8cfb14ca2ece9545b2e2ed344e3cc)
| * vc4: Don't abort when a shader compile fails.Eric Anholt2016-11-236-8/+32
| | | | | | | | | | | | | | | | | | | | It's much better to just skip the draw call entirely. Getting this information out of register allocation will also be useful for implementing threaded fragment shaders, which will need to retry non-threaded if RA fails. Cc: <mesa-stable@lists.freedesktop.org> (cherry picked from commit 4d019bd703e7c20d56d5b858577607115b4926a3)
* | Merge remote-tracking branch 'mesa/13.0' into nougat-x86Chih-Wei Huang2016-11-163-5/+38
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| * vc4: Use Newton-Raphson on the 1/W write to fix glmark2 terrain.Eric Anholt2016-11-091-1/+1
| | | | | | | | | | | | | | | | The 1/W was apparently not accurate enough, and we were getting sparklies in the distance. The closed driver also did a N-R step here. Cc: <mesa-stable@lists.freedesktop.org> (cherry picked from commit 283d4d18e598793bbff7d9ba5a601bced9b36542)
| * radeonsi: fix an assertion failure in si_decompress_sampler_color_texturesMarek Olšák2016-11-091-1/+3
| | | | | | | | | | | | | | | | | | | | This fixes a crash in Deus Ex: Mankind Divided. Release builds were unaffected, so it's not too serious. Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 00baaa4752ab7e721218a2840cf0952d8c7c6eca)
| * radeonsi: fix BFE/BFI lowering for GLSL semanticsNicolai Hähnle2016-11-091-3/+34
| | | | | | | | | | | | | | | | Fixes spec/arb_gpu_shader5/execution/built-in-functions/*-bitfield{Extract,Insert} Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 5aef14932ac047dc5f1af311a26b7f41b140d79f)
* | nv30 locking fixesIlia Mirkin2016-11-012-2/+22
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* | nouveau: more locking - make sure that fence work is always done withIlia Mirkin2016-11-014-4/+17
| | | | | | | | the push mutex acquired
* | WIP nouveau: add lockingIlia Mirkin2016-11-0130-45/+372
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* | android: support swrastWuZhen2016-11-011-0/+37
| | | | | | | | | | | | | | | | | | | | System boots up with gles_mesa/softpipe/llvmpipe. NO_REF_TASK Tested: local run Change-Id: I629ed0ca9fad12e32270eb8e8bfa9f7681b68474 Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
* | android: change some PIPE to SVGA3D format mappingsChih-Wei Huang2016-11-011-0/+6
| | | | | | | | | | | | | | | | This is a try-and-error patch which fixes the Android-x86 black screen issue of VMware on Linux host. Tested OK on VMware Workstation 12 Player. But the red and blue colors are exchanged. Note it doesn't affect VMware on Windows host.
* | gallium/radeon: define some prototypes of LLVMInitialize functionsChih-Wei Huang2016-11-011-8/+1
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* radeonsi: fix behavior of GLSL findLSB(0)Marek Olšák2016-11-011-4/+13
| | | | | | | | 12.0 and older need the same fix but elsewhere. Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 4bf45a6079b5cc6b0360b637c0c7baa456b8257d)
* radeonsi: set VGT_GS_ONCHIP_CNTL on CIK and laterMarek Olšák2016-11-011-0/+8
| | | | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org> (cherry picked from commit e24dc4316487eeaa6ee8aa5c709546d814e96f03)
* nvc0/ir: fix emission of IMAD with NEG modifiersSamuel Pitoiset2016-11-012-2/+2
| | | | | | | | | | The emitter tried to emit sub instead of subr when src0 has actually a NEG modifier. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "11.0 12.0 13.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 84e946380b2d5ddc62a107b667be39abf1932704)
* nvc0/ir: fix emission of SHLADD with NEG modifiersSamuel Pitoiset2016-10-272-2/+2
| | | | | | | | | | | | | | This affects GF100:GK110 chipsets, but not GM107+ where the logic is a bit different. The emitters tried to emit sub instead of subr when src0 has a NEG modifier. This fixes the following piglit tests glsl-fs-loop-nested and glsl-vs-loop-nested. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "13.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 1ec7227d44dceae8de7b93f846bbd33d66007909)
* gallium/radeon: make sure the address of separate CMASK is aligned properlyMarek Olšák2016-10-271-2/+3
| | | | | | | | | This should fix random GPU hangs on Hawaii and Fiji. Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit dce05b342355eac9296ee7110385b16d6edb059d)
* gallium/radeon: fix incorrect bpe use in si_set_optimal_micro_tile_modeMarek Olšák2016-10-271-7/+7
| | | | | | | | | Oh my god, I wonder what catastrophic issues this was causing on SI. Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 8a21f52d73936e23a314a288a36782a698c7c1b9)
* nvc0: use correct bufctx when invalidating CP texturesSamuel Pitoiset2016-10-271-1/+1
| | | | | | | Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: "12.0 13.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 7b2712c367891e96384226a1fa94679a814235d0)
* nvc0: do not break 3D state by pushing MS coordinates on FermiSamuel Pitoiset2016-10-241-43/+44
| | | | | | | | | | | | | | | | | | | Long story short, 3D and CP are aliased on Fermi and initializing compute after pushing the MS sample coordinate offsets seems to corrupt 3D state for weird reasons. I still don't have the faintest clue what is going on, but this seems to only affect Fermi generation. A possible fix could be to use two different channels, one for 3D and one for CP. This fixes a bunch of regressions pinpointed by piglit. Fixes: "nvc0: fix up image support for allowing multiple samples" Cc: "13.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit 42273edf79c2500957f51690499aa3405cc689db)
* radeonsi: fix 64-bit loads from LDSNicolai Hähnle2016-10-241-1/+1
| | | | | | | | | | Fixes spec/arb_tessellation_shader/execution/dvec[23]-vs-tcs-tes, among others. Cc: "12.0 13.0" <mesa-stable@lists.freedesktop.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 4a2dbfff05f7be271c2aa72e783e24b31906db51)
* nv50/ir: process texture offset sources as regular sourcesIlia Mirkin2016-10-241-53/+94
| | | | | | | | | | | | | | | | With ARB_gpu_shader5, texture offsets can be any source, including TEMPs and IN's. Make sure to process them as regular sources so that we pick up masks, etc. This should fix some CTS tests that feed offsets directly to textureGatherOffset, and we were not picking up the input use, thus not advertising it in the shader header. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Tested-by: Dave Airlie <airlied@redhat.com> Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org> (cherry picked from commit cd45d758ff87305ceecca899fe7325779bb6755b)
* nv50,nvc0: avoid reading out of bounds when getting bogus so infoIlia Mirkin2016-10-242-2/+8
| | | | | | | | | | The state tracker tries to attach the info to the wrong shader. This is easy enough to protect against. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 313fba5ee1de9416930e45da8aff63a24763940b)
* radeonsi: remove cb0_is_integer handlingMarek Olšák2016-10-193-13/+3
| | | | | | st/mesa does this for us. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* svga: minor code improvements in svga_validate_pipe_sampler_view()Brian Paul2016-10-181-8/+8
| | | | | | | Use the 'texture' local var in more places. Rename 'pFormat' to 'viewFormat'. Reviewed-by: Charmaine Lee <charmainel@vmware.com>
* radeonsi: rename prefixes from radeon to siMarek Olšák2016-10-184-157/+157
| | | | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
generated by cgit v1.1 at 2024-05-19 16:16:46 +0000