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* gallium: add new fields to pipe_driver_query_infoSamuel Pitoiset2015-05-063-18/+16
| | | | | | | | | | | | | | According to the spec of GL_AMD_performance_monitor, valid type values returned are UNSIGNED_INT, UNSIGNED_INT64_AMD, PERCENTAGE_AMD, FLOAT. This also introduces the new field group_id in order to categorize queries into groups. v2: add PIPE_DRIVER_QUERY_TYPE_BYTES v3: fix incorrect query type for radeon and svga drivers Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr>
* ilo: use ilo_image exclusively in coreChia-I Wu2015-05-024-139/+149
| | | | | Initialize ilo_view_surface and ilo_zs_surface from ilo_image instead of ilo_texture.
* ilo: add ilo_image_can_enable_aux()Chia-I Wu2015-05-029-50/+27
| | | | It replaces ilo_texture_can_enable_hiz().
* ilo: make ilo_image more self-containedChia-I Wu2015-05-022-9/+21
| | | | Add depth0, sample_count, and scanout to ilo_image.
* ilo: add ilo_image_init_for_imported()Chia-I Wu2015-05-023-60/+66
| | | | | It replaces ilo_image_update_for_imported_bo() and enables more error checkings for imported textures.
* ilo: prepare for image init for imported boChia-I Wu2015-05-021-120/+129
| | | | Refactoring in prepraration for ilo_image_init_for_imported().
* ilo: constify ilo_image_paramsChia-I Wu2015-05-021-11/+11
| | | | Make ilo_image_params const in functions that do not modify it.
* ilo: improve readability of ilo_imageChia-I Wu2015-05-026-111/+127
| | | | Improve docs, rename struct fields, and reorder walk types. No real changes.
* ilo: move command builder to coreChia-I Wu2015-05-0223-61/+74
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* ilo: move ilo_state_3d* to coreChia-I Wu2015-05-029-276/+274
| | | | ilo state structs (struct ilo_xxx_state) are moved as well.
* ilo: add ilo_buffer.h to coreChia-I Wu2015-05-025-90/+138
| | | | Rename the original ilo_buffer to ilo_buffer_resource to avoid name conflict.
* ilo: move BOs from ilo_texture to ilo_imageChia-I Wu2015-05-027-39/+63
| | | | We want to work with ilo_image instead of ilo_texture in core.
* ilo: move ilo_layout.[ch] to core as ilo_image.[ch]Chia-I Wu2015-05-0211-487/+489
| | | | Move files and s/layout/image/.
* ilo: add ilo_format.[ch] to coreChia-I Wu2015-05-028-169/+184
| | | | The original ilo_format.[ch] are removed.
* ilo: add ilo_fence.h to coreChia-I Wu2015-05-025-58/+113
| | | | Implement pipe_fence_handle on top of ilo_fence.
* ilo: add ilo_dev_init() to coreChia-I Wu2015-05-024-146/+195
| | | | Move init_dev() from ilo_screen.c to core.
* ilo: rename ilo_dev_info to ilo_devChia-I Wu2015-05-0225-141/+141
| | | | With intel_winsys being embedded in it, drop the "_info" suffix.
* ilo: move intel_winsys to ilo_dev_infoChia-I Wu2015-05-025-13/+15
| | | | We want to use ilo_dev_info instead of ilo_screen in core.
* ilo: add ilo_dev.h to coreChia-I Wu2015-05-023-38/+73
| | | | Move what are remaining in ilo_common.h (that is, ilo_dev_*) to ilo_dev.h.
* ilo: add ilo_debug.[ch] to coreChia-I Wu2015-05-025-85/+158
| | | | | They consist of the debug helpers that used to live in ilo_common.h and ilo_screen.c.
* ilo: add ilo_core.h to coreChia-I Wu2015-05-023-14/+48
| | | | | ilo_core.h includes the common gallium headers that were included in ilo_common.h.
* ilo: move intel_winsys.h to coreChia-I Wu2015-05-0219-18/+18
| | | | | Add a new subdirectory and start moving files that do not depend on ilo_screen/ilo_context to it.
* nvc0/ir: fix predicated PFETCH for realIlia Mirkin2015-04-302-2/+2
| | | | | | | | Commit a9d08a250 accidentally didn't make use of the new src1 variable. Use it. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org
* nv50/ir: fix asFlow() const helper for OP_JOINIlia Mirkin2015-04-291-1/+1
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org
* nvc0/ir: fix predicated PFETCH emissionIlia Mirkin2015-04-292-2/+6
| | | | | | | | | src1 would contain the predicate, which would get emitted as a register source by an undiscerning srcId helper. Work around this in the same way as in emitTEX. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org
* gk110/ir: fix set with a register dest to not auto-set the abs flagIlia Mirkin2015-04-291-1/+1
| | | | | | | This was causing src0 to always have the absolute value flag set. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org
* winsys/radeon: add a private interface for radeon_surfaceMarek Olšák2015-04-2913-29/+102
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* winsys/radeon: move radeon_winsys.h to drivers/radeonMarek Olšák2015-04-2913-12/+618
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* r300: do not link against libdrm_intelEmil Velikov2015-04-291-1/+1
| | | | | | | | Accidentally added since the introduction of the file. Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* gallium/svga: Remove useless ARRAY_SIZE declarationAxel Davy2015-04-291-4/+0
| | | | | | | This is already declared in util/macros.h Reviewed-by: Brian Paul <brianp@vmware.com> Signed-off-by: Axel Davy <axel.davy@ens.fr>
* util/macros: Move DIV_ROUND_UP to util/macros.hAxel Davy2015-04-291-2/+0
| | | | | | | Move DIV_ROUND_UP to a shared location accessible everywhere Reviewed-by: Brian Paul <brianp@vmware.com> Signed-off-by: Axel Davy <axel.davy@ens.fr>
* nvc0/ir: flush denorms to zero in non-compute shadersIlia Mirkin2015-04-282-1/+25
| | | | | | | | | | | | This will set the FTZ flag (flush denorms to zero) on all opcodes that can take it. This resolves issues in Unigine Heaven 4.0 where there were solid-filled boxes popping up. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89455 Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org> Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* nvc0: expose GLSL version 410Ilia Mirkin2015-04-281-1/+1
| | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* r600g,radeonsi: add a driver query returning GPU loadMarek Olšák2015-04-286-2/+175
| | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* r600g,radeonsi: add driver queries for GPU temperature and shader+memory clocksMarek Olšák2015-04-283-2/+35
| | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* gm107/ir: add lane/vertex count sysvalsIlia Mirkin2015-04-271-0/+2
| | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* gk110/ir: add support for writing per-patch and shader outputsIlia Mirkin2015-04-271-7/+3
| | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* freedreno/a3xx: color masking works like a blend for some formatsIlia Mirkin2015-04-271-0/+14
| | | | | | | | When there is a colormask active that does not cover all the channels, enable reading in the destination like with a combining blend operation. This fixes fbo-blending-formats on a3xx. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* freedreno/a3xx: add support for S8 and Z32F_S8Ilia Mirkin2015-04-279-44/+235
| | | | | | | | | Enables ARB_depth_buffer_float. There is no sampling support for interleaved Z32F_S8, so we store the two textures separately, one as Z32F, the other as S8. As a result, we need a lot of additional logic for restores and transfers. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* freedreno/a3xx: add Z32F supportIlia Mirkin2015-04-275-10/+65
| | | | | | | | | 32-bit depth buffers are stored as unorm, and thus need special handling when moving to and from gmem. They are copied into gmem by writing depth, and resolved from gmem using a special resolve bit which apparently float-ifies the data. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* freedreno: add fd_transfer to wrap around pipe_transferIlia Mirkin2015-04-273-2/+15
| | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* freedreno/a3xx: add support for disabling depth clippingIlia Mirkin2015-04-272-1/+3
| | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* Fix a few typosZoë Blade2015-04-2717-18/+18
| | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net>
* radeonsi: set an optimal value for DB_Z_INFO.ZRANGE_PRECISIONMarek Olšák2015-04-271-7/+2
| | | | | | Required because of a VI hw bug. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: remove deprecated and useless registersMarek Olšák2015-04-271-10/+0
| | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* radeonsi: remove useless includesMarek Olšák2015-04-271-3/+0
| | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* gallium/radeon: print winsys info with R600_DEBUG=infoMarek Olšák2015-04-272-0/+28
| | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* gallium/radeon: don't crash when getting out-of-bounds TEMP referencesMarek Olšák2015-04-231-0/+6
| | | | Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
* softpipe: fix stencil write to use an integer valueDave Airlie2015-04-231-1/+1
| | | | | | | | | | | This fixes a number of regressions since 61393bdcdc3b63624bf6e9730444f5e9deeedfc8 u_tile: fix stencil texturing tests under softpipe Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89960 Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* freedreno: misc minor cleanupsRob Clark2015-04-223-9/+10
| | | | Signed-off-by: Rob Clark <robclark@freedesktop.org>
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