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* intel/blorp: Emit all the binding tablesJason Ekstrand2016-11-091-0/+5
| | | | | | | | | | | | | | At least on Sky Lake, after emitting 3DSTATE_CONSTANT_*, you are required to re-emit the 3DSTATE_BINDING_TABLE_POINTERS packet for the corresponding stage. If you don't, double-buffering may fail and you may get the wrong constants. It turns out that you need to do this even if you have no push constants to speak of or else the next 3DSTATE_CONSTANT packet you emit for that stage may not work correctly. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Cc: "13.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 406cd9d1261996ba53e3301b2a5a01b5c5c56f00)
* intel/blorp: Pass a brw_stage_prog_data to upload_shaderJason Ekstrand2016-11-093-4/+5
| | | | | | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012 Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com> Cc: "13.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 4306c10a885bdd833328a2a4eeb0079aa4f4bae3)
* intel/blorp: Use wm_prog_data instead of hand-rolling our ownJason Ekstrand2016-11-095-66/+28
| | | | | | | | | | | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98012 Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com> Cc: "13.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 058304f0819c96fd18eb17911022a410540aa295) [Emil Velikov: brw_compile_fs() has different signature] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/intel/blorp/blorp.c
* intel/blorp: Rework our usage of ralloc when compiling shadersJason Ekstrand2016-11-014-14/+14
| | | | | | | | | | | | | | | | | | | | | | Previously, we were creating the shader with a NULL ralloc context and then trusting in blorp_compile_fs to clean it up. The only problem was that blorp_compile_fs didn't clean up its context properly so we were leaking. When I went to fix that, I realized that it couldn't because it has to return the shader binary which is allocated off of that context and used by the caller. The solution is to make blorp_compile_fs take a ralloc context, allocate the nir_shaders directly off that context, and clean it all up in whatever function creates the shader and calls blorp_compile_fs. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com> Cc: "12.0, 13.0" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 43dadb6edd5e3e3e10b1198184a9f75556edad49) [Emil Velikov: resolve trivial conflicts] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/intel/blorp/blorp_clear.c
* intel/blorp: Rename compile_nir_shader to compile_fsJason Ekstrand2016-11-014-14/+14
| | | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (cherry picked from commit ab92480272bc34d943d28506cc36759e141b4371)
* intel/blorp: Fix a couple asserts around image copy rectanglesJason Ekstrand2016-11-011-2/+6
| | | | | | | | | | | | | | | | | | With dealing with rectangles in compressed images, you can have a width or height that isn't a multiple of the corresponding compression block dimension but only if that edge of your rectangle is on the edge of the image. When we call convert_to_single_slice, it creates an 2-D image and a set of tile offsets into that image. When detecting the right-edge and bottom-edge cases, we weren't including the tile offsets so the assert would misfire. This caused crashes in a few UE4 demos Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reported-by: "Eero Tamminen" <eero.t.tamminen@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98431 Cc: "13.0" <mesa-stable@lists.freedesktop.org> Tested-by: "Eero Tamminen" <eero.t.tamminen@intel.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (cherry picked from commit 4964a5149b7776ce27aaeab2be0c2ebf41ded740)
* intel/blorp: Add a flag to make blorp not re-emit dept/stencil buffersJason Ekstrand2016-10-143-3/+17
| | | | | | | | | | | In Vulkan, we want to be able to use blorp to perform clears inside of a render pass. If blorp stomps the depth/stencil buffers packets then we'll have to re-emit them. This gets tricky when secondary command buffers get involved. Instead, we'll simply guarantee that the depth and stencil buffers we pass to blorp (if any) match those already set in the hardware. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Add an entrypoint for clearing depth and stencilJason Ekstrand2016-10-142-0/+79
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Emit a NULL render target for depth/stencil-only operationsJason Ekstrand2016-10-141-5/+44
| | | | | | | | | | This never mattered before because the only time we used blorp depth/stencil only was to do HiZ operations on gen6-7. It may have worked in that case (and maybe it didn't) but slow depth clears actually do depth rendering so they need a valid render target. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Allow for running without a PS on gen8+Jason Ekstrand2016-10-141-18/+24
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Add an "enabled" bit to surface_infoJason Ekstrand2016-10-143-15/+19
| | | | | | | | This gives a slightly smarter way to check whether or not a particular surface exists than looking at the address. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Emit more complete DEPTH_STENCIL stateJason Ekstrand2016-10-142-11/+47
| | | | | | | | | | This should now set the pipeline up properly for doing depth and/or stencil clears by plumbing through depth/stencil test values. We are now also emitting color calculator state for blorp operations without an actual shader because that is where the stencil reference value goes pre-SKL. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Unify the DEPTH_STENCIL emit code across gensJason Ekstrand2016-10-141-12/+15
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Simplify depth/stencil configJason Ekstrand2016-10-141-15/+5
| | | | | | | | | The newly reworked depth/stencil config code can properly handle having depth, stencil, both, or neither. We no longer need to predicate it on having depth or stencil. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Set QPitch for depth and HiZ on gen8+Jason Ekstrand2016-10-141-0/+9
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* intel/blorp: Add support for binding an actual stencil bufferJason Ekstrand2016-10-142-34/+79
| | | | | | | | | | | While we're here, we also make depth without HiZ work. v2: - Use the correct surface type for 1-D on SKL+ - Set QPitch on BDW+ Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Move CLEAR_PARAMS setup into emit_depth_stencil_configJason Ekstrand2016-10-141-11/+12
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Make the Z component of the primitive adjustableJason Ekstrand2016-10-142-6/+7
| | | | | | | | We want to be able to start doing slow depth clears with blorp. This allows us to adjust the depth we're clearing to. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: use correct header guardsEmil Velikov2016-10-143-2/+13
| | | | | | | | Avoid the discouraged use of pragma once and a missing guard for blorp_genX_exec.h. Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Chad Versace <chadversary@chromium.org>
* intel/blorp: Use documented RECTLIST vertex positionsNanley Chery2016-10-051-3/+3
| | | | | | | | | | Use the vertex positions described in the PRMs. This has no effect on rendering but quiets the simulator warnings seen when the vertices appear out of order. Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
* anv/blorp: Handle zero width/height blits in blorp_copy()Anuj Phogat2016-10-041-1/+4
| | | | | | | V2: Move the check from copy_buffer_to_image() to blorp_copy(). (Nanley) Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
* nir: Add a flag to lower_io to force "sample" interpolationJason Ekstrand2016-09-151-1/+1
| | | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* intel/blorp: Stop setting 3DSTATE_DRAWING_RECTANGLEJason Ekstrand2016-09-141-5/+0
| | | | | | | | | | | | The Vulkan driver sets 3DSTATE_DRAWING_RECTANGLE once to MAX_INT x MAX_INT at the GPU initialization time and never sets it again. The GL driver sets it every time the framebuffer changes. Originally, blorp set it to the size of the drawing area but meant we had to set it back in the Vulkan driver. Instead, we can easily just do that in the GL driver's blorp_exec implementation and not set it in blorp core. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
* intel/blorp: Emit 3DSTATE_MULTISAMPLE directlyJason Ekstrand2016-09-141-3/+45
| | | | | | | | | Previously, we relied on a driver hook for 3DSTATE_MULTISAMPLE. However, now that Vulkan and GL use the same sample positions, we can set up 3DSTATE_MULTISAMPLE directly in blorp and delete the driver hook. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
* intel/blorp: Use #defines for all __gen_ helpersJason Ekstrand2016-09-131-5/+6
| | | | | | | This allows us to #undef them later if we don't want them to persist Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Rework alloc_binding_tableJason Ekstrand2016-09-131-5/+5
| | | | | | | | | | | | | The original blorp_alloc_binding_table helper was supposed to return the binding table offset and map along with the surface state maps. This isn't quite what we want, however. What we really want is the binding table offsets, surface state offsets, and surface state maps. In the GL driver, the binding table map *is* an array of surface state offsets. However, in Vulkan, this isn't quite true as the entries in the binding table are surface state offsets combined with another binding table block offset. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Work in terms of logical array layersJason Ekstrand2016-09-121-12/+2
| | | | | | | | | | | | | | | | | | When Ivy Bridge introduced array multisampling, someone made the decision to do lots of stuff throughout the driver in terms of physical array layers rather than logical array layers. In ISL, we use logical array layers most of the time and it really makes no sense to use physical array layers in the blorp API. Every time someone passes physical array layers into blorp for an array multisampled surface, they're always divisible by the number of samples and we divide right away. Eventually, I'd like to rework most of the GL driver internals to use logical array layers but that's going to be a big project and will probably happen as part of the ISL conversion. For now, we'll do the conversion in brw_blorp and let blorp just use the logical layers. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Increase the presision of coordinate transform calculationsJason Ekstrand2016-09-121-3/+3
| | | | | | | | | | | | The result of this calculation goes into an fma() in the shader and we would like it to be as precise as possible. The division in particular was a source of imprecision whenever dst1 - dst0 was not a power of two. This prevents regressions in some of the new Vulkan CTS tests for blitting using a filtering of NEAREST. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* intel/blorp: Add a swizzle parameter to blorp_clearJason Ekstrand2016-09-122-2/+5
| | | | | | | | While we're here, we also re-arrange the parameters to better match the parameter order of blorp_blit. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Make color_write_disable const and optionalJason Ekstrand2016-09-122-6/+8
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Add support for clearing R9G9B9E5 surfacesJason Ekstrand2016-09-121-0/+8
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Add support for RGB destinations in copiesJason Ekstrand2016-09-122-0/+69
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Add an entrypoint for doing bit-for-bit copiesJason Ekstrand2016-09-122-0/+143
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Pull the guts of blorp_blit into a helperJason Ekstrand2016-09-121-130/+147
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Stop using the X/YOffset field of RENDER_SURFACE_STATEJason Ekstrand2016-09-123-9/+89
| | | | | | | | | | | | | While it can be useful, the field has substantial limtations. In particular, the bittom 2 or 3 bits is missing so your offset always has to be a multiple of 4 or 8. While surface alignments usually work out to make this ok, when you start trying to fake compressed surfaces as uncompressed (which we will want to do) this falls apart. The easiest solution is to simply align all offsets to a tile boundary and munge the regions we're copying to account for the intratile offset. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Use fake_interleaved_msaa in retile_w_to_yJason Ekstrand2016-09-121-3/+1
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Use isl_get_interleaved_msaa_px_size_saJason Ekstrand2016-09-121-28/+6
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Handle 3D surfaces in convert_to_single_sliceJason Ekstrand2016-09-121-5/+11
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Fix the early return condition in convert_to_single_sliceJason Ekstrand2016-09-121-1/+6
| | | | | | | | | | | | | | The convert_to_single_slice operation is *mostly* idempotent. The only non-repeatable thing it does is that, when it sets the intratile offset fields, it just overwrites them instead of doing a += operation. This is supposed to be ok because we have an early return at the top that should make it bail of the surface is already a single slice. Unfortunately, the if condition has been broken ever since it was first added in 96fa98c18. This commit fixes the condition and adds an assert to ensure we don't stomp any non-zero intratile offsets. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Use the surface format for computing offsetsJason Ekstrand2016-09-121-1/+1
| | | | | | | | | If we use the view format, it may be an uncompressed view of a compressed image which throws things off. Since we're computing offsets of images, we want the actual surface offset anyway. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Don't assume R8_UINT in convert_to_single_sliceJason Ekstrand2016-09-121-1/+1
| | | | | | | We're going to use it for more than just stencil textures Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Take a destination swizzle in blorp_blitJason Ekstrand2016-09-122-2/+3
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Take an isl_swizzle instead of a SWIZZLEJason Ekstrand2016-09-122-28/+3
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/isl: Add an isl_swizzle structure and use it for isl_view swizzlesJason Ekstrand2016-09-122-10/+7
| | | | | | | | | This should be more compact than the enum isl_channel_select[4] that we were using before. It's also very convenient because we already had such a structure in the Vulkan driver we just needed to pull it over. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* intel/blorp: Handle the 512 layers restriction on Sandy BridgeJason Ekstrand2016-09-122-4/+19
| | | | | Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* intel/blorp: Add a TODO fileJason Ekstrand2016-09-121-0/+16
| | | | | | | This provides a nice little place to share notes on what still needs to be done and/or would be nice to have in BLORP. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
* intel/blorp: Add plumbing for setting color clear layer countTopi Pohjolainen2016-09-122-10/+12
| | | | | Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* intel/blorp: Allow multiple layersTopi Pohjolainen2016-09-121-3/+6
| | | | | Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* i965/blorp: Instruct vertex fetcher to provide prim instance idTopi Pohjolainen2016-09-121-4/+22
| | | | | | | | | | This will indicate target layer (Render Target Array Index) needed for layered clears. v2: Use 3DSTATE_VF_SGVS for gen8+ Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* intel/blorp: Allow single slice converter to suppress number of layersTopi Pohjolainen2016-09-081-3/+0
| | | | | Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
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