| Commit message (Collapse) | Author | Age | Files | Lines |
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With one small genxml change, the two versions were basically identical.
The only differences were one #define for HSW+ and a field that is missing
on Haswell but exists everywhere else.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
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Create a function that performs one of three HiZ operations -
depth/stencil clears, HiZ resolve, and depth resolves.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
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This is the only remaining part of genX_l3.c and there's really no good
reason for it to be in its own file.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
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It's tiny and fully generic so there's really no reason for it to be in a
gen7-specific file.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
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There's no good reason for recompiling it
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
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Skylake changes the representation of shared local memory size:
Size | 0 kB | 1 kB | 2 kB | 4 kB | 8 kB | 16 kB | 32 kB | 64 kB |
-------------------------------------------------------------------
Gen7-8 | 0 | none | none | 1 | 2 | 4 | 8 | 16 |
-------------------------------------------------------------------
Gen9+ | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
The old formula would substantially underallocate the amount of space.
This fixes GPU hangs on Skylake when running with full thread counts.
v2: Fix the Vulkan driver too, use a helper function, and fix the table
in the comments and commit message.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
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This is more consistent with gen8+
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
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The cross thread constant support appears on Haswell. It allows us to
upload a set of uniform data for all threads without duplicating it
per thread.
We also support per-thread data which allows us to store a per-thread
ID in one of the uniforms that can be used to calculate the
gl_LocalInvocationIndex and gl_LocalInvocationID variables.
v4:
* Support the old local ID push constant layout as well (Jason)
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
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Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
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This is in contrast to emitting it directly in vkCmdPipelineBarrier. This
has a couple of advantages. First, it means that no matter how many
vkCmdPipelineBarrier calls the application strings together it gets one or
two PIPE_CONTROLs. Second, it allow us to better track when we need to do
stalls because we can flag when a flush has happened and we need a stall.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
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This was introduced in 8a80af282091e692da7bf4e412918ba2362dfb4f.
Reported-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
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Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
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We also have this barrier call for gen8 vkCmdWaitEvents.
We don't implement waiting on events for gen7 yet, but this barrier at
least helps to not regress CTS cases when data caching is enabled.
Without this, the tests would intermittently report a failure when the
data cache was enabled.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
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This makes several checks easier and allows us to avoid calling
anv_format_for_vk_format in a number of cases.
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Mark variables MAYBE_UNUSED to avoid unused-but-set-variable warnings
in release build.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
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Acked-by: Kristian Høgsberg <krh@bitplanet.net>
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Acked-by: Kristian Høgsberg <krh@bitplanet.net>
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Users should never provide a scissor or viewport count of 0 because
they are required to set such state in a graphics pipeline. This
behavior was previously only used in Meta, which actually just
disables those hardware operations at pipeline creation time.
Kristian noticed that the current assignment of viewport count
reduces the number of viewport uploads, so it is not removed.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
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Port 10d84ba9f084174a1e8e7639dfb05dd855ba86e8 to anv.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
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Port 0aa4f99f562a05880a779707cbcd46be459863bf to anv.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
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The programming of the L3 Cache registers should match the previous
manually packed LRI values.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
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Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
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We have to keep it there for the cache to work, so let's not have an
extra copy in struct anv_pipeline too.
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The hardware docs say that StencilBufferWriteEnable should only be set if
StencilTestEnable is set. It seems reasonable to set them together.
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Now it's all consistent with gen9
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Port 1983003 to gen7.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
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It was a bad idea.
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