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path: root/src/mesa/drivers/dri/i965/brw_context.h
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* meta: Don't use integer handles for shaders or programs.Kenneth Graunke2016-03-161-1/+1
* i965/chv: Display proper brandingBen Widawsky2016-03-111-1/+2
* i965/formatquery: Respond queries SAMPLES and NUM_SAMPLE_COUNTSEduardo Lima Mitev2016-03-031-2/+0
* i965: Move brw_query_samples_for_format() to brw_queryformat.cEduardo Lima Mitev2016-03-031-0/+2
* i965: Add boilerplate function for QueryInternalFormat driver hookEduardo Lima Mitev2016-03-031-0/+5
* i965/meta: Return struct gl_renderbuffer* from brw_get_rb_for_slice instead o...Ian Romanick2016-02-101-3/+4
* i965: Use constant pointer when checking for compressionTopi Pohjolainen2016-02-101-1/+1
* i965: Implement a drirc workaround for broken dual color blending.Kenneth Graunke2016-01-221-0/+1
* i965: Implement compute sampler state atom.Francisco Jerez2016-01-191-1/+1
* i965: Add state bit to trigger re-emission of color calculator state.Francisco Jerez2016-01-141-0/+2
* i965: Add support for gl_DrawIDARB and enable extensionKristian Høgsberg Kristensen2015-12-291-0/+9
* i965: Add support for gl_BaseVertexARB and gl_BaseInstanceARBKristian Høgsberg Kristensen2015-12-291-2/+7
* i965: Upload HS push constants whenever default tess. levels change.Kenneth Graunke2015-12-221-0/+2
* i965: Consolidate BRW_NEW_TESS_{CTRL,EVAL}_PROGRAM flags.Kenneth Graunke2015-12-221-4/+2
* i965: Add tessellation control shaders.Kenneth Graunke2015-12-221-0/+6
* i965: Add tessellation evaluation shadersKenneth Graunke2015-12-221-0/+6
* i965: Allocate URB space for HS and DS stages when required.Chris Forbes2015-12-151-2/+19
* i965: Add tessellation shader push constant support.Kenneth Graunke2015-12-111-1/+1
* i965: Add tessellation shader sampler support.Kenneth Graunke2015-12-111-1/+1
* i965: Add tessellation shader surface support.Kenneth Graunke2015-12-111-1/+5
* i965: Document inconsistent units the URB size is represented in.Francisco Jerez2015-12-091-1/+7
* i965: Hook up L3 partitioning state atom.Francisco Jerez2015-12-091-2/+2
* i965: Implement L3 state atom.Francisco Jerez2015-12-091-0/+6
* i965: Define state flag to signal that the URB size has been altered.Francisco Jerez2015-12-091-0/+2
* i965: Keep track of whether LRI is allowed in the context struct.Francisco Jerez2015-12-091-0/+5
* i965/state: Get rid of dword_pitch arguments to buffer functionsJason Ekstrand2015-12-071-6/+3
* i965: Add state bits for tess stagesChris Forbes2015-12-071-0/+10
* i965: Add backend structures for tess stagesChris Forbes2015-12-071-0/+44
* i965: Create new files for HS/DS/TE state upload code.Kenneth Graunke2015-12-071-1/+1
* i965: De-duplicate key_debug() function.Kenneth Graunke2015-12-021-0/+10
* i965: Increase BRW_MAX_UBO to 14.Kenneth Graunke2015-12-011-1/+1
* i965: Clean up #includes in the compiler.Matt Turner2015-11-241-6/+0
* i965: Add lossless compression to surface format tableBen Widawsky2015-11-201-0/+2
* i965: Add INTEL_DEBUG=shader_time support for tessellation shaders.Kenneth Graunke2015-11-171-0/+2
* i965: Combine BRW_NEW_*_BINDING_TABLE dirty bits.Kenneth Graunke2015-11-111-6/+2
* i965: Setup pull constant state for compute programsJordan Justen2015-11-011-1/+1
* i965: remove cache_aux_free_func arrayEmil Velikov2015-10-281-5/+0
* glsl: keep track of intra-stage indices for atomicsTimothy Arceri2015-10-271-1/+1
* i965/vec4: print predicate control at brw_vec4 dump_instructionAlejandro Piñeiro2015-10-221-0/+1
* i965: Move the entire compiler API into a single fileJason Ekstrand2015-10-191-355/+1
* i965: Adapt SSBOs to work with their own separate index spaceIago Toral Quiroga2015-10-141-3/+1
* i965/gs: Make MAX_GS_INPUT_VERTICES a #define in brw_context.h.Kenneth Graunke2015-10-101-0/+2
* i965/vs: Unify URB entry size/read length calculations between backends.Kenneth Graunke2015-10-101-0/+2
* i965: Use util_next_power_of_two() for brw_get_scratch_size()Kristian Høgsberg Kristensen2015-10-081-1/+6
* i965/cs: Split out helper for building local id payloadKristian Høgsberg Kristensen2015-10-081-0/+1
* i965: add EXT_polygon_offset_clamp support to gen4/gen5Ilia Mirkin2015-10-051-0/+2
* i965: Assert on the number of combined UBO and SSBO binding table entriesIago Toral Quiroga2015-10-051-0/+3
* i965: Reserve binding table space for SSBO surfacesIago Toral Quiroga2015-10-051-0/+1
* i965: Define BRW_MAX_SSBOIago Toral Quiroga2015-10-051-0/+3
* i965: Define BRW_MAX_UBOIago Toral Quiroga2015-10-051-1/+4
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