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* intel: s/brw_device_info/gen_device_info/Jason Ekstrand2016-09-031-25/+25
| | | | | | | | | | | | | Generated by: sed -i -e 's/brw_device_info/gen_device_info/g' src/intel/**/*.c sed -i -e 's/brw_device_info/gen_device_info/g' src/intel/**/*.h sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.c sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.cpp sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.h Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965: Pass devinfo pointer to is_3src() helpers.Francisco Jerez2016-05-031-2/+3
| | | | | | | | | | | | | | This is not strictly required for the following changes because none of the three-source opcodes we support at the moment in the compiler back-end has been removed or redefined, but that's likely to change in the future. In any case having hardware instructions specified as a pair of hardware device and opcode number explicitly in all cases will simplify the opcode look-up interface introduced in a subsequent commit, since the opcode number alone is in general ambiguous. Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Consolidate is_3src() functions.Matt Turner2015-11-121-7/+0
| | | | Otherwise I'll have to add another later in this series.
* i965: Add INTEL_DEBUG=nocompact to disable instruction compaction.Matt Turner2015-10-291-0/+3
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Add mask_control_ex field and handle it in compaction.Matt Turner2015-10-211-0/+4
| | | | | | | | Documentation is sparse, but it appears to have existed on G45 and ILK as a second bit extension of the mask_control field. Setting the pair of bits to 0b11 enables "NoCMask". Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
* i965: Compact acc_wr_control only on Gen6+.Matt Turner2015-10-211-2/+8
| | | | | | | | It only exists on Gen6+, and the next patches will add compaction support for the (unused) field in the same location on earlier platforms. Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
* i965: Add devinfo parameter to brw_compact_inst_* funcs.Matt Turner2015-10-211-46/+72
| | | | | | | | | The next commit will add assertions dependent on devinfo->gen. Use compact()/uncompact() macros where possible, like the 3-src code does. Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
* i965: Resolve GCC sign-compare warning.Rhys Kidd2015-09-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mesa/src/mesa/drivers/dri/i965/brw_eu_compact.c: In function 'set_3src_control_index': mesa/src/mesa/drivers/dri/i965/brw_eu_compact.c:805:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int i = 0; i < ARRAY_SIZE(gen8_3src_control_index_table); i++) { ^ mesa/src/mesa/drivers/dri/i965/brw_eu_compact.c: In function 'set_3src_source_index': mesa/src/mesa/drivers/dri/i965/brw_eu_compact.c:839:22: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int i = 0; i < ARRAY_SIZE(gen8_3src_source_index_table); i++) { ^ mesa/src/mesa/drivers/dri/i965/brw_state_dump.c: In function 'dump_sampler_state': mesa/src/mesa/drivers/dri/i965/brw_state_dump.c:382:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (i = 0; i < size / 16; i++) { ^ mesa/src/mesa/drivers/dri/i965/brw_state_upload.c: In function 'brw_pipeline_state_finished': mesa/src/mesa/drivers/dri/i965/brw_state_upload.c:801:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] if (i != pipeline) { ^ mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c: In function 'intel_gen7_hiz_buf_create': mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c:1544:47: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int level = mt->first_level; level <= mt->last_level; ++level) { ^ mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c: In function 'intel_gen8_hiz_buf_create': mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c:1638:44: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int level = mt->first_level; level <= mt->last_level; ++level) { ^ mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c: In function 'intel_miptree_alloc_hiz': mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c:1771:44: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int level = mt->first_level; level <= mt->last_level; ++level) { ^ mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c:1775:33: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (int layer = 0; layer < mt->level[level].depth; ++layer) { ^ Signed-off-by: Rhys Kidd <rhyskidd@gmail.com> Reviewed-by: Thomas Helland <thomashelland90@gmail.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
* i965: Disable compaction for EOT send messagesBen Widawsky2015-05-291-0/+6
| | | | | | | | | | | | | | | | | | | | | | AFAICT, there is no real way to make sure a send message with EOT is properly ignored from compact, nor can I see a way to actually encode EOT while compacting. Before the single send optimization we'd always bail because we hit the is_immediate && !is_compactable_immediate case. However, with single send, is_immediate is not true, and so we end up trying to compact the un-compactible. Without this, any compacting single send instruction will hang because the EOT isn't there. I am not sure how I didn't hit this when I originally enabled the optimization. I didn't check if some surrounding code changed. I know Neil and Matt were both looking into this. I did a quick search and didn't see any patches out there to handle this. Please ignore if this has already been sent by someone. (Direct me to it and I will review it). Reported-by: Neil Roberts <neil@linux.intel.com> Reported-by: Mark Janes <mark.a.janes@intel.com> Tested-by: Mark Janes <mark.a.janes@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Remove end-of-thread SEND alignment code.Matt Turner2015-05-051-12/+3
| | | | | | | This was present in Eric's initial implementation of the compaction code for Sandybridge (commit 077d01b6). There is no documentation saying this is necessary, and removing it causes no regressions in piglit on any platform.
* i965: Rename brw_compile to brw_codegenJason Ekstrand2015-04-221-1/+1
| | | | | | | | | | | | This name better matches what it's actually used for. The patch was generated with the following command: for file in *; do sed -i -e s/brw_compile/brw_codegen/g $file done Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Remove the context field from brw_compilerJason Ekstrand2015-04-221-2/+2
| | | | Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Make the disassembler take a device_info instead of a contextJason Ekstrand2015-04-221-6/+5
| | | | Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Make instruction compaction take a device_info instead of a contextJason Ekstrand2015-04-221-100/+103
| | | | Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Make the brw_inst helpers take a device_info instead of a contextJason Ekstrand2015-04-221-57/+66
| | | | Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Don't compact instructions with unmapped bits.Francisco Jerez2015-02-191-0/+53
| | | | | | | | | | | | | | | | | Some instruction bits don't have a mapping defined to any compacted instruction field. If they're ever set and we end up compacting the instruction they will be forced to zero. Avoid using compaction in such cases. v2: Align multiple lines of an expression to the same column. Change conditional compaction of 3-source instructions to an assertion. (Matt) v3: The 3-source instruction bit 105 is part of SourceIndex on CHV. Add assertion that reserved bit 7 is not set. (Matt) Document overlap with UIP and 64-bit immediate fields. v4: Make some more unmapped bit checks assertions. (Matt) Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Initialize compaction tables once per process.Matt Turner2014-12-011-0/+5
| | | | Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965: Update compaction code to handle Skylake like Cherryview.Kenneth Graunke2014-11-031-4/+4
| | | | | | | | | Matt requested this in review feedback on the original patch, which I completely missed when pushing this series. Kristian also made this change, but I grabbed the wrong version of the patch. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965/skl: Init instructions compaction tables for SKLKristian Høgsberg2014-11-031-0/+1
| | | | | | | They are the same as for BDW, so just add a case for SKL to the init switch. Signed-off-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* Revert "i965/compaction: Disable compaction on SNB temporarily."Matt Turner2014-10-291-6/+0
| | | | | | | | This reverts commit cabc93c5adc9ea62be901621eff5ce4cb9574791. Mark thinks the failures on the SNB GT2 in the lab are actually because of faulty hardware, not instruction compaction. The GT1 didn't see any problems after changes to the compaction code.
* i965/compaction: Disable compaction on SNB temporarily.Matt Turner2014-10-031-0/+6
| | | | Will investigate after XDC.
* i965/compaction: Move variable declarations to their uses.Matt Turner2014-09-291-5/+4
| | | | Tested-by: Mark Janes <mark.a.janes@intel.com>
* i965/compaction: Simplify jump target code.Matt Turner2014-09-291-26/+18
| | | | | | | | | | | | | | My attempts to clarify the code with _compacted/_uncompacted prefixed variables apparently failed. Hopefully this is clearer. In any case, the previous code wasn't clear enough to gcc to let it optimize division by a power of two into a shift. No problems now. Also, the previous code (in the ADD case) didn't work on 32-bit x86, due to complicated set of interactions best summed up as unsigned division and compiler optimizations. Tested-by: Mark Janes <mark.a.janes@intel.com>
* i965/compaction: Document instruction compaction capabilities.Matt Turner2014-09-251-0/+35
| | | | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* i965/compaction: Support compaction of control flow instructions.Matt Turner2014-09-251-14/+16
| | | | | | | | | | | | We're currently emitting compactable control flow instruction the wrong types, preventing their compaction. The next patch will fix this and actually enable compaction. On chips that cannot compact control flow instructions, attempts to find a match in the datatype table will fail. Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965/compaction: Add support for G45.Matt Turner2014-09-251-15/+24
| | | | | Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965/compaction: Add support for Gen5.Matt Turner2014-09-251-5/+210
| | | | | | Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> Acked-by: Ian Romanick <ian.d.romanick@intel.com>
* i965/compaction: Reduce size of compacted_counts[] array.Matt Turner2014-09-251-22/+37
| | | | | | | | | The array was previously indexed in units of brw_compact_inst (8-bytes), but before compaction all instructions are uncompacted, so every odd element was unused. Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965/compaction: Use sizeof brw_inst/brw_compact_inst.Matt Turner2014-09-251-15/+17
| | | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965/compaction: Increment offset in for loop.Matt Turner2014-09-251-3/+2
| | | | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* i965/compaction: Make src_offset local to the for loop.Matt Turner2014-09-251-8/+4
| | | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965/compaction: Remove unnecessary is-compacted? check.Matt Turner2014-09-251-2/+3
| | | | | | | | Used to pass over previously compacted instructions in this loop, but no longer. No point in checking. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965/compaction: Don't set UIP on ELSE on Gen < 8.Matt Turner2014-09-251-1/+2
| | | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* i965/compaction: Rework 3-src compaction logic.Matt Turner2014-09-251-5/+9
| | | | | | | | | It may be possible to create a contrived example in which a 3-src instruction would have been compacted on Gen < 8. I'd rather not discover it in the wild. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* i965: Fix JIP/UIP calculations.Matt Turner2014-08-221-8/+6
| | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82846 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82929
* i965: Enable instruction compaction on Gen8+.Matt Turner2014-08-181-1/+1
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Add support for compacting 3-src instructions on Gen8.Matt Turner2014-08-181-0/+185
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Add support for compacting 1- and 2-src instructions on Gen8.Matt Turner2014-08-181-13/+35
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965/gen8: Add 3-src instruction compaction tables.Matt Turner2014-08-181-0/+27
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965/gen8: Add instruction compaction tables.Matt Turner2014-08-181-0/+150
| | | | Acked-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Update JIP/UIP compaction code to operate on bytes.Matt Turner2014-08-181-4/+8
| | | | | | | JIP/UIP were previously in units of compacted instructions. On Gen8 they're in units of bytes. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Reverse condition ordering to let us support other gens.Matt Turner2014-08-181-3/+3
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965/eu: Explicitly disable instruction compaction on Broadwell for now.Kenneth Graunke2014-08-101-1/+1
| | | | | | | | | | | | Until now, it's been off implicitly: we never call the compactor function. When we merge the generators, we'll start calling it, so we should make it do nothing. Matt will enable instruction compaction properly later. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Rename intel_asm_printer -> intel_asm_annotation.Matt Turner2014-07-051-1/+1
| | | | | | The #ifndef include guards already said the right thing :) Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Pass brw to brw_try_compact_instruction().Matt Turner2014-06-261-3/+2
| | | | | Signed-off-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Don't set UIP for ENDIF/WHILE.Matt Turner2014-06-261-0/+4
| | | | | | | | | | They don't have a UIP. We used UIP in an array dereference, which never caused problems on Gen < 8, since UIP was a small integer (number of instructions). On Gen 8 UIP is in bytes, so it's large enough that it caused us to read out of bounds of the array. Signed-off-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Replace struct brw_compact_instruction with brw_compact_inst.Matt Turner2014-06-261-25/+17
| | | | | Signed-off-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Convert brw_eu_compact.c to the new brw_compact_inst API.Matt Turner2014-06-261-38/+44
| | | | | Signed-off-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Replace 'struct brw_instruction' with 'brw_inst'.Matt Turner2014-06-261-26/+19
| | | | | | | | Use this an an opportunity to clean up the formatting of some old code (brw_ADD, for instance). Signed-off-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Pass brw rather than gen to brw_disassemble_inst().Matt Turner2014-06-261-2/+2
| | | | | | | We will need it in order to use the new brw_inst API. Signed-off-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
generated by cgit v1.1 at 2024-06-01 05:56:06 +0000