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* i965/hsw: Set integer mode in sampling state for stencil texturingJordan Justen2016-11-241-9/+9
| | | | | | | | | | | | | | | | Fixes: ES31-CTS.functional.texture.border_clamp.formats.depth24_stencil8_sample_stencil.nearest_size_pot ES31-CTS.functional.texture.border_clamp.formats.depth24_stencil8_sample_stencil.nearest_size_npot ES31-CTS.functional.texture.border_clamp.formats.depth32f_stencil8_sample_stencil.nearest_size_pot ES31-CTS.functional.texture.border_clamp.formats.depth32f_stencil8_sample_stencil.nearest_size_npot ES31-CTS.functional.texture.border_clamp.unused_channels.depth24_stencil8_sample_stencil ES31-CTS.functional.texture.border_clamp.unused_channels.depth32f_stencil8_sample_stencil Cc: "13.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 44c5ed02d1b173c061c3188e245d384fd4c0abba)
* i965/hsw: Adjust uploading default color for stencil surfacesJordan Justen2016-08-261-2/+15
| | | | | | | | v2: * has_component (Ken); const bits_per_channel (Topi) Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* i965: Make all atoms to track BRW_NEW_BLORP by defaultKenneth Graunke2016-04-231-0/+6
| | | | Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com
* i965: Don't use CUBE wrap modes for integer formats on IVB/BYT.Kenneth Graunke2016-03-291-1/+5
| | | | | | | | | | | | | | | | There is no linear filtering for integer formats, so we should always be using CLAMP_TO_EDGE mode. Fixes 46 dEQP cases on Ivybridge (which were likely broken by commit 0faf26e6a0a34c3544644852802484f2404cc83e). This workaround doesn't appear to be necessary on any other hardware; I haven't found any documentation mentioning errata in this area. v2: Only apply on Ivybridge/Baytrail to avoid regressing GLES3.1 tests. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v1]
* Revert "i965: Set address rounding bits for GL_NEAREST filtering as well."Kenneth Graunke2016-03-291-6/+3
| | | | | | | This reverts commit 60d6a8989ab44cf47accee6bc692ba6fb98f6a9f. It's pretty sketchy, and apparently regressed a bunch of dEQP tests on Sandybridge.
* i965: Set address rounding bits for GL_NEAREST filtering as well.Kenneth Graunke2016-03-281-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Yuanhan Liu decided these were useful for linear filtering in commit 76669381 (circa 2011). Prior to that, we never set them; it seems he tried to preserve that behavior for nearest filtering. It turns out they're useful for nearest filtering, too: setting these fixes the following dEQP-GLES3 tests: functional.fbo.blit.rect.nearest_consistency_mag functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_x functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_y functional.fbo.blit.rect.nearest_consistency_mag_reverse_dst_x functional.fbo.blit.rect.nearest_consistency_mag_reverse_dst_y functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_dst_x functional.fbo.blit.rect.nearest_consistency_mag_reverse_src_dst_y functional.fbo.blit.rect.nearest_consistency_min functional.fbo.blit.rect.nearest_consistency_min_reverse_src_x functional.fbo.blit.rect.nearest_consistency_min_reverse_src_y functional.fbo.blit.rect.nearest_consistency_min_reverse_dst_x functional.fbo.blit.rect.nearest_consistency_min_reverse_dst_y functional.fbo.blit.rect.nearest_consistency_min_reverse_src_dst_x functional.fbo.blit.rect.nearest_consistency_min_reverse_src_dst_y functional.fbo.blit.rect.nearest_consistency_out_of_bounds_mag functional.fbo.blit.rect.nearest_consistency_out_of_bounds_mag_reverse_src_x functional.fbo.blit.rect.nearest_consistency_out_of_bounds_mag_reverse_src_y functional.fbo.blit.rect.nearest_consistency_out_of_bounds_mag_reverse_dst_x functional.fbo.blit.rect.nearest_consistency_out_of_bounds_mag_reverse_dst_y functional.fbo.blit.rect.nearest_consistency_out_of_bounds_mag_reverse_src_dst_x functional.fbo.blit.rect.nearest_consistency_out_of_bounds_mag_reverse_src_dst_y functional.fbo.blit.rect.nearest_consistency_out_of_bounds_min functional.fbo.blit.rect.nearest_consistency_out_of_bounds_min_reverse_src_x functional.fbo.blit.rect.nearest_consistency_out_of_bounds_min_reverse_src_y functional.fbo.blit.rect.nearest_consistency_out_of_bounds_min_reverse_dst_x functional.fbo.blit.rect.nearest_consistency_out_of_bounds_min_reverse_dst_y functional.fbo.blit.rect.nearest_consistency_out_of_bounds_min_reverse_src_dst_x functional.fbo.blit.rect.nearest_consistency_out_of_bounds_min_reverse_src_dst_y Apparently, BLORP has always set these bits unconditionally. However, setting them unconditionally appears to regress tests using texture projection, 3D samplers, integer formats, and vertex shaders, all in combination, such as: functional.shaders.texture_functions.textureprojlod.isampler3d_vertex Setting them on Gen4-5 appears to regress Piglit's tests/spec/arb_sampler_objects/framebufferblit. Honestly, it looks like the real problem here is a lack of precision. I'm just hacking around problems here (as embarassing as it is). Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965: Always use BRW_TEXCOORDMODE_CUBE when seamless filtering.Kenneth Graunke2016-03-281-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | When using seamless cube map mode and NEAREST filtering, we explicitly overrode the wrap modes to CLAMP_TO_EDGE. This was to implement the following spec text: "If NEAREST filtering is done within a miplevel, always apply apply wrap mode CLAMP_TO_EDGE." However, textureGather() ignores the sampler's filtering mode, and instead returns the four pixels that would be blended by LINEAR filtering. This implies that we should do proper seamless filtering, and include pixels from adjacent cube faces. It turns out that we can simply delete the NEAREST -> CLAMP_TO_EDGE overrides. Normal cube map sampling works by first selecting the face, and then nearest filtering fetches the closest texel. If the nearest texel was on a different face, then that face would have been chosen. So it should always be within the face anyway, which effectively performs CLAMP_TO_EDGE. Fixes 86 dEQP-GLES31.texture.gather.basic.cube.* tests. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Suggested-by: Ian Romanick <idr@freedesktop.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* i965: Implement compute sampler state atom.Francisco Jerez2016-01-191-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes a number of GLES31 CTS failures and hangs on various hardware: ES31-CTS.texture_gather.plain-gather-depth-2d ES31-CTS.texture_gather.plain-gather-depth-2darray ES31-CTS.texture_gather.plain-gather-depth-cube ES31-CTS.texture_gather.offset-gather-depth-2d ES31-CTS.texture_gather.offset-gather-depth-2darray ES31-CTS.layout_binding.sampler2D_layout_binding_texture_ComputeShader ES31-CTS.layout_binding.sampler2DArray_layout_binding_texture_ComputeShader ES31-CTS.explicit_uniform_location.uniform-loc-types-samplers ES31-CTS.compute_shader.resources-texture Some of them were actually passing by luck on some generations even though we weren't uploading sampler state tables explicitly for the compute stage, most likely because they relied on the cached sampler state left from previous rendering to be close enough. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92589 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93312 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93325 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93407 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93725 Reported-by: Marta Lofstedt <marta.lofstedt@intel.com> Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965: Trigger CS state reemission when new sampler state is uploaded.Francisco Jerez2016-01-191-1/+1
| | | | | | | | | | This reuses the NEW_SAMPLER_STATE_TABLE state bit (currently only used on pre-Gen7 hardware) to signal that the sampler state tables have changed in order to make sure that the GPGPU interface descriptor is updated. Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965: Consolidate BRW_NEW_TESS_{CTRL,EVAL}_PROGRAM flags.Kenneth Graunke2015-12-221-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | For several reasons, I don't think it's particularly useful to have separate flags: 1. Most of the time, tessellation shaders are paired, so both will be replaced at the same time. 2. The data layout is tightly coupled. Both need to agree on the number of per-patch slots in the VUE map. Even adding extra TCS outputs that aren't read by the TES will trigger the need for recompiles. 3. The TCS is optional from an API perspective, but required by the hardware whenever tessellation is enabled. So, atoms that deal with the TCS must check brw->tess_eval_program (BRW_NEW_TESS_EVAL_PROGRAM?) rather than brw->tess_ctrl_program to tell whether tessellation is enabled. So, not only is it unlikely to be useful, it's a bit confusing to get right. Simply using one flag for both simplifies this. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965: Add tessellation shader sampler support.Kenneth Graunke2015-12-111-0/+46
| | | | | | | Based on code by Chris Forbes and Fabian Bieler. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* glsl: move half<->float convertion to utilRob Clark2015-10-161-0/+1
| | | | | | | | Needed in NIR too, so move out of mesa/main/imports.c Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Signed-off-by: Rob Clark <robclark@freedesktop.org>
* i965: Remove base miplevel from sampler state.Ben Widawsky2015-09-041-4/+1
| | | | | | | | | | | | Gen9 changes the meaning of this to coarse LOD quality mode. Although that's a desirable thing to be setting, it doesn't match the gen8 behavior and this was unintentional. More importantly, we don't ever use this field. So instead of getting it "wrong" drop it entirely. This is a respin of a patch which only [incorrectly] tried to address gen9. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Use float calculations when double is unnecessary.Matt Turner2015-07-291-2/+2
| | | | | | | | | | | | | | | | | Literals without an f/F suffix are of type double, and implicit conversion rules specify that the float in (float op double) be converted to a double before the operation is performed. I believe float execution was intended (in nearly all cases) or is sufficient (in the case of gen7_urb.c). Removes a lot of float <-> double conversion instructions and replaces many double instructions with float instructions which are cheaper. text data bss dec hex filename 4928659 195160 26192 5150011 4e953b i965_dri.so before 4928315 195152 26192 5149659 4e93db i965_dri.so after Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
* i965: Refactor sampler state setupTopi Pohjolainen2015-04-301-22/+38
| | | | | | | | v2 (Matt): Moved * to the name. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Remove dependency to tex object in default color setupTopi Pohjolainen2015-04-301-11/+11
| | | | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965/state: Don't use brw->state.dirty.brwJordan Justen2015-03-311-1/+1
| | | | | | | | | | | | | | | Now, we only use ctx->NewDriverState. I used this bash & sed command in the i965 directory: for file in *.[ch] *.[ch]pp; do sed -i -e 's/state\.dirty\.brw/ctx.NewDriverState/g' $file done Followed by manual changes to brw_state_upload.c. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Fix integer border color on Haswell.Kenneth Graunke2015-02-091-0/+62
| | | | | | | | | +82 Piglits - 100% of border color tests now pass on Haswell. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> Cc: mesa-stable@lists.freedesktop.org
* i965: Use a gl_color_union for sampler border color.Kenneth Graunke2015-02-091-53/+52
| | | | | | | | | | | This should have no effect, but will make it easier to implement other bug fixes. v2: Eliminate "unsigned one" local; just use the value where necessary. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Cc: mesa-stable@lists.freedesktop.org
* i965: Delete brw_state_flags::cache and related code.Kenneth Graunke2014-12-021-3/+0
| | | | | | | | | It's been merged into brw_state_flags::brw for simplicity and efficiency. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Move CACHE_NEW_SAMPLER to BRW_NEW_SAMPLER_STATE_TABLE.Kenneth Graunke2014-11-291-1/+1
| | | | | | | | | | | | | | | | | | | This flag signifies that we've emitted a new SAMPLER_STATE table. Given that we haven't cached those in years, CACHE_NEW_SAMPLER isn't a great name. Putting it in the BRW_NEW_* hierarchy would make more sense; BRW_NEW_SAMPLER_STATE_TABLE better reflects its actual purpose. When this flag is raised, the pointer to the SAMPLER_STATE table has changed, so we need to re-issue any packets which point to it (unit state on Gen4-5, 3DSTATE_SAMPLER_STATE_POINTERS on Gen6, and the per-stage variants on Gen7+). Saves 2 * sizeof(void *) bytes per context, as we remove useless aux_compare/aux_free function pointers. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Skip uploading border color when unnecessary.Kenneth Graunke2014-10-091-2/+20
| | | | | | | | | | | | | | The border color is only needed when using the GL_CLAMP_TO_BORDER or (deprecated) GL_CLAMP wrap modes; all others ignore it, including the common GL_CLAMP_TO_EDGE and GL_REPEAT wrap modes. In those cases, we can skip uploading it entirely, saving a bit of space in the batchbuffer. Instead, we just point it at the start of the batch (offset 0); we have to program something, and that address is safe to read. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
* i965: Fix spelling of GEN7_SAMPLER_EWA_ANISOTROPIC_ALGORITHMChris Forbes2014-10-011-1/+1
| | | | Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
* Revert 5 i965 patches: 8e27a4d2, 373143ed, c5bdf9be, 6f56e142, 88e3d404Jordan Justen2014-09-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | Reverts * "i965: Modify state upload to allow 2 different sets of state atoms." 8e27a4d2b3e4e74e9a77446bce49607433d86be3 * "i965: Modify dirty bit handling to support 2 pipelines." 373143ed9187c4d4ce1e3c486b5dd0880d18ec8b * "i965: Create a macro for checking a dirty bit." c5bdf9be1eca190417998d548fd140c1eca37a54 Conflicts: src/mesa/drivers/dri/i965/brw_context.h * "i965: Create a macro for setting all dirty bits." 6f56e1424d923fd80c84090fbf4506c9eaaffea1 Conflicts: src/mesa/drivers/dri/i965/brw_blorp.cpp src/mesa/drivers/dri/i965/brw_state_cache.c src/mesa/drivers/dri/i965/brw_state_upload.c * "i965: Create a macro for setting a dirty bit." 88e3d404dad009d8cff5124cf8acee7daeaceb64 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
* i965: Create a macro for setting a dirty bit.Paul Berry2014-09-011-1/+1
| | | | | | | This will make it easier to extend dirty bit handling to support compute shaders. Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965: Mark branch unreachable in sampler state code.Matt Turner2014-08-111-1/+1
| | | | | | Silences some uninitialized variable warnings. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Make some brw_sampler_state.c functions static again.Kenneth Graunke2014-08-021-2/+2
| | | | | | | | Now that gen7_sampler_state.c is gone, everything is once again in a single file. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Stop using gen7_update_sampler_state; rm gen7_sampler_state.c.Kenneth Graunke2014-08-021-9/+2
| | | | | | | | The code in brw_sampler_state.c now handles all generations; we don't need the extra Gen7+ only code anymore. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Make brw_update_sampler_state use 8 bits for LOD fields on Gen7+.Kenneth Graunke2014-08-021-3/+4
| | | | | | | | | This was the only actual difference between Gen4-6 and Gen7+ in terms of the values we program. The rest was just mechanical structure rearrangement. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Make brw_update_sampler_state() use brw_emit_sampler_state().Kenneth Graunke2014-08-021-119/+92
| | | | | | | | | | | | | | Instead of stuffing bits directly into the brw_sampler_state structure, we now store them in local variables, then use brw_emit_sampler_state() to assemble the packet. This separates the decision about what values to use from the actual packet emission, which makes the code more reusable across generations. v2: Put const on a bunch of local variables and move declarations, as suggested by Topi Pohjolainen. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Introduce a function to emit a SAMPLER_STATE structure.Kenneth Graunke2014-08-021-0/+75
| | | | | | | | | | | | This simply assembles all the SAMPLER_STATE fields into their proper bit locations. Making it work on all generations was easy enough; some of the fields are even in the same place. Not used by anything yet, but will be soon. I made it non-static so BLORP can use it too. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Add const to upload_default_color's sampler parameter.Kenneth Graunke2014-08-021-1/+1
| | | | | | | | It doesn't edit the value, and this lets us use const in more places. Needed to implement Topi's review comments for the next patch. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Delete gen7_upload_sampler_state_table and vtable mechanism.Kenneth Graunke2014-08-021-10/+3
| | | | | | | | | | | brw_upload_sampler_state_table now handles all generations, so we don't need the vtable mechanism either. There's still a lot of code duplication; the next patches will address that. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Make brw_upload_sampler_state_table handle Gen7+ as well.Kenneth Graunke2014-08-021-4/+45
| | | | | | | | | | | | | | | | This copies a few changes from gen7_upload_sampler_state_table; the next patch will delete that function. Gen7+ has per-stage sampler state pointer update packets, so we emit them as soon as we emit a new table for a stage. On Gen6 and earlier, we have a single packet, so we delay until we've changed everything that's going to be changed. v2: Split 3DSTATE_SAMPLER_STATE_POINTERS_XS packet emission into a helper function (suggested by Topi Pohjolainen). Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Shift brw_upload_sampler_state_table away from structures.Kenneth Graunke2014-08-021-8/+15
| | | | | | | | | | | | The Gen4-6 and Gen7+ code is virtually identical, but both use different structure types. Switching to use a uint32_t pointer and operate on the number of DWords will make it possible to share code. It turns out that SURFACE_STATE is the same number of DWords on every platform currently; it will be easy to handle a change there, though. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Push computation for sampler state batch offsets up a level.Kenneth Graunke2014-08-021-10/+12
| | | | | | | | | | | | Other than this, brw_update_sampler_state only deals with a single SAMPLER_STATE structure, and doesn't need to know which position it is in the table. The caller takes care of dealing with multiple surface states. Pushing this up a level allows us to drop the ss_index parameter. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Stop storing sdc_offset in brw_stage_state.Kenneth Graunke2014-08-021-9/+8
| | | | | | | | | | | | sdc_offset is produced and consumed in the same function, so there's no need to store it in the context, nor pass pointers to it through various call chains. Saves 128 bytes per brw_stage_state structure, and makes the code clearer as well. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Drop the degenerate brw_sampler_default_color structure.Kenneth Graunke2014-08-021-6/+3
| | | | | | | | | It's just an array of four floats, and we have an array of four floats, so this is literally just a memcpy...but with custom structs and strange macros to give the appearance of doing something more. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Write a better file comment for brw_sampler_state.c.Kenneth Graunke2014-08-021-7/+6
| | | | | | | The old one has been inaccurate for years. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Rename brw_wm_sampler_state.c to brw_sampler_state.c.Kenneth Graunke2014-08-021-0/+479
When the driver was originally written, it only supported texturing in the pixel shader backend; vertex and geometry shader texturing came much later. Originally, the pixel shader was referred to as "WM" (the Windowizer/Masker unit). So, this code happened to only be relevant for the WM stage, at the time. However, sampler state really applies to all stages, so putting "wm" in the filename doesn't make sense. I dropped it in gen7_sampler_state.c; at this point the asymmetry just trips people up. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
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