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* i965: Start adding support for the Sandybridge CC unit.Eric Anholt2010-02-251-0/+1
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* Replace the _mesa_*printf() wrappers with the plain libc versionsKristian Høgsberg2010-02-191-5/+5
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* Replace _mesa_malloc, _mesa_calloc and _mesa_free with plain libc versionsKristian Høgsberg2010-02-191-5/+5
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* i965: Remove unnecessary headers.Vinson Lee2010-02-121-8/+0
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* i965: Improve the hashing of brw_state_cache keys to include the cache_id.Eric Anholt2010-01-191-32/+54
| | | | No measurable difference on cairoperf.
* i965: Allow for variable-sized auxdata in the state cache.Eric Anholt2010-01-191-102/+56
| | | | | | Everything has been constant-sized until now, but constant buffer handling changes will make us want some additional variable sized array.
* i965: Remove an unused cache_item field.Eric Anholt2009-11-131-1/+0
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* i965: Always pass the size argument to brw_cache_data.Eric Anholt2009-11-061-45/+14
| | | | | This keeps the individual state files from having to export their structures for brw_state_cache initialization.
* i965: Use bo_references for the state cache delete function.Eric Anholt2009-10-081-17/+3
| | | | This appears to shave about 3% off the CPU usage in cairo-gl for firefox.
* i965: Fix massive memory allocation for streaming texture usage.Eric Anholt2009-09-301-0/+49
| | | | | | | | | | | | Once we've freed a miptree, we won't see any more state cache requests that would hit the things that pointed at it until we've let the miptree get released back into the BO cache to be reused. By leaving those surface state and binding table pointers that pointed at it around, we would end up with up to (500 * texture size) in memory uselessly consumed by the state cache. Bug #20057 Bug #23530
* i965: improve debug loggingRobert Ellison2009-05-081-0/+6
| | | | | | | | | | | | | | | | Looking for memory leaks that were causing crashes in my environment in a situation where valgrind would not work, I ended up improving the i965 debug traces so I could better see where the memory was being allocated and where it was going, in the regions and miptrees code, and in the state caches. These traces were specific enough that external scripts could determine what elements were not being released, and where the memory leaks were. I also ended up creating my own backtrace code in intel_regions.c, to determine exactly where regions were being allocated and for what, since valgrind wasn't working. Because it was useful, I left it in, but disabled and compiled out. It can be activated by changing a flag at the top of the file.
* i965: remove old code to init surface-related cache IDsBrian Paul2009-04-221-14/+0
| | | | These types are only found in the new surface state cache now.
* i965: comments, reformattingBrian Paul2009-04-221-17/+38
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* i965: checkpoint commit: use two state caches instead of oneBrian Paul2009-04-221-40/+82
| | | | | | | The new, second cache will only be used for surface-related items. Since we can create many surfaces the original, single cache could get filled quickly. When we cleared it, we had to regenerate shaders, etc. With two caches, we can avoid doing that.
* intel: Fix a number of memory leaks on context destroy.Eric Anholt2008-09-261-2/+3
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* mesa: added "main/" prefix to includes, remove some -I paths from ↵Brian Paul2008-09-181-1/+1
| | | | Makefile.template
* Revert "Revert "Merge branch 'drm-gem'""Dave Airlie2008-08-241-4/+1
| | | | This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
* Revert "Merge branch 'drm-gem'"Dave Airlie2008-08-241-1/+4
| | | | | | | | This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03. Conflicts: src/mesa/drivers/dri/i965/brw_wm_surface_state.c
* [intel] Convert drivers to using libdrm bufmgr code.Eric Anholt2008-06-031-4/+1
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* [965] Fix massively broken state cache dirty flagging.Michal Wajdeczko2008-03-261-2/+6
| | | | | It was flagging a last_bo update even when last_bo didn't change, but another part was failing to update last_bo when it should have.
* [965] Remove stale brw_state_cache.c comment and function export.Eric Anholt2008-02-121-32/+12
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* [965] Do a little bit rotation in state hash to reduce collisions.Eric Anholt2008-01-181-2/+16
| | | | This was around 3% improvement in OA.
* [965] Improve performance by including reloc target buffer pointers in keys.Eric Anholt2008-01-021-4/+11
| | | | | Without this, the WM binding tables would all collide, for example. Improves openarena performance by around 2%.
* [965] Replace the state cache suballocator with direct dri_bufmgr use.Eric Anholt2007-12-141-239/+301
| | | | | | | | | | | | | | | | | | | | | | | The user-space suballocator that was used avoided relocation computations by using the general and surface state base registers and allocating those types of buffers out of pools built on top of single buffer objects. It also avoided calls into the buffer manager for these small state allocations, since only one buffer object was being used. However, the buffer allocation cost appears to be low, and with relocation caching, computing relocations for buffers is essentially free. Additionally, implementing the suballocator required a don't-fence-subdata flag to disable waiting on buffer maps so that writing new data didn't block on rendering using old data, and careful handling when mapping to update old data (which we need to do for unavoidable relocations with FBOs). More importantly, when the suballocator filled, it had no replacement algorithm and just threw out all of the contents and forced them to be recomputed, which is a significant cost. This is the first step, which just changes the buffer type, but doesn't yet improve the hash table to not result in full recompute on overflow. Because the buffers are all allocated out of the general buffer allocator, we can no longer use the general/surface state bases to avoid relocations, and they are set to 0 instead.
* [965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt2007-12-071-6/+1
| | | | | | | | | | | | | This is currently believed to work but be a significant performance loss. Performance recovery should be soon to follow. The dri_bo_fake_disable_backing_store() call was added to allow backing store disable like bufmgr_fake.c did, which is a significant performance win (though it's missing the no-fence-subdata part). This commit is a squash merge of the 965-ttm branch, which had some history I wanted to avoid pulling due to noisiness and brokenness at many points for git-bisecting.
* [965] Replace various alignment code with a shared ALIGN() macro.Eric Anholt2007-10-041-1/+1
| | | | | | | | In the process, fix some alignment issues: - Scratch space allocation was aligned into units of 1KB, while the allocation wanted units of bytes, so we never allocated enough space for scratch. - GRF register count was programmed as ALIGN(val - 1, 16) / 16 instead of ALIGN(val, 16) / 16 - 1, which overcounted for val != 16n+1.
* [965] Remove AUB file support.Eric Anholt2007-09-271-50/+28
| | | | | This code existed to dump logs of hardware access to be replayed in simulation. Since we have real hardware now, it's not really needed.
* Add Intel i965G/Q DRI driver.Eric Anholt2006-08-091-0/+469
This driver comes from Tungsten Graphics, with a few further modifications by Intel.
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