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path: root/src/mesa/drivers/dri/i965/gen6_gs_visitor.cpp
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* i965/gen6/gs: Replace V-immediate with VF-immediate.Matt Turner2016-03-021-5/+5
| | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net>
* i965: Clean up #includes in the compiler.Matt Turner2015-11-241-0/+1
| | | | Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* i965/vec4: Replace src_reg(imm) constructors with brw_imm_*().Matt Turner2015-11-191-38/+40
| | | | | | | Cuts 1.5k of .text. Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965/gs: Pull prog_data out of brw_gs_compileJason Ekstrand2015-10-211-23/+16
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965/gs: Use NIR instead of the brw_geometry_program for GS metadataJason Ekstrand2015-10-211-6/+6
| | | | | | With this, we can remove the geometry program from brw_gs_compile. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965/gs: Make MAX_GS_INPUT_VERTICES a #define in brw_context.h.Kenneth Graunke2015-10-101-2/+0
| | | | | | | | For scalar VS, I'll need this in brw_fs.cpp as well. It seems silly to redeclare it in three places. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965/gs/gen6: Maximum allowed size of SEND messages is 15 (4 bits)Iago Toral Quiroga2015-10-081-12/+18
| | | | | | | Comit d48ac9306619 addressed this for VS, but we forgot to do the same for URB writes generated by the gen6 GS. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Move binding table setup to codegen time.Jason Ekstrand2015-10-021-11/+0
| | | | | | | | | Setting up binding tables really has little to do with the actual process of turning shaders into instructions; it's more part of setting up prog_data. This commit moves it out of the visitors and with the rest of the prog_data setup stuff. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965/shader: Pull assign_common_binding_table_offsets out of backend_shaderJason Ekstrand2015-10-021-1/+3
| | | | | | | This really has nothing to do with the backend compiler and we'd like to eventually be able to set this up earlier in the compile process. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965/vec4: Delete the old ir_visitor codeJason Ekstrand2015-10-021-30/+1
| | | | Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965/gs: Fix extra level of indentation left by the previous commit.Kenneth Graunke2015-09-231-52/+50
| | | | | | | | I left a bunch of code indented a level in the previous patch to make the diff easier to read. But now we should fix that. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965/gs: Use new NIR intrinsics.Kenneth Graunke2015-09-231-11/+17
| | | | | | | | | | | | | | | | | | | By performing the vertex counting in NIR, we're able to elide a ton of useless safety checks around every EmitVertex() call: total instructions in shared programs: 3952 -> 3720 (-5.87%) instructions in affected programs: 3491 -> 3259 (-6.65%) helped: 11 HURT: 0 Improves performance in Gl32GSCloth by 0.671742% +/- 0.142202% (n=621) on Haswell GT3e at 1024x768. This should also make it easier to implement Broadwell's "Static Vertex Count" feature someday. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965/gs/gen6: Refactor ir_emit_vertex and ir_end_primitive for gen6Samuel Iglesias Gonsalvez2015-08-031-1/+12
| | | | | | | | | So the implementation is independent of GLSL IR and the visit methods of the gen6 GS visitor. This way we will be able to reuse that implementation directly from the NIR vec4 backend. Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965/gen6 gs: Convert brw_imm_ud/brw_imm_d to src_regJordan Justen2015-03-101-7/+7
| | | | | | | | | | | | | | Same idea as this patch, only for gen6_gs_visitor: commit 49a938a265f5959c9b558995cc658f80acb6eb18 Author: Jordan Justen <jordan.l.justen@intel.com> Date: Fri Feb 20 12:12:25 2015 -0800 i965/fs: Use fs_reg for CS/VS atomics pixel mask immediate data Suggested-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965/gen6/gs: Don't declare a src_reg with struct.Matt Turner2014-11-241-1/+1
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965/gen6/gs: Fix binding table clash between TF surfaces and textures.Iago Toral Quiroga2014-09-191-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | For gen6 geometry shaders we use the first BRW_MAX_SOL_BINDINGS entries of the binding table for transform feedback surfaces. However, vec4_visitor will setup the binding table so that textures use the same space in the binding table. This is done when calling assign_common_binding_table_offsets(0) as part if its run() method. To fix this clash we add a virtual method to the vec4_visitor hierarchy to assign the binding table offsets, so that we can change this behavior specifically for gen6 geometry shaders by mapping textures right after the first BRW_MAX_SOL_BINDINGS entries. Also, when there is no user-provided geometry shader, we only need to upload the binding table if we have transform feedback, however, in the case of a user-provided geometry shader, we can't only look into transform feedback to make that decision. This fixes multiple piglit tests for textureSize() and texelFetch() when these functions are called from a geometry shader in gen6, like these: bin/textureSize gs sampler2D -fbo -auto bin/texelFetch gs usampler2D -fbo -auto Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965/gen6/gs: Avoid buffering transform feedback varyings twice.Iago Toral Quiroga2014-09-191-101/+80
| | | | | | | | | Currently we buffer transform feedack varyings separately. This patch makes it so that we reuse the values we have already buffered for all the output varyings of the geometry shader instead. Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965/gen6/gs: Buffer PSIZ/flags vertex data in gen6_gs_visitorSamuel Iglesias Gonsalvez2014-09-191-38/+41
| | | | | | | | | | | | | | Since geometry shaders can alter the value of varyings packed in the first output VUE slot (PSIZ), we need to buffer it together with all the other vertex data so we can emit the right value for each vertex when we do the URB writes. This fixes the following piglit test in gen6: tests/spec/glsl-1.50/execution/redeclare-pervertex-out-subset-gs.shader_test Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965/gen6/gs: implement transform feedback support in gen6_gs_visitorSamuel Iglesias Gonsalvez2014-09-191-3/+306
| | | | | | | | | | This takes care of generating code required to handle transform feedback. Notice that transform feedback isn't enabled yet, since that requires additional setups in other parts of the code that will come in later patches. Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965/gen6/gs: Add an additional parameter to the FF_SYNC opcode.Samuel Iglesias Gonsalvez2014-09-191-1/+2
| | | | | | | | | We will use this parameter in later patches to provide information relevant to transform feedback that needs to be set as part of the FF_SYNC message. Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965/gen6/gs: Implement support for gl_PrimitiveIdIn.Iago Toral Quiroga2014-09-191-0/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | For this we will need to move PrimitiveID information, delivered in the thread payload in r0.1, to a separate register (we use GS_OPCODE_SET_PRIMITIVE_ID for this), then map the corresponding varying slot to that register in the setup_payload() method. Notice that we cannot use a virtual register as the destination for the PrimitiveID because we need to map all input attributes to hardware registers in setup_payload(), which happens before virtual registers are mapped to hardware registers. We could work around that issue if we were able to compute the first non-payload register in emit_prolog() and move the PrimitiveID information to that register, but we can't because at that point we still don't know the final number uniforms that will be included in the payload. So, what we do is to place PrimitiveID information in r1, which is always delivered as part of the payload but its only populated with data relevant for transform feedback when we set GEN6_GS_SVBI_PAYLOAD_ENABLE in the 3DSTATE_GS state packet. When we implement transform feedback, we wil make sure to move the value of r1 to another register before we overwrite it with the PrimitiveID. Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965/gen6/gs: Handle the case where a geometry shader emits no output.Iago Toral Quiroga2014-09-191-120/+117
| | | | | | | | | | | | | | | | | | In gen6 we need to end the thread differently depending on whether we have emitted at least one vertex or not. In case we did, the EOT message must always include the COMPLETE flag or else the GPU hangs. If we have not produced any output, however, we can't use the COMPLETE flag. This would lead us to end the program with an ENDIF opcode, which we want to avoid (and actually is not permitted since it hits an assertion), so instead what we do is that we always request a new VUE handle every time we do an URB WRITE, even for the last vertex we emit. With this we make sure that whether we have emitted at least one vertex or none at all we have to finish the thread without writing to the URB, which works for both cases by setting the COMPLETE and UNUSED flags in the EOT message. Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965/gen6/gs: Make sure we complete the last primitive.Iago Toral Quiroga2014-09-191-0/+13
| | | | | | | | | Just in case the GS algorithm does not call EndPrimitive() for the last primitive produced. This is relevant only for non point outputs, since for this we are already setting the PrimEnd flag on each vertex we emit. Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965/gen6/gs: Implement geometry shaders for outputs other than points.Iago Toral Quiroga2014-09-191-7/+65
| | | | | Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965/gen6/gs: Add initial implementation for a gen6 geometry shader visitor.Iago Toral Quiroga2014-09-191-0/+346
Geometry shaders in gen6 are significantly different from gen7+ so it is better to have them implemented in a different file rather than adding gen6 branching paths all over brw_vec4_gs_visitor.cpp. This commit adds an initial implementation that only handles point output, which is the simplest case. Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
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