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* i965: Add norbc debug optionTopi Pohjolainen2016-06-011-0/+1
| | | | | | | | | | | | | | This INTEL_DEBUG option disables lossless compression (also known as render buffer compression). v2: (Matt) Use likely(!lossless_compression_disabled) instead of !likely(lossless_compression_disabled) (Grazvydas) Update docs/envvars.html Cc: "12.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Add do32 debug option.Francisco Jerez2016-05-271-0/+1
| | | | | | | | | | | The do32 INTEL_DEBUG option causes the back-end to try to generate a SIMD32 program when compiling a compute shader regardless of the specified compute shader workgroup size, which will be useful for testing SIMD32 code generation in the most common case in which the workgroup size doesn't exceed the SIMD16 limit so SIMD32 codegen wouldn't be automatically enabled. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* i965: Add debug flag to print out the new L3 state during transitions.Francisco Jerez2015-12-091-0/+1
| | | | | | | Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
* i965: Clean up #includes in the compiler.Matt Turner2015-11-241-1/+0
| | | | Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* util: move brw_env_var_as_boolean() to utilRob Clark2015-11-241-25/+0
| | | | | | | | Kind of a handy function. And I'll want it available outside of i965 for common nir-pass helpers. Signed-off-by: Rob Clark <robclark@freedesktop.org> Reviewed-by: Nicolai Hähnle <nhaehnle@gmail.com>
* i965: Add INTEL_DEBUG=tcs,tes and hs,ds flags for tessellation shaders.Kenneth Graunke2015-11-171-2/+6
| | | | | | | | | | | | | Even though both tessellation shader stages must be used together, I still think it makes sense to add separate debug flags for each stage. It makes it possible to read the TCS/HS, rule out problems, then read the TES/DS separately, without sifting through as much printed text. I decided to add both the GL names (tcs/tes) and hardware names (hs/ds) so they can be used interchangeably. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
* i965: Add INTEL_DEBUG=nocompact to disable instruction compaction.Matt Turner2015-10-291-0/+1
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Add INTEL_DEBUG=hex to print the hex with the disassembly.Matt Turner2015-10-291-0/+1
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Configure bufmgr debug options from intel_screen.cKristian Høgsberg Kristensen2015-10-081-13/+1
| | | | | | | | | | | | | | We need the debug flag parsing and INTEL_DEBUG in the compiler, but we don't want the dependency on bufmgr (libdrm_intel) in there. Move to intel_screen.c. There are now only two lines left in brw_process_intel_debug_variable(), but we keep it in intel_debug.h to avoid having to expose 'debug_control' as a global variable. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Signed-off-by: Kristian Høgsberg Kristensen <krh@bitplanet.net>
* util: Move DRI parse_debug_string() to utilKristian Høgsberg Kristensen2015-10-081-2/+3
| | | | | | | | | | We want to use intel_debug.c in code that doesn't link to dri common. v2: Remove unnecessary stddef.h include (Topi), use util/debug.h in all DRI driver and remove driParseDebugString() (Iago). Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Signed-off-by: Kristian Høgsberg Kristensen <krh@bitplanet.net>
* i965: Add a debug option for spilling everything in vec4 codeIago Toral Quiroga2015-09-041-1/+2
| | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net>
* i965: Rename INTEL_DEBUG=vec4vs to INTEL_DEBUG=vec4.Kenneth Graunke2015-08-271-1/+1
| | | | | | | | | | | | | | | driParseDebugString() doesn't have actual code to parse comma separated lists (or any other supported options?); instead it dumbly uses strstr(). This means that INTEL_DEBUG="vec4vs" will trigger both DEBUG_VEC4VS and DEBUG_VS, as "vs" is also a substring. We should probably improve the driconf parsing, but for now, just rename the option so it's usable in the meantime. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Jason Ekstrand <jason.ekstrand@intel.com> Acked-by: Kristian Høgsberg <krh@bitplanet.net>
* mesa: add tessellation shader enumsFabian Bieler2015-07-231-1/+3
| | | | | | | Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Move INTEL_DEBUG variable parsing to screen creation timeJason Ekstrand2015-06-231-7/+4
| | | | | | v2: Do bufmgr set_debug and set_aub_dump at screen time as well. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Add an INTEL_DEBUG=cs option.Paul Berry2015-05-021-2/+3
| | | | | | | | | At the moment it's not wired up to anything. Later patches will hook it up to the compute shader back-end. Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Add an INTEL_DEBUG=spill option to test spillingJason Ekstrand2015-04-231-0/+1
| | | | | Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Move env_var_as_boolean to intel_debug.c.Kenneth Graunke2015-03-271-0/+25
| | | | | | | I need to use this in brw_vec4.cpp, so it can't be static anymore. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Add a function to translate MESA_SHADER_* into DEBUG_* enums.Kenneth Graunke2015-02-191-0/+13
| | | | | | | | | | | | When compiling, we have a gl_shader_stage (MESA_SHADER_*) enum, and want to know whether debugging is enabled for that stage. This allows us to easily translate it into the corresponding debug flag. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
* i965: Generate vs code using scalar backend for BDW+Kristian Høgsberg2014-12-101-0/+1
| | | | | | | | | | | | | | | | With everything in place, we can now use the scalar backend compiler for vertex shaders on BDW+. We make scalar vertex shaders the default on BDW+ but add a new vec4vs debug option to force the vec4 backend. No piglit regressions. Performance impact is minimal, I see a ~1.5 improvement on the T-Rex GLBenchmark case, but in general it's in the noise. Some of our internal synthetic, vs bounded benchmarks show great improvement, 20%-40% in some cases, but real-world cases are mostly unaffected. Signed-off-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Replace 'noann' debug flag with 'ann'.Matt Turner2014-12-101-1/+1
| | | | | | Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965: Initialize INTEL_DEBUG once per process.Matt Turner2014-12-011-1/+4
| | | | Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965: Restructure debug flagsKristian Høgsberg2014-09-241-30/+30
| | | | | | | | | | | This cleans up the debug flags to be consistently indented, use bit shifting instead of hex-values and fixes a bug where the new DEBUG_NO8 flag used the same value as the DEBUG_VUE flag. This was hidden by the numbers not being aligned. Also removes gaps in the range where DEBUG_IOCTL (0x4) and DEBUG_REGION (0x400) used to be. Signed-off-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
* i965: Add an option to not generate the SIMD8 fragment shaderKristian Høgsberg2014-08-151-0/+1
| | | | | | | | | For now, this can only be triggered with a new 'no8' INTEL_DEBUG option and a new context flag. We'll use the context flag later, but introducing it now lets us bisect to this commit if it breaks something. Signed-off-by: Kristian Høgsberg <krh@bitplanet.net> Acked-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Skip IR annotations with INTEL_DEBUG=noann.Matt Turner2014-06-011-0/+1
| | | | | | | | | Running shader-db with INTEL_DEBUG=noann reduces the runtime from ~90 to ~80 seconds on my machine. It also reduces the disk space consumed by the .out files from 660 MB (676 on disk) to 343 MB (358 on disk). Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Add envvar to debug the optimization passes.Matt Turner2014-06-011-0/+1
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Delete the intel_regions.c code.Eric Anholt2014-05-011-1/+0
| | | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
* i965: Expand INTEL_DEBUG to uint64_t.Matt Turner2014-04-151-1/+1
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* s/Tungsten Graphics/VMware/José Fonseca2014-01-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tungsten Graphics Inc. was acquired by VMware Inc. in 2008. Leaving the old copyright name is creating unnecessary confusion, hence this change. This was the sed script I used: $ cat tg2vmw.sed # Run as: # # git reset --hard HEAD && find include scons src -type f -not -name 'sed*' -print0 | xargs -0 sed -i -f tg2vmw.sed # # Rename copyrights s/Tungsten Gra\(ph\|hp\)ics,\? [iI]nc\.\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./g /Copyright/s/Tungsten Graphics\(,\? [iI]nc\.\)\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./ s/TUNGSTEN GRAPHICS/VMWARE/g # Rename emails s/alanh@tungstengraphics.com/alanh@vmware.com/ s/jens@tungstengraphics.com/jowen@vmware.com/g s/jrfonseca-at-tungstengraphics-dot-com/jfonseca-at-vmware-dot-com/ s/jrfonseca\?@tungstengraphics.com/jfonseca@vmware.com/g s/keithw\?@tungstengraphics.com/keithw@vmware.com/g s/michel@tungstengraphics.com/daenzer@vmware.com/g s/thomas-at-tungstengraphics-dot-com/thellstom-at-vmware-dot-com/ s/zack@tungstengraphics.com/zackr@vmware.com/ # Remove dead links s@Tungsten Graphics (http://www.tungstengraphics.com)@Tungsten Graphics@g # C string src/gallium/state_trackers/vega/api_misc.c s/"Tungsten Graphics, Inc"/"VMware, Inc"/ Reviewed-by: Brian Paul <brianp@vmware.com>
* Revert "drop old INTEL_DEBUG names for `perf` (fall) and `fs` (wm)"Matt Turner2013-11-271-0/+2
| | | | | | | This reverts commit 195994fe4cd851f4aed7fe32697f94c4188a96c8. It wasn't sent to the list, Ken didn't review it, and it breaks shader-db.
* drop old INTEL_DEBUG names for `perf` (fall) and `fs` (wm)Chris Forbes2013-11-251-2/+0
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: remove unused DEBUG_IOCTLChris Forbes2013-11-251-1/+0
| | | | | Signed-off-by: Chris Forbes <chrisf@ijw.co.nz> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Add INTEL_DEBUG=perfmon support.Kenneth Graunke2013-11-211-0/+1
| | | | | | | This will enable debugging printfs for the AMD_performance_monitor code. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
* i965/gs: If a DUAL_OBJECT gs would spill, fall back to DUAL_INSTANCED.Paul Berry2013-10-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This is similar to what we do for 16-wide vs 8-wide fragment shaders. First we try compiling the geometry shader in DUAL_OBJECT mode. If we can't do that without spilling, we fall back on DUAL_INSTANCED mode, which should require less spilling (since it uses an interleaved layout of payload registers). In an ideal world we'd fall back to SINGLE mode, which would allow us to interleave general-purpose registers too (resulting in even less likelihood of spilling). But at the moment, the vec4 generator and visitor classes don't have the infrastructure to interleave general purpose registers, so DUAL_INSTANCED is the best we can do. As a side benefit this paves the way for implementing instanced geometry shaders (which are incompatible with DUAL_OBJECT mode). Since most geometry shaders used in piglit testing are small, DUAL_INSTANCED mode won't get exercised very much in a normal piglit run. To force DUAL_INSTANCED mode to be used for all geometry shaders, set INTEL_DEBUG=nodualobj. Reviewed-by: Eric Anholt <eric@anholt.net>
* i965: Pull out INTEL_DEBUG handling into new intel_debug.[ch] files.Kenneth Graunke2013-10-131-0/+88
Now that there isn't an intel_context structure, the split between brw_context.[ch] and intel_context.[ch] is rather awkward and arbitrary. Removing intel_context.[ch] seems desirable, but not everything really belongs in brw_context.[ch], either. Moving INTEL_DEBUG handling into separate intel_debug.[ch] files should make them relatively easy to find. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
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