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path: root/src/mesa/drivers/dri/intel/intel_span.c
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* Merge branch 'mesa_7_7_branch'Brian Paul2009-12-111-40/+17
|\ | | | | | | | | | | Conflicts: src/gallium/state_trackers/xorg/xorg_xv.c src/mesa/drivers/dri/intel/intel_span.c
| * intel: Remove ARGB internal_format == GL_RGB hacksIan Romanick2009-12-101-36/+13
| | | | | | | | | | Now that XRGB is supported, we don't need to hack around cases of an RGBA format buffer with an internal format of GL_RGB.
| * intel: Use spantmp2 GL_BGR / GL_UNSIGNED_INT_8_8_8_8_REV for XRGB8888Ian Romanick2009-12-101-1/+1
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| * intel: Axe intel_renderbuffer::texformatIan Romanick2009-12-101-3/+3
| | | | | | | | | | Since the texformat branch merge, the value of intel_renderbuffer::texformat is just a copy of gl_renderbuffer::Format.
* | intel: Remove non-GEM support.Eric Anholt2009-11-191-9/+4
|/ | | | | This really isn't supported at this point. GEM's been in the kernel for a year, and the fake bufmgr never really worked.
* intel: Remove obsolete comment about GEM in the spans code.Eric Anholt2009-11-061-1/+0
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* intel: avoid unnecessary front buffer flushing/updatingBrian Paul2009-11-031-0/+2
| | | | | | | | | | | Before, if we just called glXMakeCurrent() and didn't render anything we'd still trigger a flushFrontBuffer() call. Now only set the intel->front_buffer_dirty field at state validation time just before we draw something. NOTE: additional calls to intel_check_front_buffer_rendering() might be needed if I missed some rendering paths.
* intel: Use GTT mapping when available for swrast.Eric Anholt2009-10-301-1/+72
| | | | | | | This improves piglit quick.tests runtime from 19:33 minutes to 6:06 on my GM45. It should also hide most of the A17 swizzling issues, though they'll still exist when swapping occurs (which is the kernel's problem either way).
* intel: Fix up z24_x8 depth spans since the texformat merge.Eric Anholt2009-10-301-12/+6
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* intel: fix up some XRGB breakageBrian Paul2009-10-301-1/+1
| | | | | We weren't choosing the right XRGB span functions for reading the framebuffer. XRGB formats still aren't turned on yet though.
* intel: update intel_create_renderbuffer(format), add XRGB supportBrian Paul2009-10-291-0/+15
| | | | | | | | Pass a gl_format to intel_create_renderbuffer() instead of GLenum. Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers. However, we don't yet create any renderbuffers or textures with that format. It seems the default alpha value is zero instead of one. Need to investigate that first.
* Merge branch 'texformat-rework'Brian Paul2009-10-281-32/+6
|\ | | | | | | | | | | | | | | | | | | | | | | Conflicts: src/mesa/drivers/dri/radeon/radeon_fbo.c src/mesa/drivers/dri/s3v/s3v_tex.c src/mesa/drivers/dri/s3v/s3v_xmesa.c src/mesa/drivers/dri/trident/trident_context.c src/mesa/main/debug.c src/mesa/main/mipmap.c src/mesa/main/texformat.c src/mesa/main/texgetimage.c
| * intel: use MESA_FORMAT_S8_Z24 format and avoid z24s8/s8z24 conversionsBrian Paul2009-10-211-16/+4
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| * mesa: remove a bunch of gl_renderbuffer fieldsBrian Paul2009-10-081-17/+4
| | | | | | | | | | | | _ActualFormat is replaced by Format (MESA_FORMAT_x). ColorEncoding, ComponentType, RedBits, GreenBits, BlueBits, etc. are all replaced by MESA_FORMAT_x queries.
| * drivers: don't include texformat.hBrian Paul2009-10-051-1/+0
| | | | | | | | And remove other unneeded #includes while we're at it.
| * mesa: replace gl_texture_format with gl_formatBrian Paul2009-09-301-1/+1
| | | | | | | | | | | | Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum. ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x. gl_texture_format will go away next.
* | Merge branch 'mesa_7_6_branch'Brian Paul2009-10-281-0/+6
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: src/mesa/shader/lex.yy.c src/mesa/shader/program_lexer.l
| * | intel: added region draw_x/y offsets in x/y_tile_swizzle() funcsBrian Paul2009-10-271-0/+6
| | | | | | | | | | | | This fixes the second part of bug 23552.
* | | i915: Enable ARB_vertex_shader for both i915 and i830.Eric Anholt2009-10-011-0/+37
| |/ |/| | | | | | | | | Since the TNL is all done in software anyway, it should be the same to the user who's probably using ARB_vertex_program otherwise, but gives them a nicer programming environment.
* | intel: minor code clean-upsBrian Paul2009-09-141-11/+8
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* | intel: fix renderbuffer map/unmap regressionBrian Paul2009-09-141-14/+14
| | | | | | | | | | | | Commit 36dd53a3cded9d003ec418732b7fc93c1476aa9b caused a few regressions because the glReadBuffer() buffer wasn't getting mapped when GL_READ_BUFFER != GL_DRAW_BUFFER.
* | intel: Don't forget to map the depth read buffer in spans.Eric Anholt2009-09-101-22/+28
|/ | | | This broke BlitFramebufferEXT(GL_DEPTH_BUFFER_BIT).
* intel: fix typo: s/softare/software/Brian Paul2009-08-071-2/+2
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* intel: Add support for argb1555, argb4444 FBOs and fix rgb565 fbo readpixels.Eric Anholt2009-04-161-60/+112
| | | | | | Also enable them all regardless of screen bpp, as 32 bpp what I've been testing against, and haven't been able to detect any screen bpp-specific troubles with them.
* intel: Add span code for z24 without stencil.Eric Anholt2009-02-261-2/+22
| | | | | | | | It seems that in this case the Mesa code is handing us x8z24 values instead of z24s8 values, so we need to not do the rotation. Fixes half of OGLconform depthrange.c. Bug #19447.
* intel: make template wrappers for the spans templates.Eric Anholt2009-02-251-187/+48
| | | | | This is insanity, but so is copying the same blocks containing the actual interesting code in the file three times each for the different tile formats.
* intel: fix check for Y orientation in span functions.Brian Paul2009-01-291-4/+4
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* intel: clean up more pf mess.Eric Anholt2009-01-271-6/+3
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* intel: SW fallback maps texture images, not texture coordinatesIan Romanick2009-01-141-2/+2
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* intel: Don't keep intel->pClipRects, and instead just calculate it when needed.Eric Anholt2008-10-281-82/+59
| | | | | | | This avoids issues with dereferencing stale cliprects around intel_draw_buffer time. Additionally, take advantage of cliprects staying constant for FBOs and DRI2, and emit cliprects in the batchbuffer instead of having to flush batch each time they change.
* mesa: added "main/" prefix to includes, remove some -I paths from ↵Brian Paul2008-09-181-4/+4
| | | | Makefile.template
* intel: track move of bo_exec from drivers to bufmgr.Eric Anholt2008-09-101-1/+0
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* Revert "Revert "Merge branch 'drm-gem'""Dave Airlie2008-08-241-135/+541
| | | | This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
* Revert "Merge branch 'drm-gem'"Dave Airlie2008-08-241-541/+135
| | | | | | | | This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03. Conflicts: src/mesa/drivers/dri/i965/brw_wm_surface_state.c
* Merge branch 'drm-gem'Eric Anholt2008-08-081-135/+541
|\ | | | | | | | | | | | | | | | | Conflicts: src/mesa/drivers/dri/intel/intel_span.c src/mesa/main/fbobject.c This converts the i915 driver to use the GEM interfaces for object management.
| * intel: Don't return a renderbuffer with alpha when just GL_RGB is requested.Eric Anholt2008-07-261-0/+64
| | | | | | | | | | Fixes oglconform rbGetterFuncs testcase. The span code for this mode hasn't actually been tested.
| * intel: Add a little span cache to spead up readpixels by cutting syscalls.Eric Anholt2008-07-231-12/+36
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| * intel-gem: Use pread/pwrite for span access.Eric Anholt2008-07-231-161/+111
| | | | | | | | | | This will avoid clflushing entire buffers for small acesses, such as those commonly used by regression tests.
| * intel: move renderbuffer mapping to separate functions.Eric Anholt2008-07-231-52/+51
| | | | | | | | | | | | | | This lets us avoid duplicated code for doing so, including the depthstencil paths that aren't covered by SpanRenderStart/Finish. Those paths were missing the span funcs setup, leading to a null dereference in the fbotexture demo.
| * intel-gem: Disable spantmp sse/mmx functions when tile swizzling.Eric Anholt2008-07-151-0/+4
| | | | | | | | | | | | | | Those functions rely on being able to treat the GET_PTR returned value as an array indexed by x, but that's not the case for our tiling. Bug #16387
| * drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes.Eric Anholt2008-07-111-76/+78
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| * intel: span rendering requires just a flush before starting, not finish.Eric Anholt2008-07-021-1/+1
| | | | | | | | The dri_bo_map()s that follow will take care of idling the hardware as needed.
| * intel-gem: Fix y-tile swizzling for our G965 with swizzle_mode=1.Eric Anholt2008-07-021-0/+10
| | | | | | | | | | Apparently in Y mode we get bit 6 ^ bit 9. The reflect demo in 'd' mode now displays correctly.
| * intel-gem: Fix Y-tiling span setup.Eric Anholt2008-07-021-3/+4
| | | | | | | | | | | | | | | | | | The boolean that the server gives us for whether the region is tiled was getting used as the enum for what tiling mode. Instead, guess the correct tiling in screen setup. Also, fix the Y-tiling pitch setup. The pitch to the next tile in Y is 32 scanlines, not 8.
| * intel-gem: Move bit 6 x tiling swizzle to a driconf option, and add new mode.Eric Anholt2008-07-011-17/+34
| | | | | | | | | | | | It turns out that it's not just deviceID dependent, and there's some additional undefined factor that determines the bit 6 swizzling. It's now controllable with swizzle_mode=[012] until we get a response on how to automatically detect.
| * [intel-gem] Bug #16326: Fix X tile unswizzling on 965.Eric Anholt2008-06-171-0/+26
| | | | | | | | Apparently a bit gets flipped in the addressing for some rows of each tile.
| * [intel-GEM] Add tiling support to swrast.Keith Packard2008-05-061-12/+315
| | | | | | | | | | Accessing tiled surfaces without using the fence registers requires that software deal with the address swizzling itself.
* | dri: Fix write/read depth buffer issue under 16bpp mode. See bug #16646Xiang, Haihao2008-08-051-1/+4
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* i965: fix segfault caused by commit e131c46b20241737ceba4856dbe01dcca6dd2c03.Xiang, Haihao2008-01-101-6/+6
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* Simplify ctx->_NumColorDrawBuffers, _ColorDrawBuffers and fix bug 13835.Brian2008-01-061-15/+12
| | | | | | | | | | | These fields are no longer indexed by shader output. Now, we just have a simple array of renderbuffer pointers. If the shader writes to gl_FragData[i], send those colors to the N _ColorDrawBuffers. Otherwise, replicate the single gl_FragColor (or the fixed-function color) to the N _ColorDrawBuffers. A few more changes and simplifications can follow from this...
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