summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/r300
Commit message (Collapse)AuthorAgeFilesLines
* r300: Corrected a cache flush bug in r300EmitCacheFlush.Oliver McFadden2008-02-251-5/+5
| | | | Corrects commit 74ae5a875d6b3f1ffea2ac09c6ef0062d4980f15.
* r300: Moved the state code into separate functions.Oliver McFadden2008-02-252-91/+106
|
* [r300] revert complete stupid changesChristoph Brill2008-02-251-4/+4
|
* [r300] Document registers completed 10.1 to 10.3Christoph Brill2008-02-251-0/+9
|
* [r300] Add more register from the AMD specChristoph Brill2008-02-252-5/+33
|
* [r300] Document POLY_MODE and add some TODOs that might have triggered some bugsChristoph Brill2008-02-253-22/+34
|
* [r300] Document some registers in the POINT areaChristoph Brill2008-02-251-9/+32
|
* [r300] Further document and add register definitions (found bugs in LINE ↵Christoph Brill2008-02-252-23/+167
| | | | handling)
* [r300] Sync fog color register namesChristoph Brill2008-02-252-6/+12
|
* [r300] Sync fog register names to the AMD specChristoph Brill2008-02-254-21/+24
|
* [r300] Further document FG_ALPHA_FUNC (renamed from R300_PP_ALPHA_TEST) and ↵Christoph Brill2008-02-255-27/+102
| | | | finally add some information to R300_RB3D_DSTCACHE_CTLSTAT
* [r300] Document R300_RB3D_COLORMASK properly and rename it to ↵Christoph Brill2008-02-254-15/+32
| | | | RB3D_COLOR_CHANNEL_MASK
* [r300] Add register definitions based on AMD spec starting with chapter 10Christoph Brill2008-02-251-19/+60
|
* [r300] Add some more register from the AMD spec in the area of AARESOLVEChristoph Brill2008-02-252-9/+24
|
* [r300] Sync the names for Z-Buffer registers with the AMD specChristoph Brill2008-02-254-44/+91
| | | | | This patch tries to get the Z-Buffer register names in sync with the AMD spec so that talking to AMD engineers is much simpler.
* [r300] Add more struct names for r300_hw_stateChristoph Brill2008-02-253-21/+21
|
* [r300] rename all unkown structs r300_hw_state to readable namesChristoph Brill2008-02-254-82/+86
|
* [r300] Add RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD and some HyperZ defintionsChristoph Brill2008-02-252-4/+25
|
* [r300] Replace more magic number by register definitions from AMDChristoph Brill2008-02-252-2/+20
|
* [r300] clean some more magic registers based on AMD specChristoph Brill2008-02-252-10/+146
|
* [r300] Update some magic registers to real namesChristoph Brill2008-02-253-3/+14
|
* [r300] Document Z-buffer related register ZB_BW_CNTLChristoph Brill2008-02-251-0/+42
|
* [r300] document VAP_CNTL based on AMD specChristoph Brill2008-02-251-0/+26
|
* [r300] Document some of the wild guesses in VAP_OUTPUT_VTX_FMT based on AMD specChristoph Brill2008-02-253-9/+12
|
* [r300] document type 3 packets to draw primitives based on AMD specChristoph Brill2008-02-251-2/+40
|
* r300: fixup some more namesDave Airlie2008-02-234-27/+38
|
* r300: some initial register info from doc dropDave Airlie2008-02-233-4/+31
|
* r300: fix isosurf on rs690Dave Airlie2008-02-041-2/+9
|
* Replace gl_framebuffer's _ColorDrawBufferMask with _ColorDrawBufferIndexesBrian2008-01-063-5/+5
| | | | | | | Each array element is now a BUFFER_x token rather than a BUFFER_BIT_x bitmask. The number of active color buffers is specified by _NumColorDrawBuffers. This builds on the previous DrawBuffer changes and will help with drivers implementing GL_ARB_draw_buffers.
* Revert "r300: fix bug with maniadrive rendering"Dave Airlie2008-01-021-13/+13
| | | | | | this is correct, there is another issue with sw fallbacks This reverts commit cc50edbca2fd3111f9987d4117fa6656599d79dc.
* rx00: fix off by one error in tempreg checkHans de Goede2008-01-021-2/+3
|
* r300: fix bug with maniadrive renderingDave Airlie2008-01-021-13/+13
| | | | I've no idea why I added this so I'll have to spend time tracking it down
* Renamed the R300_VAP_UNKNOWN_221C to R300_VAP_CLIP_CNTL.Oliver McFadden2007-11-055-10/+15
|
* r300: initial user clipping for TCL pathsDave Airlie2007-11-054-1/+84
| | | | | I've no idea if this code might break something or how it should interact with vertex shaders, it makes the clip demo work for me
* r300: move more vap registers out of non tcl pathsDave Airlie2007-11-033-14/+16
|
* r300: fix misnumber registerDave Airlie2007-11-031-1/+1
|
* r300: fix texwrap border colorDave Airlie2007-11-031-1/+1
|
* More vblank cleanups.Michel Dänzer2007-10-302-9/+11
| | | | | | | | * Fix crash at context creation in most drivers supporting vblank. * Don't pass vblank sequence or flags to functions that get passed the drawable private already. * Attempt to initialize vblank related drawable private fields just once per drawable. May need more work in some drivers.
* Refactor and fix core vblank supportJesse Barnes2007-10-294-14/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Consolidate support for synchronizing to and retrieving vblank counters. Also fix the core vblank code to return monotonic MSC counters, which are required by some GLX extensions. Adding support for multiple pipes to a low level driver is fairly easy, the Intel 965 driver provides simple example code (see intel_buffers.c:intelWindowMoved()). The new code bumps the media stream counter extension version to 2 and adds a new getDrawableMSC callback. This callback takes a drawablePrivate pointer, which is used to calculate the MSC value seen by clients based on the actual vblank counter(s) returned from the kernel. The new drawable private fields are as follows: - vblSeq - used for tracking vblank counts for buffer swapping - vblFlags - flags (e.g. current pipe), updated by low level driver - msc_base - MSC counter from the last time the current pipe changed - vblank_base - kernel DRM vblank counter from the last time the pipe changed Using the above variables, the core vblank code (in vblank.c) can calculate a monotonic MSC value. The low level DRI drivers are responsible for updating the current pipe (by setting VBLANK_FLAG_SECONDARY for example in vblFlags) along with msc_base and vblank_base whenever the pipe associated with a given drawable changes (again, see intelWindowMoved for an example of this). Drivers should fill in the GetDrawableMSC DriverAPIRec field to point to driDrawableGetMSC32 and add code for pipe switching as outlined above to fully support the new scheme.
* Framework for supporting z24_s8 and z32 depth textures on r300.Ian Romanick2007-10-172-6/+49
|
* Initial support for ARB_depth_textureIan Romanick2007-10-174-2/+77
| | | | | | Currently only GL_DEPTH_COMPONENT16 are supported. I don't know what the hardware bits are to select the other formats, but it shouldn't be too hard to figure out.
* Merge branch 'dri2'Kristian Høgsberg2007-10-121-1/+1
|\ | | | | | | | | | | Conflicts: src/mesa/drivers/dri/i915/intel_screen.c
| * Replace open-coded major, minor, and patch version fields with __DRIversionRec.Kristian Høgsberg2007-10-101-1/+1
| |
* | r300: fragprog tex instruction now take writemask into acount.Jerome Glisse2007-10-071-1/+5
|/
* Fix-up #includes to remove some -I options.Brian2007-09-113-8/+8
| | | | eg: #include "shader/program.h" and remove -I$(TOP)/src/mesa/program
* remove unnecessary null check (bug 11814)Brian2007-08-021-1/+1
|
* Remove ctx->Point._Size and ctx->Line._Width.Brian2007-07-211-4/+5
| | | | | | The clamping for these values depends on whether we're drawing AA or non-AA points, lines. Defer clamping until drawing time. Drivers could compute and keep clamped AA and clamped non-AA values if desired.
* r300: Oops, made a mistake on commit fb4e071beda6e3b9e68a21bbc7649b6c4733c485.Oliver McFadden2007-07-181-2/+2
|
* r300: Cleaned up vertprog construction.Oliver McFadden2007-07-184-369/+383
| | | | | | | | | | | | Construct the vertprog instruction in the 4 DWORD parts... DWORD 0: Opcode and Output. DWORD 1: First Argument. DWORD 2: Second Argument. DWORD 3: Third Argument. Allow the opcode translation functions to generate more than one instruction; useful for when an instruction must be emulated. FLR, XPD, etc.
* r300: Corrected texcoord start when BFC1 is enabled.Tommy Schultz Lassen2007-07-181-1/+1
|
generated by cgit v1.1 at 2024-07-06 18:11:50 +0000