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* meta: Move the meta structures to the meta header.Eric Anholt2014-02-122-283/+283
| | | | | | | | | I'd like to split some of our code to separate files, since 4k lines and growing is pretty unreasonable for all these separate operations. v2: Rebase on idr's changes. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
* meta: Fold the texture setup into setup_copypix_texture().Eric Anholt2014-02-121-11/+9
| | | | | | | | | There was this funny argument passed to setup for "did alloc decide we need to allocate new texture storage?", which goes away if we don't have the caller do alloc as a separate step. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* meta: Drop the src == dst restriction on meta glBlitFramebuffer().Eric Anholt2014-02-121-20/+0
| | | | | | | | | | | | | | From the GL_ARB_fbo spec: If the source and destination buffers are identical, and the source and destination rectangles overlap, the result of the blit operation is undefined. As far as I know, that's the only thing that would have been of concern for this. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* meta: Rename the "sampler" stuff to "blit shader".Eric Anholt2014-02-121-41/+40
| | | | | | | | | While these structs are generated per GLSL sampler type, they're structs of data-about-shaders (notably, the ID of a shader program), not data-about-samplers. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* meta: Drop a now-trivial helper function.Eric Anholt2014-02-121-12/+3
| | | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* meta: Fold the glUseProgram() into the blit program generator.Eric Anholt2014-02-121-22/+8
| | | | | | | | Everyone was just immediately calling it and doing nothing else with the shader program id. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* meta: Simplify the blit shader setup steps.Eric Anholt2014-02-121-22/+11
| | | | | | | | The only thing that wants to track the glsl_sampler structure is the shader string generator. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* i965/vec4: Fix confusion between SWIZZLE and BRW_SWIZZLE macros.Francisco Jerez2014-02-123-4/+4
| | | | | | | | | | | | Most of the VEC4 back-end agrees on src_reg::swizzle being one of the BRW_SWIZZLE macros defined in brw_reg.h, except in two places where we use Mesa's SWIZZLE macros. There is even a doxygen comment saying that Mesa's macros are the right ones. They are incompatible swizzle representations (3 bits vs. 2 bits per component), and the code using Mesa's works by pure luck. Fix it. Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Paul Berry <stereotype441@gmail.com>
* i965/fs: Remove fs_reg::sechalf.Francisco Jerez2014-02-124-12/+16
| | | | | | | | | The same effect can be achieved using ::subreg_offset. Remove the less flexible alternative and define a convenience function to keep the fs_reg interface sane. Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Paul Berry <stereotype441@gmail.com>
* i965/fs: Remove fs_reg::smear.Francisco Jerez2014-02-127-24/+30
| | | | | | | | | The same effect can be achieved using a combination of ::stride and ::subreg_offset. Remove the less flexible ::smear to keep the data members of fs_reg orthogonal. Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Paul Berry <stereotype441@gmail.com>
* i965/fs: Add support for specifying register horizontal strides.Francisco Jerez2014-02-126-11/+68
| | | | | | | | | | | v2: Some improvements for copy propagation with non-contiguous register strides and mismatching types. v3: Add example of the situation that the copy propagation changes are intended to avoid. Clarify that 'fs_reg::apply_stride()' is expected to work with zero strides too. Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Paul Berry <stereotype441@gmail.com>
* i965/fs: Add support for sub-register byte offsets to the FS back-end IR.Francisco Jerez2014-02-125-21/+46
| | | | | | | | | | | | | It would be nice if we could have a single 'reg_offset' field expressed in bytes that would serve the purpose of both, but the semantics of 'reg_offset' are quite complex currently (it's measured in units of one, eight or sixteen dwords depending on the register file and the dispatch width) and changing it to bytes would be a very intrusive change at this stage. Add a separate 'subreg_offset' field for now. Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Paul Berry <stereotype441@gmail.com>
* glsl: Add image type to the GLSL IR.Francisco Jerez2014-02-124-0/+5
| | | | | | | | | v2: Reuse the glsl_sampler_dim enum for images. Reuse the glsl_type::sampler_* fields instead of creating new ones specific to image types. Reuse the same constructor as for samplers adding a new 'base_type' argument. Reviewed-by: Paul Berry <stereotype441@gmail.com>
* meta: Enable cubemap array texture support to decompress_texture_imageIan Romanick2014-02-111-7/+8
| | | | | | | | Fixed piglit test getteximage-targets S3TC CUBE_ARRAY on systems that don't have libtxc_dxtn installed. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Add cubemap array support to generic blit shader codeIan Romanick2014-02-111-0/+12
| | | | | Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Get the correct info logIan Romanick2014-02-111-1/+1
| | | | | Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Expand texture coordinate from vec3 to vec4Ian Romanick2014-02-111-8/+8
| | | | | | | | This will be necessary to support cubemap array textures because they use all four components. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Use GLSL to decompress 2D-array texturesIan Romanick2014-02-111-5/+30
| | | | | | Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72582 Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Use common GLSL code for blitsIan Romanick2014-02-111-95/+13
| | | | | Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Improve GLSL version checkIan Romanick2014-02-111-1/+6
| | | | | | | We want to use the GLSL 1.30-ish path for OpenGL ES 3.0. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Add rectangle textures to the shader-per-sampler-type tableIan Romanick2014-02-111-0/+8
| | | | | | | | | | Rectangle textures were not necessary for mipmap generation (because they cannot have mipmaps), but all of the future users of this common code will need to support rectangle textures. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Refactor shader generation code out of mipmap generation pathIan Romanick2014-02-111-78/+91
| | | | | | | | | This is quite like code we want for blits. Pull it out so that it can be shared by other paths. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Refactor the table of glsl_sampler structuresIan Romanick2014-02-111-56/+72
| | | | | | | | | | | | | This will allow the same table of shader-per-sampler-type to be used for paths in meta other than just mipmap generation. This is also the reason the declarations of the structures was moved towards the top of the file. v2: Code formatting change suggested by Brian. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Use common vertex setup code for _mesa_meta_Bitmap tooIan Romanick2014-02-111-36/+12
| | | | | | Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Add storage to the vertex structure for R, G, B, and AIan Romanick2014-02-111-9/+6
| | | | | | Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Use common routine to configure fixed-function TNL stateIan Romanick2014-02-111-23/+8
| | | | | | | | | | | | | Also... glOrtho(-1.0, 1.0, -1.0, 1.0, -1.0, 1.0) *is* the identity matrix, so drop the unnecessary call to _mesa_Ortho. v2: Rename setup_ff_TNL_for_blit() to setup_ff_tnl_for_blit(). Seems silly to capitalize one out of two to three acronyms in the name (change by anholt, acked by idr). Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> (v1) Reviewed-by: Eric Anholt <eric@anholt.net>
* i965: Fix General and Indirect Base Addresses on Broadwell.Kenneth Graunke2014-02-111-2/+2
| | | | | | | | | I set the "address modify enable" bit in the wrong DWord. The first DWord is the high 16 bits of the address, while the second is the low 32-bits and enable bit. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
* i965: Drop VECTOR_MASK_ENABLE in Broadwell's 3DSTATE_VS packet.Kenneth Graunke2014-02-111-1/+1
| | | | | | | | | | | We never set it on previous generations, but I had to set it in 3DSTATE_PS for correct behavior. For symmetry, I set it in 3DSTATE_VS as well, but there's no actual need to do so. Piglit works fine either way. The documentation also remarks that there should never be a need to program this. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
* i965/gs: Fix EndPrimitive on Broadwell.Kenneth Graunke2014-02-111-0/+7
| | | | | | | | | | | | | | | My earlier patch (i965: Reserve space for "Vertex Count" in GS outputs.) incremented Global Offset for most URB writes to make room for the new "Vertex Count" field, but failed to shift the URB writes used for writing control bits. Confusingly, Global Offset must be incremented by 2 here, rather than 1. The URB writes we use for actual data are HWord writes, which treat Global Offset as a 256-bit offset. These are OWord writes, so it's treated as a 128-bit offset instead. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
* i965/vec4: Support arbitrarily large sampler indices on Broadwell+.Kenneth Graunke2014-02-111-3/+22
| | | | | | | | | | I added support for these on Haswell, but forgot to update the Broadwell code before landing it. Fixes Piglit's max-samplers test. v2: Use get_element_ud() for the destination as well as the source. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
* i965/fs: Support arbitrarily large sampler indices on Broadwell+.Kenneth Graunke2014-02-111-1/+18
| | | | | | | | | | | I added support for these on Haswell, but forgot to update the Broadwell code before landing it. Partially fixes Piglit's max-samplers test. v2: Use get_element_ud() consistently, rather than using it for the source but using brw_vec1_grf for the destination.. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
* i965/fs: Fix Broadwell texture header setup to be uncompressed.Kenneth Graunke2014-02-111-0/+5
| | | | | | | | | | MOV_RAW disables masking, but doesn't force the instruction to be uncompressed. That needs to be done by hand. Fixes textureGather and texture offset tests. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
* mesa: GL_ARB_half_float_pixel is not optionalIan Romanick2014-02-113-3/+0
| | | | | | | | | | | | | | | | | Almost every driver already supported it. All current and future Gallium drivers always support it, and most existing classic drivers support it. This only changes radeon and nouveau. This extension only adds data types that can be passed to, for example, glTexImage2D. It does not add internal formats. Since you can already pass GL_FLOAT to glTexImage2D this shouldn't pose any additional issues with those drivers. Note that r200 and i915 already supported this extension, and they don't support floating-point textures either. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Silence unused parameter warning in _mesa_meta_CopyTexSubImageIan Romanick2014-02-111-0/+6
| | | | | | | | | | | drivers/common/meta.c: In function '_mesa_meta_CopyTexSubImage': drivers/common/meta.c:3744:52: warning: unused parameter 'rb' [-Wunused-parameter] Unfortunately, the parameter can't just be removed because it is part of the dd_function_table::CopyTexSubImage interface. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Silence unused parameter warning in setup_drawpix_textureIan Romanick2014-02-111-6/+5
| | | | | | | | | | | | drivers/common/meta.c: In function 'setup_drawpix_texture': drivers/common/meta.c:1572:30: warning: unused parameter 'texIntFormat' [-Wunused-parameter] setup_drawpix_texture has never used this paramater. Before the refactor commit 04f8193aa it was used in several locations. After that commit, texIntFormat was only used in alloc_texture. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Refactor common VAO and VBO initialization codeIan Romanick2014-02-111-227/+99
| | | | | | | | v2: Clean up some stray binding calls Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> (v1) Reviewed-by: Eric Anholt <eric@anholt.net> (v2)
* meta: Track the _mesa_meta_DrawPixels VBO just like the othersIan Romanick2014-02-111-18/+26
| | | | | | | | | | | | | | | | All of the other meta routines have a particular pattern for creating and tracking the VAO and VBO. This one function deviated from that pattern for no apparent reason. Almost all of the code added in this patch will be removed shortly. v2: Drop glDeleteBuffers() of the old, now-uninitialized vbo variable. Fixes getteximage-formats and fbo-mipmap-copypix regression when "2" landed in the variable (change by anholt). Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Expand the vertex structure for the GenerateMipmap and decompress pathsIan Romanick2014-02-111-8/+21
| | | | | | | | | | Final intermediate step leading to some code sharing. Note that the new GemerateMipmap and decompress vertex structures are the same as the new vertex structure in BlitFramebuffer and the others. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Expand the vertex structure for the DrawPixels pathsIan Romanick2014-02-111-10/+13
| | | | | | | | | | Another step leading to some code sharing. Note that the new DrawPixels vertex structure is the same as the new vertex structure in BlitFramebuffer and the others. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Expand the vertex structure for the Clear pathsIan Romanick2014-02-111-8/+9
| | | | | | | | | | | | | Another step leading to some code sharing. Note that the new Clear vertex structure is the same as the new BlitFramebuffer and CopyPixels vertex structure. The "sizeof(float) * 7" hack is temporary. It will magically disappear in a just a couple more patches. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Expand the vertex structure for the CopyPixels pathsIan Romanick2014-02-111-10/+13
| | | | | | | | | | Another step leading to some code sharing. Note that the new CopyPixels vertex structure is the same as the new BlitFramebuffer vertex structure. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* meta: Expand the vertex structure for the BlitFramebuffer pathsIan Romanick2014-02-111-30/+36
| | | | | | | | This is the first of several steps leading to some code sharing. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* osmesa: drop obsolete AM_CXXFLAGSEmil Velikov2014-02-111-2/+0
| | | | | | | | There is no cpp files during the build process, thus we can safely drop the unused cxxflags. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Matt Turner <mattst88@gmail.com>
* dri/nouveau: Pass the API into _mesa_initialize_contextEmil Velikov2014-02-116-10/+16
| | | | | | | | | | | Currently we create a OPENGL_COMPAT context regardless of what was requested by the program. Correct that by retaining the program's request and passing it into _mesa_initialize_context. Based on a similar commit for radeon/r200 by Ian Romanick. Cc: "9.1 9.2 10.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
* i965: Don't call abort() on an unknown device.Kenneth Graunke2014-02-112-2/+4
| | | | | | | | | | | | | | | If we don't recognize the PCI ID, we can't reasonably load the driver. However, calling abort() is quite rude - it means the application that tried to initialize us (possibly the X server) can't continue via fallback paths. We already have a more polite mechanism - failing to create the context. So, just use that. While we're at it, improve the error message. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73024 Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Tested-by: Lu Hua <huax.lu@intel.com>
* i965/fs: Simplify FS_OPCODE_SET_OMASK stride mashing a bit.Kenneth Graunke2014-02-111-4/+2
| | | | | | | | | | | | In the first case, we can simply call stride(mask, 16, 8, 2) rather than creating a new register with a different stride, then immediately changing it a second time. In the second case, the stride was already what we wanted, so we can just use mask without any changes at all. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* i965/fs: Simplify FS_OPCODE_SET_SAMPLE_ID stride mashing a bit.Kenneth Graunke2014-02-111-2/+1
| | | | | | | | stride(brw_vec1_reg(...) ...) takes some register, changes the strides, then changes the strides again. Let's do it once. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* i965: Program 2x MSAA sample positions.Kenneth Graunke2014-02-103-4/+16
| | | | | | | | | There are only two sensible placements for 2x MSAA samples - and one is the mirror image of the other. I chose (0.25, 0.25) and (0.75, 0.75). Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
* i965: Store 4x MSAA sample positions in a scalar value, not an array.Kenneth Graunke2014-02-103-4/+4
| | | | | | | | Storing a single value in an array is rather pointless. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
* i965: Duplicate less code in GetSamplePositions driver hook.Kenneth Graunke2014-02-101-11/+12
| | | | | | | | | | | | The 4x and 8x cases contained identical code for extracting the X and Y sample offset values and converting them from U0.4 back to float. Without this refactoring, we'd have to duplicate it a third time in order to support 2x MSAA. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
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