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* mesa: Return after assertion failure.José Fonseca2010-08-301-1/+1
| | | | | | Addresses the warnings: warning: ‘target’ may be used uninitialized in this function warning: ‘target_string’ may be used uninitialized in this function
* mesa: Fix _mesa_lookup_parameter_constant's return value.José Fonseca2010-08-301-2/+4
| | | | | | | | | Fixes gcc warning In function ‘_mesa_add_unnamed_constant’: warning: ‘pos’ may be used uninitialized in this function but also what appears to be a bug.
* st/mesa: set the MaxVarying GLSL constantMarek Olšák2010-08-301-0/+7
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* evergreen : fix shader const allocation and instruction bugs.Richard Li2010-08-296-20/+48
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* ir_to_mesa: Initialize variable in ir_to_mesa_visitor::visit.Vinson Lee2010-08-291-1/+1
| | | | | Fixes piglit glsl-fs-loop valgrind uninitialized value error on softpipe and llvmpipe.
* i965: Add initial support for texturing to the new FS backend.Eric Anholt2010-08-281-15/+128
| | | | Fixes 11 piglit tests.
* i965: Add disasm for gen5 sampler messages.Eric Anholt2010-08-281-6/+19
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* i965: Move libdrm/C++ hack introduced in fa2deb3d to intel_context.hCedric Vivier2010-08-281-5/+0
| | | | | | | Fixes build on Linux/GCC 4.4 as libdrm includes are also used by other brw_fs_*.cpp files. Bug #29855
* st/mesa: Include missing header in st_mesa_to_tgsi.c.Vinson Lee2010-08-281-1/+2
| | | | Include p_screen.h for complete type to pipe_screen.
* i965: Set the pop count on BRK/CONT inside of an if statement in the FS.Eric Anholt2010-08-271-4/+11
| | | | | | | This is the same as 8de8c97275e9555183a7e8f2238143657bbe60b2 for the VS, and fixes glsl-fs-if-nested-loop and the mandelbrot demo. Bug #29498
* dri: Get prototype for _mesa_destroy_compiler().Eric Anholt2010-08-271-0/+1
| | | | Bug #29665.
* i965: Don't strip negate/abs flags when assigning uniform locations.Eric Anholt2010-08-271-5/+5
| | | | Fixes glsl-algebraic-sub-zero-4.
* i965: Add missing handling for BRW_OPCODE_SEL.Eric Anholt2010-08-271-0/+4
| | | | Fixes 4 piglit tests about min, max, and clamp.
* i965: Mask out higher bits of the result of BRW_CMP producing a boolean.Eric Anholt2010-08-271-0/+6
| | | | | When it says it sets the LSB, that's not just a hint as to where the result goes. Only the LSB is modified. Fixes 20 piglit cases.
* i965: Fix the types of immediate integer values.Eric Anholt2010-08-271-2/+2
| | | | When we're trying to do integer ops, handing a float in doesn't help.
* i965: Add translation for RNDD and RNDZ.Eric Anholt2010-08-271-0/+7
| | | | | | Fixes: glsl-fs-any. glsl1-integer division with uniform var
* i965: Add support for ir_binop_mod using do_mod_to_fract.Eric Anholt2010-08-271-0/+4
| | | | Fixes glsl-fs-mod.
* mesa: move null ptr check (fdo bug 29843)Brian Paul2010-08-271-2/+2
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* mesa: Use the format info to identify packed depth/stencil formats.Nick Bowler2010-08-271-6/+2
| | | | | | | | | | | Due to a misunderstanding of the Z24_X8 and X8_Z24 formats, the earlier patch created depth/stencil wrappers for them. This broke swrast. Use the format info instead, which only identifies Z24_S8 and S8_Z24 as packed depth/stencil. It also has the advantage of being nicer code. Signed-off-by: Nick Bowler <nbowler@draconx.ca> Signed-off-by: Brian Paul <brianp@vmware.com>
* mesa: use atexit() handler to release GLSL compiler memoryBrian Paul2010-08-271-0/+9
| | | | | | | | This releases a bunch of memory that was showing up as leaks with valgrind. If atexit() isn't widely supported we may need to add some #ifdef tests around the call.
* i965: Fix swapped instructions in ir_unop_abs and ir_unop_neg.Eric Anholt2010-08-271-2/+2
| | | | Fixes glsl-fs-neg and 5 other tests.
* i965: Add generate() handling for AND, OR, XOR.Eric Anholt2010-08-271-0/+11
| | | | 10 more piglit tests pass.
* i965: Add support for if instructions in the new FS backend.Eric Anholt2010-08-271-1/+61
| | | | 20 more piglit tests pass.
* i965: When encountering an unknown opcode in new FS backend, print its name.Eric Anholt2010-08-273-14/+23
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* i965: Fix the maximum grf counting in the new FS backend.Eric Anholt2010-08-271-1/+1
| | | | | | glsl-algebraic-rcp-rsq managed to use 33 registers, and we claimed to only use 32, so the write to g32 would go stomping over the precious g0 of some other thread.
* i965: Validate the IR tree after doing our custom optimization passes.Eric Anholt2010-08-271-0/+2
| | | | | | | This wouldn't catch the last failure fixed in them, because we don't validate assignments well (due to the fact that we've got a pretty glaring inconsistency in how we handle assignment writemasking), but it could catch other failure we may produce.
* i965: Add a bit of support for matrices to the new FS.Eric Anholt2010-08-271-11/+21
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* i965: Fix destination writemasking in the new FS.Eric Anholt2010-08-271-6/+5
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* i965: Fix swizzling in vector splitting for the new FS backend.Eric Anholt2010-08-271-0/+3
| | | | | | | | We weren't smearing a component of a split RHS out to reach an unsplit LHS's writemask, so gl_FragColor (always unsplit) would often get uninitialized values. Fixes: glsl-algebraic-add-add-1 (and probably many others).
* mesa: free the fallback texture object in free_shared_state()Brian Paul2010-08-271-0/+4
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* mesa: fix double-underscore namingBrian Paul2010-08-271-4/+4
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* Fix typo in function name "shading_laguage_version".Kenneth Graunke2010-08-261-2/+2
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* i965: Add preliminary support for uniforms to the new FS backend.Eric Anholt2010-08-261-8/+55
| | | | +269 piglits
* i965: Abort on gl_FragDepth in the new FS backend for now.Eric Anholt2010-08-261-0/+1
| | | | | It hangs the GPU due to FB_WRITE handling being incomplete. There are bigger issues to handle first.
* i965: Fix up and actually enable the NewShader and NewShaderProgram hooks.Eric Anholt2010-08-262-3/+8
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* i965: Hack in avoidance of c++ reserved keyword in libdrm.Eric Anholt2010-08-261-0/+8
| | | | | I'm also fixing this upstream in libdrm, but this avoids new libdrm dependency for the moment.
* i965: Add GLSL IR-level source annotation and comments to new FS debug.Eric Anholt2010-08-261-5/+83
| | | | | This should make debugging way easier, as now we have context for reading large programs.
* i965: Use the implied move in brw_math() in the new FS.Eric Anholt2010-08-261-2/+1
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* i965: Add support for in varyings to the new FS codegen.Eric Anholt2010-08-261-55/+390
| | | | At least some tests, like glsl-vs-sign, now work.
* i965: Start building the codegen visitor.Eric Anholt2010-08-261-10/+659
| | | | This can successfully emit a real program that generates magenta now.
* i965: Start building direct GLSL2 IR to 965 assembly codegen.Eric Anholt2010-08-264-17/+381
| | | | | | | | | | | Our channel-expressions and vector-splitting changes now happen into a private copy of the IR that we maintain for ourselves. Uniform assignment still happens by the core, so we continue using Mesa IR generation not just for swrast fallbacks but also for uniform values (since there's no storage for their contents other than shader_program->FragmentProgram->Parameters->ParameterValues). And most importantly, at the moment no actual codegen is hooked up other than emitting our favorite color to the framebuffer.
* i965: Add new pass to split vectors into scalar variablesEric Anholt2010-08-264-1/+393
| | | | | | | Combined with the previous pass, this lets other optimization passes do their work thanks to ir_tree_grafting. Still have regression in instruction count with INTEL_NEW_FS, but register count is even better.
* i965: Add a pass for the FS to reduce vector expressions down to scalar.Eric Anholt2010-08-264-1/+384
| | | | | | | | | | | | | | | This is a step towards implementing a GLSL IR backend for the 965 fragment shader. Because it has downsides with the current codegen, it is hidden under the environment variable INTEL_NEW_FS. This results in an increase in instruction count at the moment (1444 -> 1752 for glsl-fs-raytrace, 345 -> 359 on my demo), because dot products are turned into a series of multiplies and adds instead of a custom expansion of MULs and MACs, and by not splitting the variable types up we don't get tree grafting and thus there are extra moves of temporary storage. However, register count drops for the non-GLSL path (64 -> 56 on my demo shader) because the register allocator sees all the sub-operations.
* i965: Start building 965 FS backend.Eric Anholt2010-08-268-11/+135
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* ir_to_mesa: Don't assume that an ir_dereference_array is of a variable.Eric Anholt2010-08-261-1/+2
| | | | | | | | Fixes: glsl-array-bounds-02 (software) glsl-array-bounds-04 glsl-array-bounds-06 (software) glsl-array-bounds-08
* st/mesa: Remove unnecessary header.Vinson Lee2010-08-261-1/+0
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* i965: Add support for destination RelAddr writes in the VS.Eric Anholt2010-08-262-13/+48
| | | | Fixes: glsl-vs-varying-array
* i965: Fix the test for variable indexing of shader inputs.Eric Anholt2010-08-261-5/+11
| | | | | | Shader inputs appear in source registers, not dst registers. Catches unsupported shaders in glsl-fs-varying-array and Humus RaytracedShadows.
* st/mesa: add missing packed depth/stencil formats in st_format_datatype()Brian Paul2010-08-261-1/+3
| | | | Fixes llvmpipe regression from one of the prev commits.
* mesa: fix mixed-up function call nameBrian Paul2010-08-261-2/+2
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