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* gallium/hud: add cpu graph support for WindowsBrian Paul2015-11-121-0/+54
| | | | | | | | | | We support "cpu" but not "cpu#" because there's no good way of querying per-cpu usage. Also, the cpu usage is for the process, not the whole system. Original code cobbled together by Brian and then fixed/polished by Jose. Signed-off-by: Brian Paul <brianp@vmware.com>
* glsl: set matrix_stride for non matrices with atomic counter buffersTapani Pälli2015-11-121-0/+2
| | | | | | | | | | | | | | | | | | Patch sets matrix_stride as 0 for non matrix uniforms that are in a atomic counter buffer. Matrix stride calculation for actual matrix uniforms is done during link_assign_uniform_locations. From ARB_program_interface_query specification: GL_MATRIX_STRIDE: "For active variables not declared as a matrix or array of matrices, zero is written to <params>. For active variables not backed by a buffer object, -1 is written to <params>, regardless of the variable type." Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
* mesa: validate precision of varyings during ValidateProgramPipelineTapani Pälli2015-11-123-0/+80
| | | | | | | | | | | Fixes following failing ES3.1 CTS tests: ES31-CTS.sepshaderobjs.InterfacePrecisionMatchingFloat ES31-CTS.sepshaderobjs.InterfacePrecisionMatchingInt ES31-CTS.sepshaderobjs.InterfacePrecisionMatchingUInt Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
* glsl: do not lose precision information when packing varyingsTapani Pälli2015-11-121-0/+1
| | | | | | | | This information will be used by cross stage validation of varyings for pipeline objects. Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
* glsl: Add precision information to ir_variableIago Toral Quiroga2015-11-124-24/+303
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We will need this later on when we implement proper support for precision qualifiers in the drivers and also to do link time checks for uniforms as indicated by the spec. This patch also adds compile-time checks for variables without precision information (currently, Mesa only checks that a default precision is set for floats in fragment shaders). As indicated by Ian, the addition of the precision information to ir_variable has been done using a bitfield and pahole to identify an available hole so that memory requirements for ir_variable stay the same. v2 (Ian): - Avoid if-ladders by defining arrays of supported sampler names and indexing into them with type->sampler_array + 2 * type->sampler_shadow - Make the code that selects the precision qualifier to use an utility function - Fix a typo v3 (Tapani): - rebased - squashed in "Precision qualifiers are not allowed on structs" - fixed select_gles_precision for sampler arrays - fixed precision_qualifier_allowed for arrays of structs v4 (Tapani): - add atomic_uint handling - do not allow precision qualifier on images (issues reported by Marta) v5 (Tapani): - support precision qualifier on image types v6 (Tapani): - set precision qualifier on interface block members Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
* glsl: Move the definition of precision_qualifier_allowedIago Toral Quiroga2015-11-121-36/+35
| | | | | | | We will need this to build later patches Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
* glsl: Add user-defined default precision qualifiers to the symbol tableIago Toral Quiroga2015-11-121-19/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Notice that the spec requires that a default precision has been set for every type used by a shader that can use a precision qualifier and does not have a predefined precision, however, at the moment, Mesa only checks this for floats in the fragment shader. This is probably because the GLSL ES 1.0 specs mentions this case specifically, but GLSL ES 3.0 clarifies that the same applies to other types: "The fragment language has no default precision qualifier for floating point types. Hence for float, floating point vector and matrix variable declarations, either the declaration must include a precision qualifier or the default float precision must have been previously declared. Similarly, there is no default precision qualifier for the following sampler types in either the vertex or fragment language: sampler3D; samplerCubeShadow; sampler2DShadow; sampler2DArray; sampler2DArrayShadow; isampler2D; isampler3D; isamplerCube; isampler2DArray; usampler2D; usampler3D; usamplerCube; usampler2DArray;" we will fix this in a later patch. Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
* glsl: Add default precision qualifiers to the symbol tableIago Toral Quiroga2015-11-121-0/+12
| | | | | | | | | | | | | | | | The GLSL ES spec specifies default precision qualifiers for certain types, so populate the symbol table with these. Notice that the desktop GLSL spec also indicates defaults for some types but this is not really useful since precision qualifiers are completely ignored in desktop GLSL. v2: simplify and add samplerExternalOES, specified by OES_EGL_image_external (Tapani) v3: add atomic_uint (reported missing by Marta) Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
* glsl: Add API to put default precision qualifiers in the symbol tableIago Toral Quiroga2015-11-122-0/+26
| | | | | | | | These have scoping rules that match the ones defined for other things such as variables, so we want them in the symbol table. Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
* i965/fs/nir: fix the number of register written by FS_OPCODE_GET_BUFFER_SIZESamuel Iglesias Gonsálvez2015-11-121-2/+14
| | | | | | | | | | | FS_OPCODE_GET_BUFFER_SIZE is calculated with a resinfo's sampler message. This patch adjusts the number of registers written by the opcode following what the PRM spec says about the number of registers written by the SIMD8 and SIMD16's writeback messages for sampler messages. Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* i965/skl/gt4: Fix URB programming restriction.Ben Widawsky2015-11-111-0/+9
| | | | | | | | | | | | | | The comment in the code details the restriction. Thanks to Ken for having a very helpful conversation with me, and spotting the blurb in the link I sent him :P. There are still stability problems for me on GT4, but this definitely helps with some of the failures. v2: Comment fixes Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* nv50,nvc0: add ARB_clear_texture supportIlia Mirkin2015-11-115-7/+101
| | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* st/mesa: implement ARB_clear_textureIlia Mirkin2015-11-112-0/+30
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* gallium: add PIPE_CAP_CLEAR_TEXTURE and clear_texture prototypeIlia Mirkin2015-11-1118-0/+31
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* glsl: add helper to check for enhanced layouts supportTimothy Arceri2015-11-121-0/+5
| | | | Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk>
* mesa: add ARB_enhanced_layoutsTimothy Arceri2015-11-125-0/+6
| | | | Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk>
* r600: initialised PGM_RESOURCES_2 for ES/GSDave Airlie2015-11-122-0/+6
| | | | | | | | | | | This fixes the corruption on rendering that we are seeing in certain geometry shaders. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=91780 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Tested / Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com> Cc: "10.6" "11.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
* i965: Split nir_emit_intrinsic by stage with a general fallback.Kenneth Graunke2015-11-112-277/+381
| | | | | | | | | | | | | | | | | | | | | | Many intrinsics only apply to a particular stage (such as discard). In other cases, we may want to interpret them differently based on the stage (such as load_primitive_id or load_input). The current method isn't that pretty - we handle all intrinsics in one giant function. Sometimes we assert on stage, sometimes we forget. Different behaviors are handled via if-ladders based on stage. This commit introduces new nir_emit_<stage>_intrinsic() functions, and makes nir_emit_instr() call those. In turn, those fall back to the generic nir_emit_intrinsic() function for cases they don't want to handle specially. This makes it clear which intrinsics only exist in one stage, and makes it easy to handle inputs/outputs differently for various stages. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* mesa/copyimage: allow width/height to not be multiples of blockIlia Mirkin2015-11-111-3/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | For compressed textures, the image size is not necessarily a multiple of the block size (e.g. the last mip levels). Section 18.3.2 (Copying Between Images) of the OpenGL 4.5 Core Profile spec says: An INVALID_VALUE error is generated if the dimensions of either subregion exceeds the boundaries of the corresponding image object, or if the image format is compressed and the dimensions of the subregion fail to meet the alignment constraints of the format. and Section 8.7 (Compressed Texture Images) says: An INVALID_OPERATION error is generated if any of the following conditions occurs: * width is not a multiple of four, and width + xoffset is not equal to the value of TEXTURE_WIDTH. * height is not a multiple of four, and height + yoffset is not equal to the value of TEXTURE_HEIGHT. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92860 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Cc: mesa-stable@lists.freedesktop.org
* i965/brw_reg: Add a brw_VxH_indirect helperJason Ekstrand2015-11-111-0/+11
| | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* mesa: remove old comments in arrayobj.cBrian Paul2015-11-111-5/+0
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* st/wgl: clarify code in stw_framebuffer_from_hwnd_locked()Brian Paul2015-11-111-2/+2
| | | | | | | | | Just a minor code change to make it obvious that NULL is returned when we don't find the given HWND. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Charmaine Lee <charmainel@vmware.com> Reviewed-by: José Fonseca <jfonseca@vmware.com>
* st/wgl: improve some function commentsBrian Paul2015-11-111-6/+30
| | | | | | | | | In particular, explain when stw_framebuffer objects are locked/unlocked/etc. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Charmaine Lee <charmainel@vmware.com> Reviewed-by: José Fonseca <jfonseca@vmware.com>
* st/wgl: whitespace/formatting fixesBrian Paul2015-11-113-63/+48
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* st/wgl: fix locking issue in stw_st_framebuffer_present_locked()Brian Paul2015-11-111-0/+3
| | | | | | | | | | | | | When stw_st_framebuffer_present_locked() is called, the stw_framebuffer's mutex will already be locked. Normally, the stw_framebuffer_present_locked() function calls stw_framebuffer_release() to unlock the mutex when it's done. But if for some reason the 'resource' pointer in stw_st_framebuffer_present_locked() is null, we'd return without unlocking the stw_framebuffer. This fixes that to avoid potential deadlocks. Reviewed-by: Charmaine Lee <charmainel@vmware.com>
* i965: Print force_writemask_all in dump_instructions().Kenneth Graunke2015-11-112-0/+6
| | | | | Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Combine BRW_NEW_*_BINDING_TABLE dirty bits.Kenneth Graunke2015-11-115-26/+14
| | | | | | | | | | | A while back, we moved to directly emitting the Gen7+ state when constructing the binding tables. These flags are only used on Gen4-6, which emit all the binding table pointers at once. We gain nothing by having separate flags, so combine them. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
* i965: Map GL_PATCHES to 3DPRIM_PATCHLIST_n.Kenneth Graunke2015-11-112-1/+10
| | | | | | | | | | | | | | | | Inspired by a patch by Fabian Bieler. Fabian defined a _3DPRIM_PATCHLIST_0 macro (which isn't actually a valid topology type); I instead chose to make a macro that takes an argument. He also took the number of patch vertices from _mesa_prim (which was set to ctx->TessCtrlProgram.patch_vertices) - I chose to use it directly to avoid the need for the VBO patch. v2: Change macro to 0x20 + (n - 1) instead of 0x1F + n to better match the documentation (suggested by Ian). Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* r600g: Pass conservative depth parameters to hwGlenn Kennard2015-11-117-1/+53
| | | | | | | | Supported on R700 and up. Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* Revert "r600g: Pass conservative depth parameters to hw"Dave Airlie2015-11-116-46/+0
| | | | | | This reverts commit a1fc78911e9a6439db94d6ae91d5672c76e5fb1c. I pushed the wrong patch.
* r600g: Implement ARB_texture_viewGlenn Kennard2015-11-112-7/+18
| | | | | | Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* r600g: Pass conservative depth parameters to hwGlenn Kennard2015-11-116-0/+46
| | | | | | | Supported on R700 and up. Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* i965/nir/opt_peephole_ffma: Bypass fusion if any operand of fadd and fmul is ↵Eduardo Lima Mitev2015-11-101-0/+31
| | | | | | | | | | | | | | | | | | | | | | | a const When both fadd and fmul instructions have at least one operand that is a constant and it is only used once, the total number of instructions can be reduced from 3 (1 ffma + 2 load_const) to 2 (1 fmul + 1 fadd); because the constants will be progagated as immediate operands of fmul and fadd. This patch detects these situations and prevents fusing fmul+fadd into ffma. Shader-db results on i965 Haswell: total instructions in shared programs: 6235835 -> 6225895 (-0.16%) instructions in affected programs: 1124094 -> 1114154 (-0.88%) total loops in shared programs: 1979 -> 1979 (0.00%) helped: 7612 HURT: 843 GAINED: 4 LOST: 0 Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* util: Add list_is_singular() helper functionEduardo Lima Mitev2015-11-101-0/+8
| | | | | | Returns whether the list has exactly one element. Reviewed-by: Matt Turner <mattst88@gmail.com>
* nir/nir_opt_peephole_ffma: Move this lowering pass to the i965 driverEduardo Lima Mitev2015-11-106-9/+10
| | | | | | | | | Because the next patch will add an optimization that is specific to i965, we want to move this loweing pass to that driver altogether. This is safe because i965 is the only consumer. Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* glsl: Use array deref for access to vector componentsKristian Høgsberg Kristensen2015-11-1010-68/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We've assumed that we could lower per-component vector access from vec[i] = scalar to vec = ir_triop_vector_insert(vec, scalar, i) but with SSBOs (and compute shader SLM and tesselation outputs) this is no longer valid. If a vector is "externally visible", multiple threads can write independent components simultaneously. With lowering to ir_triop_vector_insert, each thread read the entire vector, changes one component, then writes out the entire vector. This is racy. Instead of generating a ir_binop_vector_extract when we see v[i], we generate ir_dereference_array. We then add a lowering pass to lower the ir_dereference_array to ir_binop_vector_extract for rvalues and for to vector_insert for lvalues in a separate lowering pass. The resulting IR is the same as before, but we now have a window between ast->ir conversion and the lowering pass where v[i] appears in the IR as an array deref. This lets us run lowering passes that lower the vector access to I/O (eg for SSBO load/store) before we lower the per-component access to full vector writes. Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: Kristian Høgsberg Kristensen <krh@bitplanet.net>
* glsl: Lower UBO and SSBO access in glsl linkerKristian Høgsberg Kristensen2015-11-106-3/+13
| | | | | | | | | | | All GLSL IR consumers run this lowering pass so we can move it to the linker. This moves the pass up quite a bit, but that's the point: it needs to run before we throw away information about per-component vector access. Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: Kristian Høgsberg Kristensen <krh@bitplanet.net>
* glsl: Drop exec_list argument to lower_ubo_referenceKristian Høgsberg Kristensen2015-11-104-5/+5
| | | | | | | | | | | We always pass in shader->ir and we already pass in the shader, so just drop the exec_list. Most passes either take just a exec_list or a shader, so this seems more consistent. Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: Kristian Høgsberg Kristensen <krh@bitplanet.net>
* nir/glsl: switch to using the builderConnor Abbott2015-11-101-441/+259
| | | | | | | v2: use nir_bulder_cf_insert (Ken) Signed-off-by: Connor Abbott <cwabbott0@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* nir/glsl: make emit() take nir_ssa_def * sourcesConnor Abbott2015-11-101-18/+18
| | | | | | | Again, this matches what the builder will have to do. Signed-off-by: Connor Abbott <cwabbott0@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* nir/glsl: convert nir_visitor::result to a nir_ssa_def *Connor Abbott2015-11-101-6/+7
| | | | | | | | Its only user now returns a nir_ssa_def *, and we'll need this since the builder returns a nir_ssa_def *. Signed-off-by: Connor Abbott <cwabbott0@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* nir/glsl: make evaluate_rvalue() return a nir_ssa_def *Connor Abbott2015-11-101-37/+53
| | | | | | | | | | | A long time ago, before NIR was even merged to master, glsl_to_nir used registers and these sources were actually register sources. But nowadays everything in glsl_to_nir is an SSA value, so stop pretending that by evaluating an rvalue we can get an arbitrary nir_src. Most importantly, we need this since the builder takes nir_ssa_def * sources directly. Signed-off-by: Connor Abbott <cwabbott0@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* st/mesa: Destroy buffer object's mutex.Jose Fonseca2015-11-101-0/+1
| | | | | | | | Ideally we should have a _mesa_cleanup_buffer_object function in src/mesa/bufferobj.c so that the destruction logic resided in a single place. Reviewed-by: Brian Paul <brianp@vmware.com>
* nir: Store PatchInputsRead and PatchOutputsWritten in nir_shader_info.Kenneth Graunke2015-11-102-0/+7
| | | | | | | | | | These tessellation shader related fields need plumbing through NIR. v2: Use uint32_t instead of uint64_t to match the source type of GLbitfield (caught by Iago Toral). Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
* vc4: Avoid loading undefined (newly-allocated) FBO contents.Eric Anholt2015-11-091-0/+17
| | | | | | | Since X has undefined contents in new pixmaps, it will allocate new textures for an FBO and draw to them without an explicit clear. For VC4, it's much faster to emit a clear than the load of the actual undefined memory contents, so just do that instead.
* vc4: Return NULL when we can't make our shadow for a sampler view.Eric Anholt2015-11-091-0/+4
| | | | | | | I'm not sure what the caller does is appropriate (just have a NULL sampler at this slot), but it fixes the immediate crash. Cc: "11.0" <mesa-stable@lists.freedesktop.org>
* vc4: Return GL_OUT_OF_MEMORY when buffer allocation fails.Eric Anholt2015-11-092-19/+32
| | | | | | | I was afraid our callers weren't prepared for this, but it looks like at least for resource creation, mesa/st throws an error appropriately. Cc: "11.0" <mesa-stable@lists.freedesktop.org>
* vc4: Add CL dumping for GL_ARRAY_PRIMITIVE.Eric Anholt2015-11-091-1/+16
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* vc4: Fix a compiler warning.Eric Anholt2015-11-091-1/+1
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* glsl: Use shared storage variable type for shared variablesJordan Justen2015-11-091-0/+2
| | | | | Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
generated by cgit v1.1 at 2024-08-30 07:41:13 +0000