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* nir: move to compiler/Emil Velikov2016-01-26105-157/+310
| | | | | | Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Matt Turner <mattst88@gmail.com> Acked-by: Jose Fonseca <jfonseca@vmware.com>
* compiler: move the glsl_types C wrapper alongside their C++ brethrenEmil Velikov2016-01-266-7/+8
| | | | | | | | | | At a later stage we might want to split out the NIR specific [XXX: which one was it], as to make things move obvious and rename the files appropriately. This patch aims to split it out of nir. Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Matt Turner <mattst88@gmail.com> Acked-by: Jose Fonseca <jfonseca@vmware.com>
* nir: move glsl_types.{cpp,h} to compilerEmil Velikov2016-01-2670-76/+68
| | | | | | | | Allows us to remove the SCons workaround :-) Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Matt Turner <mattst88@gmail.com> Acked-by: Jose Fonseca <jfonseca@vmware.com>
* nir: move shader_enums.[ch] to compilerEmil Velikov2016-01-2623-15/+115
| | | | | | | | | This way one can reuse it in glsl, nir or other infrastructure without pulling nir as dependency. Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Matt Turner <mattst88@gmail.com> Acked-by: Jose Fonseca <jfonseca@vmware.com>
* compiler: introduce a libcompiler static libraryEmil Velikov2016-01-268-5/+34
| | | | | | | | | | | | | Currently it's an empty library, although it'll be used to store common code between GLSL and NIR that is compiler specific (rather than generic as the one in src/util). XXX: strictly speaking we could add a python/mako parser to generate the relevant files instead including builtin_type_macros.h in such a manner. Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Acked-by: Matt Turner <mattst88@gmail.com> Acked-by: Jose Fonseca <jfonseca@vmware.com>
* gallium/ddebug: add 'verbose' optionNicolai Hähnle2016-01-265-5/+12
| | | | | | | | This currently just writes out the name of dump files, which can be useful to easily correlate those files with other log outputs (driver debug output, apitrace calls, etc.) Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* gallium/ddebug: make 'noflush' also affect 'always' modeNicolai Hähnle2016-01-262-5/+10
| | | | | | | | | This changes the default behavior of 'always' mode to be consistent with hang detection mode. I have used this to more easily compare dumped command streams using diff. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: use llvm.amdgcn.s.barrier instead of llvm.AMDGPU.barrier.localNicolai Hähnle2016-01-261-1/+3
| | | | | | | | | The new name for the intrinsic was introduced in LLVM r258558. v2: use ternary operator instead of preprocessor Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v1) Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* i965/bxt: Fix conservative wm thread counts.Ben Widawsky2016-01-251-1/+1
| | | | | | | | | | | | | | | | | | | When setting the conservative thread counts, I halved everything. That isn't correct for the wm, which has nothing to do with actual thread counts. I suck. BXT only has 1 slice, and there is some ambiguity about subslices, so just reserve the max possible for now. It looks like this might fix: piglit.spec.glsl-1_50.execution.variable-indexing.gs-output-array-vec4-index-wr.bxtm64. I kind of question why that is, but it is what Jenkins says. Mark is current running some of the other blacklisted tests on this patch. (it effects anything requiring scratch space). Cc: mesa-stable <mesa-stable@lists.freedesktop.org> Cc: Neil Roberts <neil@linux.intel.com> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org> Tested-by: Mark Janes <mark.a.janes@intel.com>
* meta: Use internal functions to set texture parametersIan Romanick2016-01-254-24/+49
| | | | | | | | | | | | | | | | | | | | | | _mesa_texture_parameteriv is used because (the more obvious) _mesa_texture_parameteri just stuffs the parameter in an array and calls _mesa_texture_parameteriv. This just cuts out the middleman. As a side bonus we no longer need check that ARB_stencil_texturing is supported. The test doesn't allow non-supporting implementations to avoid any work, and it's redundant with the value-changed test. Fix bug #93717 because the state restore commands at the bottom of _mesa_meta_GenerateMipmap no longer depend on the bound state. Fixes piglit arb_direct_state_access-generatetexturemipmap with the changes recently sent to the piglit mailing list. See the bugzilla entry for more info. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93717 Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* meta/blit: Restore GL_DEPTH_STENCIL_TEXTURE_MODE state for GL_TEXTURE_RECTANGLEIan Romanick2016-01-251-8/+8
| | | | | | | | | | | | | Commit c246828c added the code to save and restore the stencil texturing mode. The restore, however, was erroneously inside the 'target != GL_TEXTURE_RECTANGLE' block. Fixes piglit test 'arb_stencil_texturing-blit_corrupts_state GL_TEXTURE_RECTANGLE'. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* meta/copy_image: Fix typo in commentIan Romanick2016-01-251-1/+1
| | | | | | | Trivial. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* mesa: Don't include meta.hIan Romanick2016-01-251-1/+0
| | | | | | | | Commit 055093e removed the call to _mesa_meta_in_progress, and meta.h has not been necessary in src/mesa/main/enable.c since. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
* radeonsi: add DCC buffer for sampler views on new CSNicolai Hähnle2016-01-251-15/+18
| | | | | | | | This fixes a VM fault and possible lockup in high memory pressure situations. Cc: "11.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
* radeonsi: emit rw_buffers for tes_shader only if tes_shader presentNicolai Hähnle2016-01-251-3/+5
| | | | | Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: do not set the shader->key for gs copy shadersNicolai Hähnle2016-01-251-1/+0
| | | | | | | | | | | The key for a geometry shader would be interpreted as the key for a vertex shader further down the line, which really doesn't make sense. This does not affect the contents of shader->key because geometry shaders don't have any key entries anyway. Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: si_llvm_emit_vs_epilogue is never used with gs copy shadersNicolai Hähnle2016-01-251-2/+3
| | | | | | | Hence remove the misleading branch on is_gs_copy_shader. Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: move is_gs_copy_shader to si_shader_contextNicolai Hähnle2016-01-252-6/+5
| | | | | | | | It is only used during shader creation now, so no need to keep it around afterwards. Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: replace use of is_gs_copy_shader in si_shader_vsNicolai Hähnle2016-01-251-1/+1
| | | | | | | | We now have an explicit parameter that contains the same information, and this will allow us to get rid of is_gs_copy_shader in the si_shader struct. Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: ensure that VGT_GS_MODE is sent when necessaryNicolai Hähnle2016-01-251-8/+21
| | | | | | | | | | | | | | | Specifically, when the API switches from using a GS to not using a GS and then back to using the same GS again, we do not have to re-send all the GS state, but we do have to send VGT_GS_MODE. So make VGT_GS_MODE consistently be a part of the VS state. This fixes a rendering bug in Dolphin, but surely other applications are affected as well. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93648 Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* radeonsi: extract the VGT_GS_MODE calculation into its own functionNicolai Hähnle2016-01-251-19/+28
| | | | | | Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* trace: fix a segfault when tracing indirect draw callsSamuel Pitoiset2016-01-241-1/+16
| | | | | | | Like other resources, the indirect draw buffer must be unwrapped. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* Revert "mesa: enable enums for OES_geometry_shader"Marek Olšák2016-01-242-86/+30
| | | | | | | This reverts commit 67e30987031d189d606125d4b712a575f619ab44. It breaks a bunch of geometry shader tests, such as "spec@!opengl 3.2@minmax" and others depending on the glGet queries.
* winsys/amdgpu: optionally use buffer lists with all allocated buffersMarek Olšák2016-01-235-3/+61
| | | | | | | Set RADEON_ALL_BOS=1 to use it. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* glsl: Conditionalize atan2 math.Kenneth Graunke2016-01-221-1/+1
| | | | | | | | | | | | | | In the old hand-writen implementation of atan2, the calculation of atan(y/x) was performed conditionally in the "then" block of the outermost if statement. I believe I accidentally lifted this out into unconditional code when converting to IR builder. For reference, the original hand-written IR is visible in commit 722eff674b832e2321f791c68358ef52d2a1ff25. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com> Cc: Erik Faye-Lund <kusmabite@gmail.com>
* virgl: enable building on AndroidRob Herring2016-01-234-0/+78
| | | | | | | | This is just a copy-n-paste and rename of vc4 Android makefiles. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* virtio_gpu: Add PCI ID to driver mapRob Herring2016-01-231-0/+7
| | | | | | | Add the virtio-gpu PCI ID so the driver probing works. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
* i965: Implement a drirc workaround for broken dual color blending.Kenneth Graunke2016-01-228-9/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OpenGL's dual color blending feature was specified so that an implementation could support both multiple render targets (MRT) and dual source blending. Fragment shader outputs specify both "location" (the render target number) and "index" (either color 0 or 1). I believe DirectX only has the notion of "location" - if using dual color blending, location 0 or 1 will specify the operands. If not, then location means the render target index. The two features can't be used together. As such, some applications mistakenly try to use <loc = 0, index = 0> and <loc = 1, index = 0> in a shader used for dual color blending with a single render target, rather than the correct <loc = 0, index = 0> and <loc = 0, index = 1>. In particular, Unigine Heaven 4.0 and Valley 1.0 suffer from this bug. Unigine is aware of the problem, and quickly developed a fix, but has not bothered to change the download link on their website to a working copy in over a year. People were still using the broken version and complaining. We tried working around this by disabling dual color blending, but that apparently hurts performance, and people were once again unhappy. On i965, dual source blending is achieved by using different framebuffer write messages than normal rendering. So, we have to compile different code for the two cases. We're not being pedantic: we actually have to know in order to function. Normally, dual source blending is detectable in the shader: if a shader has an output with index = 1, then it's meant for blending, not MRT. With the broken inputs, they're indistinguishable, so we can only tell by looking at the current GL state. This patch implements a new drirc workaround: export dual_color_blend_by_location=true which makes the i965 driver detect when OpenGL state is configured for dual source blending, and recompile the fragment shader to use the right messages. In that case, we allow either location = 1 or index = 1 to specify the second source for the blending equations. It also re-enables GL_ARB_blend_func_extended for Unigine. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92233 Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* radeonsi: add ETC1 support for StoneyMarek Olšák2016-01-221-0/+1
| | | | | | | | | It's a subset of ETC2. Tested. For more information, see page 42 and onward: http://www.graphicshardware.org/previous/www_2007/presentations/strom-etc2-gh07.pdf Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* radeonsi: change LLVM intrinsics for BREV, CLAMP, EX2Marek Olšák2016-01-221-3/+6
| | | | | | | Requested by Matt Arsenault. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeonsi: add max waves / SIMD to shader stats (v2)Marek Olšák2016-01-221-5/+49
| | | | | | | v2: account for LDS usage in PS the limit is per SIMD, not per CU Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeonsi: enable late VS allocation (v3)Marek Olšák2016-01-221-3/+23
| | | | | | | v2: take the number of CUs into account v3: change in LS allocation Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeonsi: allow using all CUs for tessellation and on-chip GS (v2)Marek Olšák2016-01-221-2/+2
| | | | | | | v2: After more discussion with hw teams, the kernel already contains the optimal settings allowing us to use all CUs. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* Revert "mesa: Deal with size differences between GLuint and GLhandleARB in ↵Jeremy Huddleston Sequoia2016-01-221-17/+1
| | | | | | | | | GetAttachedObjectsARB" This reverts commit 739ac3d39dacdede853d150b9903001524453330. This will be done a differnet way. See http://lists.freedesktop.org/archives/mesa-dev/2016-January/105642.html
* i965/fs: Remove unused count from vs urb setupBen Widawsky2016-01-221-6/+0
| | | | | | | | | | | | | | | | | | | | | | This was originally removed here: commit 031d3501322aee0a1474c7f2a9b79f9fa9947430 Author: Kenneth Graunke <kenneth@whitecape.org> Date: Tue Aug 25 16:59:12 2015 -0700 i965/vs: Unify URB entry size/read length calculations between backends. Then added back: commit bd198b9f0a292a9ff4ffffec3a29bad23d62caba Author: Kenneth Graunke <kenneth@whitecape.org> Date: Fri Aug 14 16:01:33 2015 -0700 i965/vs: Simplify fs_visitor's ATTR file. Note that the authorship dates are out of order, but the above reflects the order of the commit dates. Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* Revert "radeonsi: fix discard-only fragment shaders (v2)"Nicolai Hähnle2016-01-221-4/+0
| | | | | | | This reverts commit 843855bbf0da2204ce536623ba957bfa83fdbd52. It became redundant due to Marek's earlier pushed 8667a1ae which achieves the same thing.
* radeonsi: fix discard-only fragment shaders (v2)Nicolai Hähnle2016-01-221-0/+4
| | | | | | | | | | | | | | | | | | | When a fragment shader is used that has no outputs but does conditional discard (KILL_IF), all fragments are killed without this patch. By comparing various register settings, my conclusion is that the exec mask is either not properly forwarded to the DB by NULL exports or ends up being unused, at least when there is _only_ a NULL export (the ISA documentation claims that NULL exports can be used to override a previously exported exec mask). Of the various approaches I have tried to work around the problem, this one seems to be the least invasive one. v2: take discard by alpha test into account as well Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93761 Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* mesa: Update _mesa_has_geometry_shadersMarta Lofstedt2016-01-221-1/+2
| | | | | | | | Updates the _mesa_has_geometry_shaders function to also look for OpenGL ES 3.1 contexts that has OES_geometry_shader enabled. Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* glsl: add support for GL_OES_geometry_shaderMarta Lofstedt2016-01-224-14/+23
| | | | | | | | | This adds glsl support of GL_OES_geometry_shader for OpenGL ES 3.1. Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* mesa: enable enums for OES_geometry_shaderMarta Lofstedt2016-01-222-30/+86
| | | | | | | | | | Enable GL_OES_geometry_shader enums for OpenGL ES 3.1. V4: EXTRA tokens updated according to comments from Ilia Mirkin. Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
* glapi: add GL_OES_geometry_shader extensionMarta Lofstedt2016-01-225-3/+50
| | | | | | | | | Add xml definitions for the GL_OES_geometry_shader extension and expose the extension for OpenGL ES 3.1. Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* radeonsi: add ETC2 support for StoneyMarek Olšák2016-01-222-10/+38
| | | | Tested and working.
* radeonsi: implement SAMPLEPOS system value without a constant buffer loadMarek Olšák2016-01-221-2/+13
| | | | | | | We always get per-sample input position. Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* winsys/amdgpu: compute num_good_compute_units correctlyMarek Olšák2016-01-221-10/+5
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/radeon: rename max_compute_units -> num_good_compute_unitsMarek Olšák2016-01-226-11/+11
| | | | | | radeon sets this correctly, but not amdgpu Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeonsi: disable SPI color outputs the shader doesn't writeMarek Olšák2016-01-222-0/+16
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeonsi: use all SPI color formatsMarek Olšák2016-01-226-58/+195
| | | | | | | | | because not using SPI_SHADER_32_ABGR doubles fill rate. We should also get optimal performance if alpha isn't needed or blending isn't enabled. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeonsi: use 32_AR for alpha-to-coverage without a color bufferMarek Olšák2016-01-221-1/+1
| | | | | | This avoids the fp16 packing instructions. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeonsi: add shader conversion code for all SPI color formatsMarek Olšák2016-01-222-14/+140
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeonsi: set CB_SHADER_MASK according to SPI color formatsMarek Olšák2016-01-221-16/+35
| | | | Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
generated by cgit v1.1 at 2025-01-25 20:00:18 +0000