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* mesa: Add comment to framebuffer_parameteri()Edward O'Callaghan2016-04-071-0/+5
| | | | | | | | | V.2: Change 'N.B.,' to 'NOTE:'. Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* i965/sf_state: Pull flat_enables out of prog_dataJason Ekstrand2016-04-064-27/+5
| | | | | | | | | | Previously, we were walking over the shader source to figure out which inputs should be marked flat. Now, we can just pull it out of prog_data. This is needed for properly setting up 3DSTATE_SF/SBE for Vulkan and it also means that it will get properly cached. Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965/fs: Add a flat_inputs field to prog_dataJason Ekstrand2016-04-062-0/+37
| | | | | Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* brw/device_info: Add a helper for getting a device nameJason Ekstrand2016-04-062-0/+13
| | | | | | | This is needed by the Vulkan driver Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965/fs_surface_builder: Mask signed integers after conversionJason Ekstrand2016-04-061-0/+18
| | | | | Reviewed-by: Francisco Jerez <currojerez@riseup.net> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965/fs: Make the repclear shader support either a uniform or a flat inputJason Ekstrand2016-04-061-5/+18
| | | | | | | | | | In the Vulkan driver we use a single flat input instead of a uniform because setting up push constants is more disruptive to the pipeline than setting up another vertex input. This uses the number of uniforms as a key to keep it working for the GL driver. Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Move get_hw_prim_for_gl_prim to brw_util.cJason Ekstrand2016-04-062-29/+28
| | | | | | | | It's used by brw_compile_gs in brw_vec4_gs_visitor.cpp so it needs to be in a file that's linked into libi965_compiler.la. Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* radeonsi: set shader calling conventionsBas Nieuwenhuizen2016-04-061-1/+16
| | | | | | | | | | | | | Note that old mesa + new LLVM or new mesa + old LLVM breaks with this change and the corresponding LLVM change (D18559). For LLVM version <= 3.8 we use the old method, but we can't detect people using a post 3.8 svn version that is still too old. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* drirc: add a workaround for blackness in WarsowMarek Olšák2016-04-061-0/+8
| | | | Cc: 11.1 11.2 <mesa-stable@lists.freedesktop.org>
* glsl: use has_shader_storage_buffer_objects helperIlia Mirkin2016-04-051-2/+1
| | | | | | | | Replaces open-coded logic with existing helper. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
* glsl: remove remaining tabs in link_uniform_blocks.cppTimothy Arceri2016-04-061-5/+5
| | | | Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
* mesa: remove unused IsShaderStorage fieldTimothy Arceri2016-04-062-6/+0
| | | | Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
* glsl: fully split apart buffer block arraysTimothy Arceri2016-04-0611-296/+270
| | | | | | | | | | | | With this change we create the UBO and SSBO arrays separately from the beginning rather than putting them into a combined array and splitting it apart later. A bug is with UBO and SSBO stage reference querying is also fixed as we now use the block index to lookup the references in the separate arrays not the combined buffer block array. Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
* freedreno/ir3: insert extra move into phiRob Clark2016-04-051-0/+10
| | | | | | | | | | | | | | | | | We had an implicit assumption that the phi src was assigned in it's source (pred) block leading into the phi. But this is not true with NIR, so we can't just ignore the source block specified in the nir_phi_src. Insert an extra mov in the source block. If it is not required the CP pass will take it back out again. Fixes: ./tests/spec/glsl-1.10/execution/vs-call-in-nested-loop.shader_test ./tests/spec/glsl-1.10/execution/vs-inner-loop-modifies-outer-loop-var.shader_test and probably others. Signed-off-by: Rob Clark <robclark@freedesktop.org>
* freedreno/ir3: eliminate unnecessary absneg'sRob Clark2016-04-052-3/+26
| | | | | | | | | | | | | | | | The frontend inserts (abs) and (neg)'s to convert between NIR boolean (~0/0) and native boolean (1/0). So we'd end up with things like: cmps.s.ge r1.x, ... absneg.s r1.x, (neg)r1.x absneg.s r1.x, (abs)r1.x sel.b32 r2.x, r0.x, r1.x, r0.y The (neg) already gets collapsed due to the following (abs). Now by realizing that r1.x comes from a cmps.s instruction, we can drop the (abs) as well. Signed-off-by: Rob Clark <robclark@freedesktop.org>
* clover: Fix build against clang SVN >= r265359Michel Dänzer2016-04-051-0/+3
| | | | | Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
* radeonsi: use bounded indexing for samplersBas Nieuwenhuizen2016-04-051-1/+4
| | | | | Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* radeonsi: use bounded indexing for constant buffersBas Nieuwenhuizen2016-04-051-2/+3
| | | | | Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
* gallium/radeon: allow multiple exports of the same texture with different usageMarek Olšák2016-04-051-21/+33
| | | | | | | | | Instead of failing an assertion, disable DCC and CMASK on the first export that needs it, and merge the external usage flags. v2: clear the EXPLICIT_FLUSH flag if it's not set; whitespace fixes Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
* egl: add EGL_KHR_reusable_sync to egl_driDongwon Kim2016-04-054-8/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables an EGL extension, EGL_KHR_reusable_sync. This new extension basically provides a way for multiple APIs or threads to be excuted synchronously via a "reusable sync" primitive shared by those threads/API calls. This was implemented based on the specification at https://www.khronos.org/registry/egl/extensions/KHR/EGL_KHR_reusable_sync.txt v2 - use thread functions defined in C11/threads.h instead of using direct pthread calls - make the timeout set with reference to CLOCK_MONOTONIC - cleaned up the way expiration time is calculated - (bug fix) in dri2_client_wait_sync, case EGL_SYNC_CL_EVENT_KHR has been added. - (bug fix) in dri2_destroy_sync, return from cond_broadcast call is now stored in 'err' intead of 'ret' to prevent 'ret' from being reset to 'EGL_FALSE' even in successful case - corrected minor syntax problems v3 - dri2_egl_unref_sync now became 'void' type. No more error check is needed for this function call as a result. - (bug fix) resolved issue with duplicated unlocking of display in eglClientWaitSync when type of sync is "EGL_KHR_REUSABLE_SYNC" Signed-off-by: Dongwon Kim <dongwon.kim@intel.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com>
* freedreno/ir3: deal with duplicate phi sourcesRob Clark2016-04-041-5/+20
| | | | | | | | | | | | | Otherwise we end up with funny things like: mov.f32f32 r0.x, r1.y mov.f32f32 r0.x, r1.y (It doesn't happen as much after fixing the problem w/ CP into phi src, but it can still happen since we aren't too clever about generating phi sources in the first place.) Signed-off-by: Rob Clark <robclark@freedesktop.org>
* freedreno/ir3: fix silly brain-fart in RARob Clark2016-04-041-2/+1
| | | | | | | We want to consider all the vars, not 1/32nd of them, when extending live-ranges. Signed-off-by: Rob Clark <robclark@freedesktop.org>
* freedreno/ir3: don't cp into phi'sRob Clark2016-04-041-0/+6
| | | | | | | | The block defining a phi source might not have been executed. If we allow copy propagation, we could end up pointing to a src instruction in the wrong block. Signed-off-by: Rob Clark <robclark@freedesktop.org>
* freedreno/ir3: we can't store immediate valuesRob Clark2016-04-041-0/+13
| | | | | | | | Fixes some transform-feedback piglits, like: bin/ext_transform_feedback-nonflat-integral Signed-off-by: Rob Clark <robclark@freedesktop.org>
* freedreno/ir3: add dumping for use/def/live-in/live-outRob Clark2016-04-043-10/+42
| | | | | | Turned out to be useful to debug an issue in RA. Let's keep it. Signed-off-by: Rob Clark <robclark@freedesktop.org>
* freedreno/ir3: drop unused instr category argRob Clark2016-04-045-114/+108
| | | | | | No longer used, so drop the extra arg to ir3_instr_create() Signed-off-by: Rob Clark <robclark@freedesktop.org>
* freedreno/ir3: remove ir3_instruction::categoryRob Clark2016-04-0410-93/+84
| | | | Signed-off-by: Rob Clark <robclark@freedesktop.org>
* freedreno/ir3: encode instruction category in opc_tRob Clark2016-04-045-192/+201
| | | | | | | | | | | | | Been on my TODO list for a while. If nothing else this will make gdb properly grok the opc_t enum. This first step preserves ir3_instruction::category (with an added assert that category matches what is encoded in opc_t). Next step is to drop the category field (and arg to ir3_instr_create()), but that is split into next commit for bisectability and so that we can run piglit in the intermediate state to flush out any problems. Signed-off-by: Rob Clark <robclark@freedesktop.org>
* i965/fs: Move the code for load/store_shared to emit_cs_intrinsicJason Ekstrand2016-04-041-76/+76
| | | | | | | They are compute-shader only and that's where the code for doing atomics on shared variables lives so it seemes to make sense. Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* i965/nir: Provide a default LOD for buffer texturesJason Ekstrand2016-04-042-0/+8
| | | | | | | | | Our hardware requires an LOD for all texelFetch commands even if they are on buffer textures. GLSL IR gives us an LOD of 0 in that case, but the LOD is really rather meaningless. This commit allows other NIR producers to be more lazy and not provide one at all. Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* nir: Use PRIi64 and PRIu64 instead of %ld and %lu.Kenneth Graunke2016-04-041-2/+3
| | | | | | | | | %ld and %lu aren't the right format specifiers for int64_t and uint64_t on 32-bit (x86) systems. They're %zu on Linux and %Iu on Windows. Use the standard C99 macros in hopes that they work everywhere. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
* i965: Fix invalid pointer read in dead_control_flow_eliminate().Kenneth Graunke2016-04-041-0/+4
| | | | | | | | | | | There may not be a previous block. In this case, there's no real work to do, so just continue on to the next one. v2: Update for bblock->prev() API change. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com>
* i965: Make bblock_t::next and friends return NULL at sentinels.Kenneth Graunke2016-04-042-1/+13
| | | | | | | | | The bblock_t::prev/prev_const/next/next_const API returns bblock_t pointers, rather than exec_nodes. So it's a bit surprising. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com>
* glsl: Lower variable indexing of system value arrays unconditionally.Kenneth Graunke2016-04-041-0/+20
| | | | | | | | | | | | | | | | | | | lower_variable_index_to_cond_assign() did not handle system values. gl_SampleMaskIn[] is a system value, and also an array. Accessing it with a variable index would trigger an unreachable() assert. Rather than adding a new EmitNoIndirectSystemValues flag, we simply lower unconditionally. There is exactly one case where this occurs, and for all current drivers, lowering produces optimal code. Even for future drivers with 32x MSAA, it produces reasonable code. Fixes Piglit's new samplemaskin-indirect test. Also fixes many ES31-CTS tests when OES_sample_variables is enabled. Cc: mesa-stable@lists.freedesktop.org Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* i965/peephole_ffma: Only match a mul+add if none of the ops are exactJason Ekstrand2016-04-041-0/+11
| | | | Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* nir/search: Don't match inexact expressions with exact subexpressionsJason Ekstrand2016-04-041-5/+18
| | | | | | | | | | | | | | | | | | | | In the first pass of implementing exact handling, I made a mistake with search-and-replace. In particular, we only reallly handled exact/inexact on the root of the tree. Instead, we need to check every node in the tree for an exact/inexact match. As an example of this, consider the following GLSL code precise float a = b + c; if (a < 0) { do_stuff(); } In that case, only the add will be declared "exact" and an expression that looks for "b + c < 0" will still match and replace it with "b < -c" which may yield different results. The solution is to simply bail if any of the values are exact when matching an inexact expression. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
* i965: Add an INTEL_PRECISE_TRIG=1 option to fix SIN/COS output range.Kenneth Graunke2016-04-044-4/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | The SIN and COS instructions on Intel hardware can produce values slightly outside of the [-1.0, 1.0] range for a small set of values. Obviously, this can break everyone's expectations about trig functions. According to an internal presentation, the COS instruction can produce a value up to 1.000027 for inputs in the range (0.08296, 0.09888). One suggested workaround is to multiply by 0.99997, scaling down the amplitude slightly. Apparently this also minimizes the error function, reducing the maximum error from 0.00006 to about 0.00003. When enabled, fixes 16 dEQP precision tests dEQP-GLES31.functional.shaders.builtin_functions.precision. {cos,sin}.{highp,mediump}_compute.{scalar,vec2,vec4,vec4}. at the cost of making every sin and cos call more expensive (about twice the number of cycles on recent hardware). Enabling this option has been shown to reduce GPUTest Volplosion performance by about 10%. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* i965: Allow 8x MSAA on >= 64bpp formats on Gen8+.Kenneth Graunke2016-04-041-1/+2
| | | | | | | | | | | See commit 3b0279a69 - this restriction is documented in the "Surface Format" field of RENDER_SURFACE_STATE. Looking at newer documentation, this restriction appears to exist on Haswell, but no longer applies on Gen8+. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
* mesa/get: fix MAX_GEOMETRY_SHADER_STORAGE_BLOCKSDave Airlie2016-04-041-1/+1
| | | | | | | this was returning the fragment shader value. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
* nvc0: add hardware ETC2 and ASTC support on GK20A and GM107+Ilia Mirkin2016-04-043-2/+64
| | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
* mesa: expose EXT_base_instance in ES3 contextsIlia Mirkin2016-04-034-1/+41
| | | | | | | | This extension is identical to ARB_base_instance. Reuse the same entrypoints. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
* mesa: expose EXT_polygon_offset_clamp in ES contextsIlia Mirkin2016-04-034-5/+11
| | | | | | | | The extension spec was extended to also support ES. This functionality is provided all the way back to ES 1.0. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
* glsl: Print "precise" on ir_variable nodes.Kenneth Graunke2016-04-031-2/+3
| | | | | Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
* gallivm: Introduce lp_format_intrinsic.Jose Fonseca2016-04-043-14/+54
| | | | | | | | | | For adding .v4f32 like suffixes to intrinsics, taking special care for scalar case, which was being often neglected. This fixes invalid IR when doing mipmap filtering on SSE2 (the only case where we'd use intrinsics with scalars.) Reviewed-by: Roland Scheidegger <sroland@vmware.com>
* glsl: make *sampler2DMSArray available in ESSL 3.20Ilia Mirkin2016-04-031-5/+7
| | | | | | | | Also avoid double-adding the *sampler2DMS types when the array ext is enabled. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
* glsl: make ssbo predicate return true when in a GLSL 430 or ESSL 310 shaderIlia Mirkin2016-04-031-1/+2
| | | | | | | | | I can't tell whether this actually matters, but we're creating function signatures with this predicate, so it should probably match when SSBO's are available. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
* glsl: allow conservative depth qualifiers in GLSL 420Ilia Mirkin2016-04-031-1/+3
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
* mesa: add always-false-for-now enables for GL 4.3, 4.4, 4.5.Ilia Mirkin2016-04-031-2/+49
| | | | | | | | | As the relevant extensions get implemented, the lines should be uncommented. I believe this is (almost) everything needed for those GL versions though. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
* glsl: add ARB_ES3_1_compatibility supportIlia Mirkin2016-04-035-8/+18
| | | | | | | | Oddly a bunch of the features it adds are actually from ESSL 3.20. But the spec is quite clear, oh well. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
* mesa: add ES3_1_compatibility extension enableIlia Mirkin2016-04-032-0/+2
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Dave Airlie <airlied@redhat.com>
generated by cgit v1.1 at 2025-02-11 13:15:12 +0000