From cfbd9831f89ef165e7998d0b8524a1aefedec404 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 24 Feb 2016 22:11:35 -0800 Subject: i965: Eliminate brw_nir_lower_{inputs,outputs,io} functions. Now that each stage is directly calling brw_nir_lower_io(), and we have per-stage helper functions, it makes sense to just call the relevant one directly, rather than going through multiple switch statements. This also eliminates stupid function parameters, such as the two that only apply to vertex attributes. Signed-off-by: Kenneth Graunke Reviewed-by: Iago Toral Quiroga --- src/mesa/drivers/dri/i965/brw_fs.cpp | 3 +- src/mesa/drivers/dri/i965/brw_nir.c | 88 ++--------------------- src/mesa/drivers/dri/i965/brw_nir.h | 20 ++++-- src/mesa/drivers/dri/i965/brw_shader.cpp | 3 +- src/mesa/drivers/dri/i965/brw_vec4.cpp | 6 +- src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 3 +- src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp | 3 +- 7 files changed, 33 insertions(+), 93 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 6c9ba36..261dff6 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -5594,7 +5594,8 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data, nir_shader *shader = nir_shader_clone(mem_ctx, src_shader); shader = brw_nir_apply_sampler_key(shader, compiler->devinfo, &key->tex, true); - shader = brw_nir_lower_io(shader, compiler->devinfo, true, false, NULL); + brw_nir_lower_fs_inputs(shader); + brw_nir_lower_fs_outputs(shader); shader = brw_postprocess_nir(shader, compiler->devinfo, true); /* key->alpha_test_func means simulating alpha testing via discards, diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c index ed836bf..2bd6c4e 100644 --- a/src/mesa/drivers/dri/i965/brw_nir.c +++ b/src/mesa/drivers/dri/i965/brw_nir.c @@ -202,7 +202,7 @@ remap_patch_urb_offsets(nir_block *block, void *closure) return true; } -static void +void brw_nir_lower_vs_inputs(nir_shader *nir, const struct brw_device_info *devinfo, bool is_scalar, @@ -245,7 +245,7 @@ brw_nir_lower_vs_inputs(nir_shader *nir, } } -static void +void brw_nir_lower_vue_inputs(nir_shader *nir, const struct brw_device_info *devinfo, bool is_scalar) @@ -297,7 +297,7 @@ brw_nir_lower_vue_inputs(nir_shader *nir, } } -static void +void brw_nir_lower_tes_inputs(nir_shader *nir) { struct remap_patch_urb_offsets_state state; @@ -324,46 +324,14 @@ brw_nir_lower_tes_inputs(nir_shader *nir) } } -static void +void brw_nir_lower_fs_inputs(nir_shader *nir) { nir_assign_var_locations(&nir->inputs, &nir->num_inputs, type_size_scalar); nir_lower_io(nir, nir_var_shader_in, type_size_scalar); } -static void -brw_nir_lower_inputs(nir_shader *nir, - const struct brw_device_info *devinfo, - bool is_scalar, - bool use_legacy_snorm_formula, - const uint8_t *vs_attrib_wa_flags) -{ - switch (nir->stage) { - case MESA_SHADER_VERTEX: - brw_nir_lower_vs_inputs(nir, devinfo, is_scalar, use_legacy_snorm_formula, - vs_attrib_wa_flags); - break; - case MESA_SHADER_TESS_CTRL: - case MESA_SHADER_GEOMETRY: - brw_nir_lower_vue_inputs(nir, devinfo, is_scalar); - break; - case MESA_SHADER_TESS_EVAL: - brw_nir_lower_tes_inputs(nir); - break; - case MESA_SHADER_FRAGMENT: - assert(is_scalar); - brw_nir_lower_fs_inputs(nir); - break; - case MESA_SHADER_COMPUTE: - /* Compute shaders have no inputs. */ - assert(exec_list_is_empty(&nir->inputs)); - break; - default: - unreachable("unsupported shader stage"); - } -} - -static void +void brw_nir_lower_vue_outputs(nir_shader *nir, bool is_scalar) { @@ -378,7 +346,7 @@ brw_nir_lower_vue_outputs(nir_shader *nir, } } -static void +void brw_nir_lower_tcs_outputs(nir_shader *nir) { struct remap_patch_urb_offsets_state state; @@ -404,7 +372,7 @@ brw_nir_lower_tcs_outputs(nir_shader *nir) } } -static void +void brw_nir_lower_fs_outputs(nir_shader *nir) { nir_assign_var_locations(&nir->outputs, &nir->num_outputs, @@ -412,30 +380,6 @@ brw_nir_lower_fs_outputs(nir_shader *nir) nir_lower_io(nir, nir_var_shader_out, type_size_scalar); } -static void -brw_nir_lower_outputs(nir_shader *nir, bool is_scalar) -{ - switch (nir->stage) { - case MESA_SHADER_VERTEX: - case MESA_SHADER_TESS_EVAL: - case MESA_SHADER_GEOMETRY: - brw_nir_lower_vue_outputs(nir, is_scalar); - break; - case MESA_SHADER_TESS_CTRL: - brw_nir_lower_tcs_outputs(nir); - break; - case MESA_SHADER_FRAGMENT: - brw_nir_lower_fs_outputs(nir); - break; - case MESA_SHADER_COMPUTE: - /* Compute shaders have no outputs. */ - assert(exec_list_is_empty(&nir->outputs)); - break; - default: - unreachable("unsupported shader stage"); - } -} - static int type_size_scalar_bytes(const struct glsl_type *type) { @@ -550,24 +494,6 @@ brw_preprocess_nir(nir_shader *nir, bool is_scalar) return nir; } -/** Lower input and output loads and stores for i965. */ -nir_shader * -brw_nir_lower_io(nir_shader *nir, - const struct brw_device_info *devinfo, - bool is_scalar, - bool use_legacy_snorm_formula, - const uint8_t *vs_attrib_wa_flags) -{ - bool progress; /* Written by OPT and OPT_V */ - (void)progress; - - OPT_V(brw_nir_lower_inputs, devinfo, is_scalar, - use_legacy_snorm_formula, vs_attrib_wa_flags); - OPT_V(brw_nir_lower_outputs, is_scalar); - - return nir; -} - /* Prepare the given shader for codegen * * This function is intended to be called right before going into the actual diff --git a/src/mesa/drivers/dri/i965/brw_nir.h b/src/mesa/drivers/dri/i965/brw_nir.h index 9a90e36..0140f3a 100644 --- a/src/mesa/drivers/dri/i965/brw_nir.h +++ b/src/mesa/drivers/dri/i965/brw_nir.h @@ -82,11 +82,21 @@ nir_shader *brw_create_nir(struct brw_context *brw, bool is_scalar); nir_shader *brw_preprocess_nir(nir_shader *nir, bool is_scalar); -nir_shader *brw_nir_lower_io(nir_shader *nir, - const struct brw_device_info *devinfo, - bool is_scalar, - bool use_legacy_snorm_formula, - const uint8_t *vs_attrib_wa_flags); + +void brw_nir_lower_vs_inputs(nir_shader *nir, + const struct brw_device_info *devinfo, + bool is_scalar, + bool use_legacy_snorm_formula, + const uint8_t *vs_attrib_wa_flags); +void brw_nir_lower_vue_inputs(nir_shader *nir, + const struct brw_device_info *devinfo, + bool is_scalar); +void brw_nir_lower_tes_inputs(nir_shader *nir); +void brw_nir_lower_fs_inputs(nir_shader *nir); +void brw_nir_lower_vue_outputs(nir_shader *nir, bool is_scalar); +void brw_nir_lower_tcs_outputs(nir_shader *nir); +void brw_nir_lower_fs_outputs(nir_shader *nir); + nir_shader *brw_postprocess_nir(nir_shader *nir, const struct brw_device_info *devinfo, bool is_scalar); diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index 91e4780..857a079 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -1230,7 +1230,8 @@ brw_compile_tes(const struct brw_compiler *compiler, nir = brw_nir_apply_sampler_key(nir, devinfo, &key->tex, is_scalar); nir->info.inputs_read = key->inputs_read; nir->info.patch_inputs_read = key->patch_inputs_read; - nir = brw_nir_lower_io(nir, compiler->devinfo, is_scalar, false, NULL); + brw_nir_lower_tes_inputs(nir); + brw_nir_lower_vue_outputs(nir, is_scalar); nir = brw_postprocess_nir(nir, compiler->devinfo, is_scalar); brw_compute_vue_map(devinfo, &prog_data->base.vue_map, diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index a826fce..3618c72 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -2014,9 +2014,9 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data, nir_shader *shader = nir_shader_clone(mem_ctx, src_shader); shader = brw_nir_apply_sampler_key(shader, compiler->devinfo, &key->tex, is_scalar); - shader = brw_nir_lower_io(shader, compiler->devinfo, is_scalar, - use_legacy_snorm_formula, - key->gl_attrib_wa_flags); + brw_nir_lower_vs_inputs(shader, compiler->devinfo, is_scalar, + use_legacy_snorm_formula, key->gl_attrib_wa_flags); + brw_nir_lower_vue_outputs(shader, is_scalar); shader = brw_postprocess_nir(shader, compiler->devinfo, is_scalar); const unsigned *assembly = NULL; diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp index 40966c6..7f59db4 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp @@ -598,7 +598,8 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data, nir_shader *shader = nir_shader_clone(mem_ctx, src_shader); shader = brw_nir_apply_sampler_key(shader, compiler->devinfo, &key->tex, is_scalar); - shader = brw_nir_lower_io(shader, compiler->devinfo, is_scalar, false, NULL); + brw_nir_lower_vue_inputs(shader, compiler->devinfo, is_scalar); + brw_nir_lower_vue_outputs(shader, is_scalar); shader = brw_postprocess_nir(shader, compiler->devinfo, is_scalar); prog_data->include_primitive_id = diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp index d8bb00f..b6a759b 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp @@ -516,7 +516,8 @@ brw_compile_tcs(const struct brw_compiler *compiler, nir = brw_nir_apply_sampler_key(nir, devinfo, &key->tex, is_scalar); nir->info.outputs_written = key->outputs_written; nir->info.patch_outputs_written = key->patch_outputs_written; - nir = brw_nir_lower_io(nir, compiler->devinfo, is_scalar, false, NULL); + brw_nir_lower_vue_inputs(nir, compiler->devinfo, is_scalar); + brw_nir_lower_tcs_outputs(nir); nir = brw_postprocess_nir(nir, compiler->devinfo, is_scalar); prog_data->instances = DIV_ROUND_UP(nir->info.tcs.vertices_out, 2); -- cgit v1.1